The Datasheet Archive

UT80CRH196 datasheet (63)

Part Manufacturer Description Type PDF
UT80CRH196KD Aeroflex 20MHz 16-bit Microcontroller Original PDF
UT80CRH196KD Aeroflex 20MHz 16-bit Microcontroller Original PDF
UT80CRH196KDS-WCA Aeroflex UTMC Microcontroller. Lead finish solder. Original PDF
UT80CRH196KDS-WCA Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WCC Aeroflex UTMC Microcontroller. Lead finish gold. Original PDF
UT80CRH196KDS-WCC Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WCX Aeroflex UTMC Microcontroller. Lead finish optional. Original PDF
UT80CRH196KDS-WCX Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WPA Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WPA Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WPC Aeroflex UTMC Microcontroller. Lead finish gold. Prototype. Original PDF
UT80CRH196KDS-WPC Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WPX Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WPX Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WWA Aeroflex UTMC Microcontroller. Lead finish solder. Original PDF
UT80CRH196KDS-WWA Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WWC Aeroflex UTMC Microcontroller. Lead finish gold. Original PDF
UT80CRH196KDS-WWC Aeroflex UTMC Microcontroller Original PDF
UT80CRH196KDS-WWX Aeroflex UTMC Microcontroller. Lead finish optional. Original PDF
UT80CRH196KDS-WWX Aeroflex UTMC Microcontroller Original PDF

UT80CRH196 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
UT131

Abstract: mil-std-1553 USART USART rs232 pc aeroflex sram ecc Pulse Code Modulation RS 422 to PWM converter block diagram of telemetry JORDAN UT80CRH196KD aeroflex antifuse
Text: target board using the UT80CRH196KD. Control RCV XMIT Optional RS-232 De-bug Port 64K byte , Port 64K byte Instruction PROM UT80CRH196 16MHz Control with FirstPass IP Core Control , Figure 1. UT131 Embedded Controller Card Embedded Controller Card · UT80CRH196KD MicroController ­ , . UT80CRH196KD Microcontroller F C irs t o r Pa e I ss P · UT80CRH196KD Block Diagram Control , ECC 1 ECC 2 UT80CRH196KD UT80CRH196KD USART USART USART Baud Rate Programmable to


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PDF 14-bit RS-232 UT80CRH196 16MHz RS-422 RS-485 8Kx16 UT131 UT-131 mil-std-1553 USART USART rs232 pc aeroflex sram ecc Pulse Code Modulation RS 422 to PWM converter block diagram of telemetry JORDAN UT80CRH196KD aeroflex antifuse
MCS-96

Abstract: UT131 UT131ECC SRAM edac rs232 rs422 converter
Text: 64K byte DATA SRAM A(15:0) RCV(3:0) 32 Analog Inputs UT80CRH196 16MHz Control with


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PDF UT131 14-bit 16-bit, 16MHz, MCS-96 RS-232 RS-422 RS-232 UT131ECC SRAM edac rs232 rs422 converter
MCS-96 20MHz

Abstract: MCS-96 radiation-hardened EEPROM UT131ECC RS422 Synchronous Data MCS-96 development
Text: Port D(13:0) UT80CRH196 20MHz Control with FirstPass IP Core Control Output Discretes


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PDF 14-bit 16-bit, 20MHz, MCS-96 UT131ECC+ 32-bit, 33MHz MILSTD-883 RS-232 RS-422 MCS-96 20MHz radiation-hardened EEPROM UT131ECC RS422 Synchronous Data MCS-96 development
MCS-96

Abstract: MCS-96 development mcs-96 software radiation hardened cpu UT131 UT131ECC RS-485 communication mcs-96 serial communication
Text: XMIT Optional RS-232 De-bug Port D(13:0) 64K byte Instruction PROM UT80CRH196 20MHz


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PDF UT131 14-bit 16-bit, 16MHz, MCS-96 MIL-STD-883 RS-232 RS-422 RS-485 MCS-96 development mcs-96 software radiation hardened cpu UT131ECC RS-485 communication mcs-96 serial communication
2011 - 5962L0053605VYC

Abstract: UT9Q512E-20YCC 5962-9069204QXA ATMEL 302 24C16 MOH0268D UT54ACS164245SEIUCCR Z085810 UT28F256QLET-45UCC 5962R0250401KXA 5962-9762101Q2A
Text: No file text available


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PDF MIL-HDBK-103AJ MIL-HDBK-103AH MIL-HDBK-103AJ 5962L0053605VYC UT9Q512E-20YCC 5962-9069204QXA ATMEL 302 24C16 MOH0268D UT54ACS164245SEIUCCR Z085810 UT28F256QLET-45UCC 5962R0250401KXA 5962-9762101Q2A
1998 - aeroflex antifuse programming method screen

Abstract: MANUALS EPITAXIAL 8XC196KC Users manual CM 1241 rs 422 485 pinout USART 8251 interfacing with RS-232 temperature controller CHB 402 manual
Text: 2.1.1.1 Selecting the Desired COM Port 2.1.1.2 Configuring the UT80CRH196KD†™s Internal USART 2.1.1.3 , , as well as increment, decrement, negate, compare, and logical operations. The UT80CRH196KD†™s , located on the UT80CRH196KD. One discrete output signal, when toggled high-low-high, initiates a , Multiplexed Serial COM Ports The ECC multiplexes the UT80CRH196KD†™s internal USART to provide 4 serial COM , via direct control from the UT80CRH196KD. The peripherals are straightforward to control and will


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PDF UT131 16-bit 00000113H 0000FF81H 00000000H 00000036H 00002000H aeroflex antifuse programming method screen MANUALS EPITAXIAL 8XC196KC Users manual CM 1241 rs 422 485 pinout USART 8251 interfacing with RS-232 temperature controller CHB 402 manual
1997 - tt 3043 Transistor 5 pin type

Abstract: 8XC196KD users manual intel asm-96 918010 transistor horizontal tt 2206 intel 80196 users manual 0181 ecb bbc 598 479 8XC196KC Users manual 80196 MCS-96 instruction
Text: Desired COM Port 2.1.1.2 Configuring the UT80CRH196KD's Internal USART 2.1.1.3 Enabling the Serial Port , . The UT80CRH196KD's interrupt controller prioritizes 18 standard and special interrupts. To reduce , through discrete I/O located on the UT80CRH196KD. One discrete output signal, when toggled high-low-high , Multiplexed Serial COM Ports The ECC multiplexes the UT80CRH196KD's internal USART to provide 4 serial COM , UT80CRH196KD. The peripherals are straightforward to control and will require little user intervention when


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PDF UT131 16-bit 00000113H 0000FF81H 00000000H 00000036H 00002000H tt 3043 Transistor 5 pin type 8XC196KD users manual intel asm-96 918010 transistor horizontal tt 2206 intel 80196 users manual 0181 ecb bbc 598 479 8XC196KC Users manual 80196 MCS-96 instruction
1998 - stb 1277 TRANSISTOR equivalent

Abstract: No abstract text available
Text: 2.1.1.1 Selecting the Desired COM Port 2.1.1.2 Configuring the UT80CRH196KD†™s Internal USART 2.1.1.3 , UT80CRH196KD†™s interrupt controller prioritizes 18 standard and special interrupts. To reduce power , I/O located on the UT80CRH196KD. One discrete output signal, when toggled high-low-high, initiates , cycles. 4 1.1.4 Four Multiplexed Serial COM Ports The ECC multiplexes the UT80CRH196KD†™s , and writing locations in memory, or via direct control from the UT80CRH196KD. The peripherals are


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PDF UT131 16-bit 00000113H 0000FF81H 00000000H 00000036H 00002000H stb 1277 TRANSISTOR equivalent
2008 - TSMC 0.18 um MOSfet

Abstract: M38510 10102BCA IDT7204L 5962-8768401MQA sl1053 0.18um LDMOS TSMC TSMC 0.25Um LDMOS UT63M125BB SMD 5962-04221 RTAX250S-CQ208
Text: No file text available


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PDF QML-38535 MIL-PRF-38535 MIL-STD-790 MIL-STD-690 -581DSCC QML-38535 TSMC 0.18 um MOSfet M38510 10102BCA IDT7204L 5962-8768401MQA sl1053 0.18um LDMOS TSMC TSMC 0.25Um LDMOS UT63M125BB SMD 5962-04221 RTAX250S-CQ208
Binary Synchronous 8-Bit Counter

Abstract: 80C196KD SILICON 2044H
Text: , and logical operations. The UT80CRH196KD's interrupt controller prioritizes and vectors 18 interrupt , configuration bits available in the CCR. However, bits 7 and 6 are not used by the UT80CRH196KD. Bits 5 and 4 , the EDAC Check Bit 5 through pin 2 of the UT80CRH196KD. Non-Maskable Interrupt. A positive transition , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KD. Port 0 Pin 1. An input only , UT80CRH196KD. Port 0 Pin 0. An input only port pin that is read at location 0Eh in HWindow 0. EDAC Check Bit 2


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PDF UT80CRH196KD 20MHz 16-bit MCS-96 MIL-STD-883 66e-7cm Binary Synchronous 8-Bit Counter 80C196KD SILICON 2044H
1998 - 80196KD

Abstract: 8XC196KD UT80 ECB11 mcs96 instruction set 49e4 80CRH196 UT80CRH196KD MCS-96 mcs-96 instruction set
Text: operations. The UT80CRH196KD's interrupt controller prioritizes and vectors 18 interrupt events. Interrupts , configuration bits available in the CCR. However, bits 7 and 6 are not used by the UT80CRH196KD. Bits 5 and 4 , correction engine to pass the EDAC Check Bit 5 through pin 2 of the UT80CRH196KD. 3 TDI NMI High , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KD. TI P0.1 - , pass the EDAC Check Bit 3 through pin 5 of the UT80CRH196KD. TI P0.0 - Port 0 Pin 0. An


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PDF UT80CRH196KD 20MHz 16-bit MCS-96 MIL-STD-883 66e-7cm UT80CRH196KD-3-5-98 80196KD 8XC196KD UT80 ECB11 mcs96 instruction set 49e4 80CRH196 mcs-96 instruction set
2002 - 80C196KD

Abstract: SRAM edac MCS-96 UT80CRH196KDS 80CRH196 mcs96 instruction set mcs-96 instruction set
Text: divides, as well as increment, decrement, negate, compare, and logical operations. The UT80CRH196KDS's , CCR. However, bits 7 and 6 are not used by the UT80CRH196KDS. Bits 5 and 4 comprise the READY mode , error detection and correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KDS. , correction engine to pass the EDAC Check Bit 3 through pin 5 of the UT80CRH196KDS. 2 5 13 Table , correction engine to pass the EDAC Check Bit 2 through pin 6 of the UT80CRH196KDS. TI P0.2 -


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PDF UT80CRH196KDS MCS-96 20MHz 16-bit -40oC, 125oC. 80C196KD SRAM edac 80CRH196 mcs96 instruction set mcs-96 instruction set
1998 - 200a6

Abstract: 8XC196KD MCS-96 UT80CRH196KD transistor P07 smd mcs 96 opcode
Text: , decrement, negate, compare, and logical operations. The UT80CRH196KD's interrupt controller prioritizes , the UT80CRH196KD. Bits 5 and 4 comprise the READY mode control which define internal limits for , engine to pass the EDAC Check Bit 5 through pin 2 of the UT80CRH196KD. 3 TDI NMI High , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KD. TI P0.1 - , pass the EDAC Check Bit 3 through pin 5 of the UT80CRH196KD. TI P0.0 - Port 0 Pin 0. An


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PDF UT80CRH196KD 20MHz 16-bit MCS-96 MIL-STD-883 66e-7cm2/bit UT80C 200a6 8XC196KD transistor P07 smd mcs 96 opcode
GR712RC

Abstract: UT700 UT8QNF8M 5962R102 smd zener diode color code melf ZENER diode COLOR CODE HDMI verilog BCH RTAX2000 PCS5038 cd758
Text: Microcontroller UT80CRH196KDS Microcontroller UT80CRH196KD Microcontroller UT69R000 Microcontroller UT1 750AR RISC


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PDF
RTAX2000

Abstract: UT16AD80P UT63M143 m38510/55501 MIP7965-750B1 5962-8869203 vhdl code manchester encoder UT54LVDM055LV SMD custom precision rESISTOR network h009 SPECIFICATION
Text: * UT80CRH196KDS Microcontroller Fully-compatible with MCS-96 ISA, 1K bytes data RAM, 3 programmable I/O ports , 1-20 MHz, FirstPass Core IP. 3.0E5 48 6.0E-7 UT80CRH196KD Microcontroller


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PDF UT691 RTAX2000 UT16AD80P UT63M143 m38510/55501 MIP7965-750B1 5962-8869203 vhdl code manchester encoder UT54LVDM055LV SMD custom precision rESISTOR network h009 SPECIFICATION
intel 80196 microcontroller

Abstract: resistor 5K 80196 intel 80196 application note u1511 U-513 2018h U5-14 80C196KD EV80C196KD
Text: must be made to the Intel EV80C196KD Evaluation Board so that it will work with the UTMC UT80CRH196KD , beta version of the UT80CRH196KD device BHE is not valid until WR goes valid. This modification allows , the EDACEN digital input to the UT80CRH196KD ). 4. Remove the C2 array of capacitors. (Port 0 is a , (actually VSS) through 5K Ohm pulldown resistors (the UT80CRH196KD drives these as outputs during EDAC , * => These signals are driven by the UT80CRH196KD when the EDACEN is active 7. UTMC suggests


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PDF EV80C196KD UT80CRH196KD 00Mhz RS232 UT80CRH196KD) 2018h) E12-E15, intel 80196 microcontroller resistor 5K 80196 intel 80196 application note u1511 U-513 2018h U5-14 80C196KD
2002 - mcs 96 opcode

Abstract: mcs-96 instruction set SMD transistor MARKING CODE wsr transistor 016h 80CRH196 ecb1 hwin 200AH ECB4 UT80CRH196KDS
Text: , decrement, negate, compare, and logical operations. The UT80CRH196KDS's interrupt controller prioritizes , configuration bits available in the CCR. However, bits 7 and 6 are not used by the UT80CRH196KDS. Bits 5 and 4 , error detection and correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KDS. , correction engine to pass the EDAC Check Bit 3 through pin 5 of the UT80CRH196KDS. 2 5 13 Table , correction engine to pass the EDAC Check Bit 2 through pin 6 of the UT80CRH196KDS. TI P0.2 -


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PDF UT80CRH196KDS 20MHz 16-bit MCS-96 MIL-STD-883 25MeV-cm2 mcs 96 opcode mcs-96 instruction set SMD transistor MARKING CODE wsr transistor 016h 80CRH196 ecb1 hwin 200AH ECB4
Not Available

Abstract: No abstract text available
Text: No file text available


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PDF UT80C196KD 20MHz 16-bit MCS-96
1999 - 200A6

Abstract: schmitt trigger quad
Text: No file text available


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PDF UT80C196KD 20MHz 16-bit MCS-96 200A6 schmitt trigger quad
1998 - IOC14

Abstract: No abstract text available
Text: UT80CRH196KD's interrupt controller prioritizes and vectors 18 interrupt events. Interrupts include normal , UT80CRH196KD. Bits 5 and 4 comprise the READY mode control which define internal limits for waitstates , the EDAC Check Bit 5 through pin 2 of the UT80CRH196KD. Non-Maskable Interrupt. A positive transition , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KD. Port 0 Pin 1. An input only , UT80CRH196KD. Port 0 Pin 0. An input only port pin that is read at location 0Eh in HWindow 0. EDAC Check Bit 2


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PDF UT80CRH196KD 20MHz 16-bit MCS-96 MIL-STD-883 66e-7cm IOC14
2002 - transistor 016h

Abstract: No abstract text available
Text: , decrement, negate, compare, and logical operations. The UT80CRH196KDS's interrupt controller prioritizes and , available in the CCR. However, bits 7 and 6 are not used by the UT80CRH196KDS. Bits 5 and 4 comprise the , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KDS. Port 0 Pin 1. An input , UT80CRH196KDS. 3 TDI NMI High 4 TI P0.3 - TB ECB41 5 TI D P0.1 IN , 6 of the UT80CRH196KDS. Port 0 Pin 2. An input only port pin that is read at location 0Eh in HWindow


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PDF UT80CRH196KDS 20MHz 16-bit MCS-96 MIL-STD-883 25MeV-cm2 UT80CRH196ified transistor 016h
80196 instruction set

Abstract: 16 bit 80196 80196 8XC196KD UT80CRH196KD
Text: explain the differences between the UT80CRH196KD and the industry standard 8XC196KD interrupt architectures. Further, it will discuss how to use the UT80CRH196KD's multilevel interrupt architecture to simplify pending interrupt prioritization. 1.0 UT80CRH196KD vs. Industry Standard 80196 Interrupt , UTMC Application Note UT80CRH196KD Interrupt Priority Architecture The UT80CRH196KD delivers a , priorities (15 is highest and 0 is the lowest) for both, the UT80CRH196KD , and the industry standard


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PDF UT80CRH196KD 8XC196KD 80196 instruction set 16 bit 80196 80196
1999 - 80C196

Abstract: No abstract text available
Text: No file text available


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PDF UT80C196KD 20MHz 16-bit MCS-96 80C196
2002 - mcs-96 instruction set

Abstract: transistor 016h mcs96 instruction
Text: , decrement, negate, compare, and logical operations. The UT80CRH196KDS's interrupt controller prioritizes and , UT80CRH196KDS. Bits 5 and 4 comprise the READY mode control which define internal limits for waitstates , correction engine to pass the EDAC Check Bit 4 through pin 4 of the UT80CRH196KDS. Port 0 Pin 1. An input , UT80CRH196KDS. TB ECB51 - 3 TDI NMI High 4 TI P0.3 - TB ECB41 - , correction engine to pass the EDAC Check Bit 2 through pin 6 of the UT80CRH196KDS. Port 0 Pin 2. An input


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PDF UT80CRH196KDS 20MHz 16-bit MCS-96 MIL-STD-883 25MeV-cm2 68-lead mcs-96 instruction set transistor 016h mcs96 instruction
Intel MCS-96

Abstract: No abstract text available
Text: UT80CRH196KD's interrupt controller prioritizes and vectors 18 interrupt events. Interrupts include normal , used by the UT80CRH196KD. Bits 5 and 4 comprise the READY mode control which define internal limits for , error detection and correction engine to pass the EDAC Check Bit 5 through pin 2 of the UT80CRH196KD. , 4 of the UT80CRH196KD. Port 0 Pin 1. An input only port pin that is read at location OEh in HWindow , to pass the EDAC Check Bit 3 through pin 5 of the UT80CRH196KD. Port 0 Pin 0. An input only port pin


OCR Scan
PDF UT80CRH196KD 20MHz 16-bit MCS-96 MIL-STD-883 66e-7cm2/testing. Intel MCS-96
Supplyframe Tracking Pixel