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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LT1490ACDD#PBF Linear Technology LT1490A - Dual Over-The-Top Micropower Rail-to-Rail Input and Output Op Amps; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
LT1490AHS8#TRPBF Linear Technology LT1490A - Dual Over-The-Top Micropower Rail-to-Rail Input and Output Op Amps; Package: SO; Pins: 8; Temperature Range: -40°C to 125°C
LT1491ACS#PBF Linear Technology LT1491A - Quad Over-The-Top Micropower Rail-to-Rail Input and Output Op Amps; Package: SO; Pins: 14; Temperature Range: 0°C to 70°C
LT1636CS8#PBF Linear Technology LT1636 - Over-The-Top Micropower Rail-to-Rail Input and Output Op Amp; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LT1636IS8#TRPBF Linear Technology LT1636 - Over-The-Top Micropower Rail-to-Rail Input and Output Op Amp; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LT1716HS5#PBF Linear Technology LT1716 - SOT-23, 44V, Over-The-Top, Micropower, Precision Rail-to-Rail Comparator; Package: SOT; Pins: 5; Temperature Range: -40°C to 125°C

Top marks EB Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2013 - Not Available

Abstract: No abstract text available
Text: backed by more than 25 years experience with expanded beam ( EB ) fiber connector technology and are , experience for the development of the HX-1080 Broadcast Series. With world leading single mode EB optical , Sealing  Worldwide Support Top Left: HX-1080 Plug and bulkhead assembly showing blind mate thumb , detail Top Right: Opto-electrical Pin-out configuration All dimensions are in mm 158 mm 35 mm Auxiliary Electrical Low Voltage Signal EB Optical Technical Specifications Performance Optical


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PDF Hx1080 HX-1080 HX-1080 CON10310 CON10315 CON10311
2009 - marking 3A sot-89

Abstract: 3V02 SIVN3205 VN3205
Text: "Green" Packaging Top Marking VN3205P YYWW LLLLLLLLLL Package may or may not include the following marks : Si or Bottom Marking CCCCCCCCCCC AAA TO-92 (N3) VN2LW W = Code for week sealed Package may or may not include the following marks : Si or YY = Year Sealed WW = Week Sealed L = Lot Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking = "Green" Packaging Package may or may not include the following marks : Si or TO-243AA (SOT-89) (N8


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PDF VN3205 DSFP-VN3205 B022109 marking 3A sot-89 3V02 SIVN3205
2009 - HV5812P

Abstract: 16Strobe diagram HV5812 HV5812PJ 2.65mm A0324 uA78
Text: Package may or may not include the following marks : Si or 28-Lead PLCC (PJ) Top Marking YYW W HV 5 , referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV5812P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA *May be part of top marking Recommended Operating Conditions Sym , Assembler ID* = "Green" Packaging Package may or may not include the following marks : Si or Parameter , state. 4. Apply VPP. The VPP should not drop below VDD during operation. Top Marking YY = Year


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PDF HV5812 20-Channel, HV5812 20-bit DSFP-HV5812 A040309 HV5812P 16Strobe diagram HV5812PJ 2.65mm A0324 uA78
2013 - Not Available

Abstract: No abstract text available
Text: of top marking Package may or may not include the following marks : Si or 28-Lead PDIP , top marking Package may or may not include the following marks : Si or 28-Lead PLCC YY = Year , Country of Origin* = “Green” Packaging CCCCCCCCCCC Top Marking YYWW AAA θja 43OC/W 48OC/W , = Assembler ID* = “Green” Packaging Top Marking Power-up sequence should be the following , . Apply VPP. Package Product Marking YYWW Parameter 28 28-Lead SOW Top Marking


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PDF HV5812 20-Channel, HV5812 20-bit DSFP-HV5812 C072413
2011 - hv5812wg

Abstract: No abstract text available
Text: V V °C Package may or may not include the following marks : Si or 28-Lead PDIP (P) Top Marking , YYWW AAA *May be part of top marking Package may or may not include the following marks : Si or , -Lead PDIP (P) 4 1 28 28-Lead SOW (WG) 26 Product Marking Top Marking H V 58 1 2 P YYWW , "Green" Packaging *May be part of top marking Recommended Operating Conditions Sym VDD VPP Tj , * = "Green" Packaging *May be part of top marking Package may or may not include the following


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PDF 20-Channel, HV5812 HV5812 20-bit DSFP-HV5812 B040811 hv5812wg
2009 - Not Available

Abstract: No abstract text available
Text: *May be part of top marking AAA Package may or may not include the following marks : Si or 28 , reliability. All voltages are referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV5812P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA *May be part of top marking Recommended , Origin* A = Assembler ID* = “Green” Packaging Package may or may not include the following marks , operation. Top Marking YY = Year Sealed WW = Week Sealed LLLLLLLLLL L = Lot Number C = Country of


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PDF HV5812 20-Channel, HV5812 20-bit DSFP-HV5812 A032409
2010 - diagram

Abstract: HV5812PJ HV5812P HV5812 B0410
Text: following marks : Si or 28-Lead PLCC (PJ) Top Marking YYW W A A A HV 5 81 2 WG LLLLLLLLLL , "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si , referenced to GND. 28-Lead PLCC (PJ) Product Marking Top Marking YYWW HV58 12P LLLLLLLLLL , Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si or Recommended Operating Conditions Sym 28-Lead PDIP (P


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PDF HV5812 20-Channel, HV5812 20-bit DSFP-HV5812 A032910 diagram HV5812PJ HV5812P B0410
2011 - Not Available

Abstract: No abstract text available
Text: -Lead PLCC (PJ) 28-Lead SOW (WG) 2000mW 1900mW 1700mW 28-Lead PLCC (PJ) Product Marking Top , C = Country of Origin* A = Assembler ID* = “Green” Packaging *May be part of top marking Package may or may not include the following marks : Si or Recommended Operating Conditions Sym VDD , Top Marking YYWW AAA HV5812PJ Supply voltage 20 80 V LLLLLLLLLL Operating , Country of Origin* = “Green” Packaging *May be part of top marking Package may or may not include


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PDF HV5812 20-Channel, HV5812 20-bit DSFP-HV5812 B040811
2009 - sivn

Abstract: vn2lw VN3205N8-G s1 sot-89 marking code B0521 DMOS VN3205ND VN3205N3-G 125OC vn3205
Text: 5 YYWW Top Marking YY = Year Sealed WW = Week Sealed = "Green" Packaging YYWW V N3 2 0 5 P LLLLLLLLLL Bottom Marking Package may or may not include the following marks : Si or , -Lead PDIP (P) TO-243AA (SOT-89) (N8) ID ID *May be part of top marking Package may or may not include the following marks : Si or Package may or may not include the following marks : Si or Thermal , D1 b Top View View B View B Seating Plane A2 A A A1 L e eA A


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PDF VN3205 DSFP-VN3205 B052109 sivn vn2lw VN3205N8-G s1 sot-89 marking code B0521 DMOS VN3205ND VN3205N3-G 125OC vn3205
2009 - VN2222NC

Abstract: 125OC mosfet array vgs 5v 2A 3V02
Text: Packaging AAA YYWW *May be part of top marking Package may or may not include the following marks , (NC) ( top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed VN2 222NC , 20 Note 1 (Index Area) E1 E b1 1 b Top View View B View B Seating Plane A L A A1 e eA A eB Side View View A - A Note: 1. A Pin 1 identifier , - - - MAX .200 .070 .022 .065 1.020 .325 .310 eA .300 REF eB


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PDF VN2222NC VN2222NC 20-Lead DSFP-VN2222NC B042709 125OC mosfet array vgs 5v 2A 3V02
2009 - 125OC

Abstract: VN2222NC B11120
Text: Packaging AAA YYWW *May be part of top marking Package may or may not include the following marks , b Top View View B View B Seating Plane A L A A1 e eA A eB Side , (NC) ( top view) Product Marking Top Marking YY = Year Sealed WW = Week Sealed VN2 222NC , 1.020 .325 .310 eA .300 REF eB .300 e .400 .100 BSC L .125 .200 JEDEC


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PDF VN2222NC VN2222NC 20-Lead DSFP-VN2222NC B111209 125OC B11120
2011 - Not Available

Abstract: No abstract text available
Text: , USB3, etc.) into the 16-lane slot on top , as shown in the example diagram and photo on the following , . • Target add-in cards for system tests IDT | THE ANALOG + DIGITAL COMPANY 89HT0808P EB , trademarks of IDT. Other trademarks and service marks used herein, including protected names, logos and , reserved. IDT | THE ANALOG + DIGITAL COMPANY PB_89HP0808P_REVA0612 89HT0808P EB PRODUCT BRIEF 2


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PDF 89HT0808P 89KTT0808P 89HP0808P REVA0612
2013 - Not Available

Abstract: No abstract text available
Text: Country of Origin* A = Assembler ID* = “Green” Packaging *May be part of top marking Package may or may not include the following marks : Si or 40-Lead PDIP Top Marking YYWW HV518PJ , voltage, VPP 40-Lead PDIP -0.5V to +6.0V -0.5V to +90V Logic input levels ( top view) -0.5V , . Typical Thermal Resistance Package 39 C/W 44-Lead PLCC ( top view) Product Marking θja 40-Lead PDIP 44-Lead PLCC 37 C/W Top Marking O YYWW H V 518P O LLLLLLLLLL


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PDF HV518 32-Channel HV518 32-bit DSFP-HV518 C072413
2011 - Not Available

Abstract: No abstract text available
Text: top marking Package may or may not include the following marks : Si or 40-Lead PDIP (P) Top , of top marking Package may or may not include the following marks : Si or 44-Lead PLCC (PJ , D1 D1 b Top View View B A View B Seating Plane A A2 A1 L eA eB e A , -Lead PDIP (P) 44-Lead PLCC (PJ) ( top view) ( top view) Product Markings Top Marking YYWW H V , .100 BSC eA .600 BSC eB L .600* .115 - - .700 .200 JEDEC Registration


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PDF HV518 32-Channel HV518 32-bit DSFP-HV518 B041111
2011 - B0411

Abstract: V518P Top marks EB
Text: be part of top marking Package may or may not include the following marks : Si or 40-Lead PDIP (P) Top Marking HV518PJ YYWW LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA YY = Year Sealed , part of top marking Package may or may not include the following marks : Si or 44-Lead PLCC (PJ , 85OC at 20mW/ O C. 40-Lead PDIP (P) ( top view) 44-Lead PLCC (PJ) ( top view) Product Markings Top Marking H V 518P YYWW LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA Y = Last Digit of Year


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PDF 32-Channel HV518 HV518 32-bit DSFP-HV518 B041111 B0411 V518P Top marks EB
2014 - Not Available

Abstract: No abstract text available
Text: D1 L b Top View View B View B A A A2 Seating Plane A1 eA eB A Side , -Lead PLCC Product Marking Top Marking HV9120NG YWW LLLLLLLL Bottom Marking CCCCCCCCC AAA Y , ID* = “Green” Packaging *May be part of top marking Package may or may not include the following marks : Si or Power dissipation: 16-Lead SOIC 16-Lead PDIP 20-Lead PLCC 900mW 1000mW , reliability. Voltages are referenced to -VIN. 16-Lead SOIC Top Marking YYWW HV9120P LLLLLLLLLL


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PDF HV9120 500KHz HV9120 DSFP-HV9120 C031314
2012 - C0213

Abstract: HV9120NG-G TRANSISTOR PJ 026 transistor 40V embedded package
Text: Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si or 16-Lead SOIC (NG) Top Marking HV9120P YYWW LLLLLLLLLL Bottom Marking , Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si or 16-Lead PDIP (P) Top Marking Stresses beyond those listed under "Absolute , -Lead PLCC ja 83OC/W 51OC/W 66 C/W O 20-Lead PLCC (PJ) Product Marking Top Marking YWW HV9120NG


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PDF 500KHz HV9120 HV9120 DSFP-HV9120 B060412 C0213 HV9120NG-G TRANSISTOR PJ 026 transistor 40V embedded package
2011 - HV9123

Abstract: AN-H21 HV9123NG-G HV9123NG PJ 89 MARKING
Text: part of top marking Package may or may not include the following marks : Si or 16-Lead SOIC (NG) Top Marking HV9123P LLLLLLLLLL Bottom Marking CCCCCCCCCCC AAA Y = Last Digit of Year Sealed , reliability. Package may or may not include the following marks : Si or 16-Lead PDIP (P) Top Marking , -0.3V to VDD +0.3V 2.5mA 150OC -65OC to +150OC YYWW 20-Lead PLCC (PJ) Product Marking Top , part of top marking Stresses beyond those listed under "Absolute Maximum Ratings" may cause


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PDF 500KHz HV9123 HV9123 240VAC DSFP-HV9123 A040711 AN-H21 HV9123NG-G HV9123NG PJ 89 MARKING
2011 - HV9120

Abstract: No abstract text available
Text: C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si or 16-Lead SOIC (NG) Top Marking HV9120P YYWW , referenced to -VIN. Package may or may not include the following marks : Si or 16-Lead PDIP (P) Top , +0.3V 2.5mA 150OC -65 to +150OC 20-Lead PLCC (PJ) Product Marking Top Marking YWW HV9120NG , Number C = Country of Origin* A = Assembler ID* = "Green" Packaging *May be part of top marking


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PDF 500KHz HV9120 HV9120 DSFP-HV9120 A040711
2012 - HV9123PJ

Abstract: smps design notes AN-H21
Text: Assembler ID* = "Green" Packaging *May be part of top marking Package may or may not include the following marks : Si or 16-Lead SOIC (NG) Top Marking HV9123P YYWW LLLLLLLLLL Bottom Marking , include the following marks : Si or 16-Lead PDIP (P) Top Marking Stresses beyond those listed under , *May be part of top marking Package may or may not include the following marks : Si or 20 , ja 83 C/W O O 20-Lead PLCC (PJ) Product Marking Top Marking YWW 51 C/W 66OC/W HV9123NG


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PDF 500KHz HV9123 HV9123 240VAC DSFP-HV9123 B060412 HV9123PJ smps design notes AN-H21
2014 - Not Available

Abstract: No abstract text available
Text: D1 L b Top View View B View B A A2 A Seating Plane A1 eA eB A Side , -Lead PLCC Product Marking Top Marking HV9123NG YWW LLLLLLLL Bottom Marking CCCCCCCCC AAA Y , ID* = “Green” Packaging *May be part of top marking Package may or may not include the following marks : Si or Power dissipation: 900mW 1000mW 1400mW 16-Lead SOIC 16-Lead PDIP 20 , * = “Green” Packaging *May be part of top marking 16-Lead PDIP 51°C/W 20-Lead PLCC


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PDF HV9123 500kHz HV9123 240VAC DSFP-HV9123 C031314
2011 - Not Available

Abstract: No abstract text available
Text: -lane slot on top , as shown in the example diagram and photo on the following page. Passive trace cards can , provide configuration for different channel lengths and system architectures. 89HT0816P EB PRODUCT , are registered trademarks of IDT. Other trademarks and service marks used herein, including protected , EB PRODUCT BRIEF 2 Integrated Device Technology


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PDF 89HT0816P 89KTT0816P REVA0612
2000 - color sensor

Abstract: MCSiAT MCS3AO MCS3BT green color ring diode MCS3AS
Text: Operating temperature range Storage temperature range Symbol D A Smax ëB ëG ëR VR IR C tr, tf NEP Top Tst ëB = 470 nm ëG = 570 nm ëR = 650 nm Condition typ. Value 2.0 0.85 0.26 0.33 0.41 (0.25) 400 - , production Control of manufacturing Detection of color marks Features Dielectric filters guarantees the , REVISIONS REV. DESCRIPTION 1 V1.3 APPROVED 2000/03/16 PIN-Configuration ( Top view) PIN 1 2 3 4 5 6 7 , MCS3 TOP VIEW (Not to Scale) 8 CC 7 NC 6 NC SOP 8 5 A1 TO5-package SOP8- package


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PDF MTI04 MT04AD MTI04AS MTI08. MTI32 32-channel 408-255-3546Email: color sensor MCSiAT MCS3AO MCS3BT green color ring diode MCS3AS
2001 - Not Available

Abstract: No abstract text available
Text: Ordering Information Operating Temperature Range KA33VBU KA33VTA Top Mark Package -20 to , Volt Meter EB 1 Figure 7. Measuring Circuit for Stabilized Voltage VZ Iz IAC = + â , ~ f = 1KHz EB 1 ● ● ● Fig. 3 IZ Vz rZ = 0 5mA VV1 1 0.5mA , unregistered trademarks and service marks , owned by Fairchild Semiconductor and/or its global subsidiaries, and


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PDF KA33V KA33V KA33VBU KA33VTA
2003 - Trellis

Abstract: viterbi IESS-308/309 Viterbi Trellis Decoder viterbi decoder for tcm decoders viterbi convolution express card DVB IESS-308/309 XAPP551 XC3S100E
Text: puncturing · BER monitor Figure Top x-ref 1 Branch Metric Unit Encoded data from noisy channel , 1/01 0 1 DS247_02_051806 Figure Top x-ref 2 Figure 2: State Transitions for Constraint , as each channel requires its own traceback. Figure Top x-ref 3 CLK DATA_IN0 D0_1 D0 , . Figure Top x-ref 4 CLK SEL Data encoded with convolution codes 0 DATA_IN0 DI0_0 DI0 , on the Trellis-Mode decoder. Figure Top x-ref 5 data_out_s 1/2 Encoded Convolutional data


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PDF DS247 IESS-308/309. Trellis viterbi IESS-308/309 Viterbi Trellis Decoder viterbi decoder for tcm decoders viterbi convolution express card DVB IESS-308/309 XAPP551 XC3S100E
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