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Part Manufacturer Description Datasheet Download Buy Part
MSP430F67471AIPZ Texas Instruments MSP430F67471A Mixed Signal Microcontroller 100-LQFP -40 to 85
MSP430F67471IPEUR Texas Instruments MSP430F677x1, MSP430F676x1, MSP430F674x1 Mixed Signal Microcontroller 128-LQFP -40 to 85
MSP430F67471AIPEU Texas Instruments MSP430F67471A Mixed Signal Microcontroller 128-LQFP -40 to 85
MSP430F67471IPZR Texas Instruments MSP430F677x1, MSP430F676x1, MSP430F674x1 Mixed Signal Microcontroller 100-LQFP -40 to 85
MSP430F67471AIPZR Texas Instruments MSP430F67471A Mixed Signal Microcontroller 100-LQFP -40 to 85
MSP430F67471AIPEUR Texas Instruments MSP430F67471A Mixed Signal Microcontroller 128-LQFP -40 to 85

TTL 7471 Datasheets Context Search

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V 7470

Abstract: AA N 12110 transistor CI 7478 100E516 OF IC 7470 "SERIES MELPS 740 Software" "SERIES MELPS 740" M37471 marking codes transistors SSs 7480 Group
Text: Preface This user's manual describes Mitsubishi's CMOS 8-bit microcomputers 7470/ 7471 /7477/7478 , of the 7470/ 7471 /7477/7478 group, and should be able to fully utilize the product. The manual starts , .1-89 1.13A 7470/ 7471 group part , .1-101 7470/ 7471 /7477/7478 GROUP USER'S MANUAL iii Table of contents 1.13A.4 Notes on use , .1-213 7470/ 7471 /7477/7478 GROUP USER'S MANUAL iii Table of contents 2.1 I/O pins


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PDF P15/TxD 56P6N-A M37478M4-XXXSP 42P4B M37478M4-XXXFP 56P6N-A V 7470 AA N 12110 transistor CI 7478 100E516 OF IC 7470 "SERIES MELPS 740 Software" "SERIES MELPS 740" M37471 marking codes transistors SSs 7480 Group
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
Text: intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or TTL , Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O compatibility â , OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 16 74152 24 74253 40 7401 4 7471 15 74153 27 74257 36 7402 4 7472 14 74154 33 74258 34 7403 4 7473


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PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
Not Available

Abstract: No abstract text available
Text: standards) Horizontal/vertical separation ( TTL : positive/negative) Sync-on-green, Composite sync ( TTL , 747.1 mm (52 5/8" x 29 7/16") Response Time Computer Input 747.7* (29 3/8) Max. Display


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PDF PN-V600 PN-V600 60-inch RS-232C PN-ZB02 PN-SS01 PN-SS02 PN-SV01
co711

Abstract: TTL 7471 CO-740 CO-711 Co750 C0740 co-760
Text: E17: ±1 x 107 CO-744-1 x 10 Vday 2 x 1 0 -6 /year CO- 747-1 x 10Vday 3 x 107 /year 5 x 1 0 9 per , ±5% * - r 1 5V d c * 1 5V dc R + Output *Std: HCMOS/ TTL Supply +5Vdc ±5% J "H C M 0 S /T T L *+ 1 5 V d c & +5Vdc 'A n y vo lta g e in 1 2 -2 4 V d c ran ge o p tio n a l * * Drives 3 TTL loads, 10LS TTL loads or HCM0S (output Is from HCMOS gate) * D rives 3 T TL lo ad s, 1 0LS TTL lo ad


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PDF CO-740: CO-711 CO-750: CO-760: CO-740 CO-750 C0-760 CO-744-1 CO-747-1 10Vday co711 TTL 7471 Co750 C0740 co-760
Not Available

Abstract: No abstract text available
Text: Viewing Angle (H/V) 176°/176° (CR ≥ 10) Active Screen Area (W x H) 1328.8 x 747.1 mm Power , protrusions) Packing Dimensions (W x D x H) (approx.) Horizontal/vertical separation ( TTL : positive/negative) Sync-on-green, Composite sync ( TTL : positive/negative) Plug & Play Dimensions (W x D x H


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PDF PN-V601 PN-V601 60-inch PN-ZB02
Not Available

Abstract: No abstract text available
Text: of the bracket. Viewing Angle (H/V) 176°/176° (CR ≥ 10) 1,328.8 x 747.1 mm (52 5/8" x 29 7 , /vertical separation ( TTL : positive/negative) Sync-on-green, Composite sync ( TTL : positive/negative


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PDF PN-V602 PN-V602 PN-SV01 PN-SS01 PN-SS02 PN-SS02
74aLS808

Abstract: 74ALS677 SN74LS630 74ALS468 SN74AS877 74ls631 74ALS879 SN74LS693 FS454 4BR SH
Text: • • TTL • PAGE N 8. TTL 7471 2 118 • • ABV • â , -State 7-471 2 294 ADV '3 77 '5 34 2 224 TTL ADV A '878 3-State N8. TTL â , DESCRIPTION TYPE ST0 Hex 2-Input Gains 804 04 ALS AS • TTL A • H L LS S ADV • • • TYL • • Hex Inverters • • • TTL ’ 1000 • FUNCTIONAL INDEX • • • TTL ’ 10 ADV • • • TTL


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PDF ALS1032 AS1032 ALS1034 AS1034 ALS1035 AS1036 ALS1240 ALS1241 ALS1242 ALS1243 74aLS808 74ALS677 SN74LS630 74ALS468 SN74AS877 74ls631 74ALS879 SN74LS693 FS454 4BR SH
intel d 8293

Abstract: intel 8293 TTL 7479 IEEE 3 bus datas 7472 PIN DIAGRAM TTL 7471 SPI to IEEE-488 SPI GPIB intel 8291A intel 8291
Text: mode select pins, OPTA and OPTB. All these pins are TTL compatible. T/Rl 1 ' Transmit Receive 1: This pin controls the direction for NDAC, NRFD, DAV, and DI01-DI08. Input is TTL compatible. T/R2 2 I Transmit Receive 2: This pin controls the direction for EOl. Input is TTL compatible. Symbol Pin No. Type , and is switched between transmit and receive by T/fi2. This pin is TTL compatible. ÄfN 4 0 Attention , lines is to be Interpreted. This output is TTL compatible. OPTA OPTB 27 26 I I Mode Select: These two


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PDF 28-Pin IEEE-488 tpL22 intel d 8293 intel 8293 TTL 7479 IEEE 3 bus datas 7472 PIN DIAGRAM TTL 7471 SPI to IEEE-488 SPI GPIB intel 8291A intel 8291
2003 - pin diagram of IC 1408

Abstract: ADI508 AD1408-7D 2SC 1508 AD1408
Text: current outputs, variable or fixed reference inputs, CMOS or TTL logic compatibility and a wide choice of , ,:R 0.035 10.891 15" ~0.381 . \\ I. 0.2!M ( 7.471 0.306 (7.771 -I -


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PDF 250ns 157mW Hermetic16 TheAD1408 AD1S08 ADl408/AD1508 AD1408-7D AD1408-8D 1408-9D AD1508-8D pin diagram of IC 1408 ADI508 2SC 1508 AD1408
truth table for ic 74138

Abstract: ALU IC 74183 16CUDSLR IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table
Text: truth table C om plete sym bol library of basic gates and over 120 TTL m acro functions S u p p o rt for , includes basic logic gates and flipflops. The A+PLUS TTL M acroFunction Library has m ore than 120 TTLe q u , , 7443, 7444, 7445, 7446, 7447, 7448, 7449, 74138, 74139, 74154, 74155, 74156 7470, 7471 , 7472, 7473


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PDF 44-Mbyte, 386-based truth table for ic 74138 ALU IC 74183 16CUDSLR IC 74151 diagram and truth table 74183 alu 74147 pin diagram and truth table pin diagram of IC 74184 HP-7475A 7408 ic truth table IC 74373 truth table
Not Available

Abstract: No abstract text available
Text: ­ quence. It connects to the 8291A and is switched between transm it and receive by T/R2. This pin is TTL , ­ trol line. It specifies how data on the DIO lines is to be interpreted. This output is TTL compatible , . Input is TTL compatible. I/O OPTA OPTB Transmit Receive 1: This pin con­ trols the direction fo r NDAC, NRFD, DAV, and DI01-DI08. Input is TTL compatible. 3 A fÑ GPIB Line*, 8291A , . Their use is programmed by the tw o mode select pins, OPTA and OPTB. All these pins are TTL compaÂ


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PDF 28-Pin IEEE-488 AFN-00825C AFN-00625C
800RPM

Abstract: Mark gdfc Linear-11 42568
Text: the filter cutoff frequency (fc). Slimming disable function control pin ( TTL compatible, active high). , 0.1 05 X R|NT x CTO. R|NT is 20K (±25%). Dropout detection circuit output ( TTL compatible). This pin , . (Reset mode). Sector mark detector output ( TTL compatible). This pin goes high when a qualified "m ark , Specifications (Inputs are CM OS compatible while outputs are TTL compatible) High level input voltage Low level , 7.019 7.442 2.377 2.426 2.570 2.801 3.104 3.465 3.869 4.302 4.754 5.215 5.678 6.138 6.592 7.037 7.471


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PDF ML6012 ML601 800RPM Mark gdfc Linear-11 42568
L6012

Abstract: mark code ea1 fcd400 ST 42568 6599 a ic 37943 42568 7498 ttl
Text: disable function control pin ( TTL compatible, active high). When this pin is forced to logic high, the , U T Dropout detection circuit output ( TTL RDB compatible). This pin goes high when no pulses are , mark detector output ( TTL compatible). This pin goes high when a qualified "mark" is detected. Buffered , Digital I/O Specifications (Inputs are CM OS compatible while outputs are TTL compatible) High level , 7.037 7.471 7.893 m^Micro Linear 4-205 f ML6012 FILTER GROUP DELAY AND SLIMMING LEVEL AS A


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PDF ML6012 L6012 L6013 ML6012CH 32-PIN mark code ea1 fcd400 ST 42568 6599 a ic 37943 42568 7498 ttl
Not Available

Abstract: No abstract text available
Text: used to bias these outputs. 4 RFIL DSLIM Slimming disable function control pin ( TTL , ) and C A G C discharges to 2V. 9 AGCM D 21 DOUT Dropout detection circuit output ( TTL , SMARK 25 4 VRO UT ■Sector mark detector output ( TTL compatible). This pin goes high , Specifications (Inputs are CMOS compatible while outputs are TTL compatible) High level input voltage VCCD - , 4.302 4.754 5.215 5.678 6.138 6.592 7.037 7.471 7.893 13 ML6012 FILTER G R O U P DELAY A


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PDF ML6012 ML6012 L6013
ic 74226

Abstract: jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list 7414 NOT gate ic IC LA 74141 Ic ttl 7490, 7493, 7495 ci 74386
Text: N UM B ER OF GATES · TTL 7 4 0 0 SERIES TTL Part N o. 7400 7401 7402 7403 7404 7405 7406 7407 7408 , 7464 7465 7470 7471 7472 7473 7474 7475 7476 7477 7478 7480 7481 7482 7483 7484 7485 7486 7487 7489 G , 45 6 5 8 7 7 6 6 6 9 8 8 16 15 14 20 15 14 20 14 20 17 80 27 57 80 73 12 19 320 TTL Part N o. 7490 , 100 100 80 76 TTL Part N o. 74192 74193 74194 74195 74196 74197 74198 74199 74225 74226 74245 74246


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PDF RP3G01 RP3G01 ic 74226 jk flip flop 74103 ic D flip flop 7474 7471 rs flip flop 4011 flip flop IC 7400 SERIES list 7414 NOT gate ic IC LA 74141 Ic ttl 7490, 7493, 7495 ci 74386
Not Available

Abstract: No abstract text available
Text: • CMOS/ TTL compatible inputs and outputs • Operates from a single +5V power supply â , of the received data recovered from RXINP and RXINN AMI line pulses. RPOS and RNEG have TTL levels , falling edge. EXCLK 3 I External Clock. EXCLK is a TTL level input. The dock frequency should , data TPOS and TNEG must have TTL levels and must be In NRZ format. (These lines can be directly , , respectively. NOTE: Do not connect a TTL or CMOS clock source to these pins. TVCC 8 I Transmit Una


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PDF DDD7454 R8069A R8069A R8070 PCM30 RS069A
1984 - IEC 68-2-63

Abstract: transistors Si 6822 MIL-STD-781 transistors 6822 si MIL-STD-785 MIL-STD-721 The Japanese Transistor Manual 1981 IEC 68-2-28 AND 7411 NATIONAL SEMICONDUCTOR MARKING BM
Text: understanding. Publication 747 consists of 747-1 through 747-10. These include general rules ( 747-1 ), rectifier , Assured Digital Semiconductor Integrated Circuits 1979 JIS C 7311 Reliability Assured TTL


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AD7576

Abstract: AD7576BQ AD7576KN AD7576SQ AD7576TQ 74hc4000 6809 8bit Instruction set
Text: driven directly from 74HC, 4000 B-series buffers (such as 4049) or from LS TTL with a 5.6kil pull-up , .qs1 0.06 (1.531 _L T d.012 iq.30s) u.d.40q (10.160) .^j ' 0.330 (8.3821 1 0 306 (7.78) 0.294 { 7.471


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PDF AD7576 100ns AD7576 cont741 mil-m-38s10 AD7576BQ AD7576KN AD7576SQ AD7576TQ 74hc4000 6809 8bit Instruction set
2001 - DA 3807

Abstract: M37508 M38079MFD M37630 m38122m4 hp 7540 philips 7560 TTL 7471 hp 7 segment display M38C24
Text: 7471 7470 2 Note: I C-BUS (3851 and 7516 Groups) Peripheral Enhanced tions Func Purchase , 1K 1K 512 640 1K 640 1K 1.5K 2K 1K 2.5K 5 9 1 49 57 ( TTL input: 8) 43 44 55 8 - - 8


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PDF 100-pin 64-pin DA 3807 M37508 M38079MFD M37630 m38122m4 hp 7540 philips 7560 TTL 7471 hp 7 segment display M38C24
74LS82

Abstract: 74245 BIDIRECTIONAL BUFFER IC ic 4583 schmitt trigger core bit excess 3 adder using IC 7483 advantages for ic 7473 la 4508 ic schematic diagram 4 BIT COUNTER 74669 XF107 random number generator by using ic 4011 and 4017 74295
Text: gate delays in the order of 0.4 ns · 200 MHz toggle frequency · ADVANCELL(TM > compatible · TTL /CMOS , performance systems previously requiring TTL , Schottky TTL and ECL solutions. Siemens Aktiengesellschaft 1 , 1.5V and 3.5V input levels. TTL input buffers provide standard 0.8V and 2.0V input levels. Schmitt trigger input cells offer 1.2V of hysterisis for CMOS levels and 0.7V for TTL levels. More details of , Level Input Buffer Clock Driver with CMOS Level Schmitt Input Buffer Clock Driver with TTL Level Input


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74ls82

Abstract: 74245 BIDIRECTIONAL BUFFER IC 74ls150 ph 4531 diode 4583 dual schmitt trigger ic D flip flop 7474 74245 BUFFER IC ic 7483 BCD adder Quad 2 input nand gate cd 4093 data sheet ic 74139
Text: €¢ TTL /CMOS and Schmitt trigger I/O compatibility • Slew-rate output buffers • High density Static , hardware platform for a multitude of high performance systems previously requiring TTL , Schottky TTL and , provide standard 1.5V and 3.5V input levels. TTL input buffers provide standard 0.8V and 2.0V input levels. Schmitt trigger input cells offer 1.2V of hysterisis for CMOS levels and 0.7V for TTL levels. More details , D 1.80 DRVTx Clock Driver with TTL Level Input Buffer U D 1.29 IBUFx CMOS Level Input Buffer N U D


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PDF
1995 - w02 8348

Abstract: MF8CCN 09 9767 ttl 7484 BW 6122 CMOS 4548 National 5841 k246 chebyshev 4467
Text: frequency is programmable to 100 1 or 50 1 Two inputs are available for TTL or CMOS clock signals The TTL , independently programmable Separate TTL and CMOS clock inputs 18 pin 0 3 wide package Key Specifications Y , ) A OUT (14) 50 100 (10) TTL CLK (7) CMOS CLK (8) This pin allows the MF8 to generate its , and an external capacitor from the CMOS Clock input to AGND The TTL Clock input should be connected , TTL input is used this pin should be connected to Vb 1 0 Application Information 1 1 INTRODUCTION


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744040

Abstract: scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
Text: handle multiple (unctions including: — Low-drive inputs compatible with TTL , CMOS or Schmitt Trigger — High-drive (Clock Driver) inputs compatible with TTL , CMOS or Schmitt Trigger — Output compatible with TTL and CMOS and configurable as TRI-STATE®, non TRI-STATE or Open Drain — Outputs , Level TTL l/P Voltage (for TTL Input Option) V0 = 0.5V or Vqq - 1V, l0 = 1 fiA 2 V VilTTL Max. Low Level TTL l/P Voltage (for TTL Input Option) V0 = 0.5V or Vqd - 1V, l0 = 1 /xA 0.8 V l| Input


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PDF AA32096 744040 scx6206 74589 744020 Flip-Flop 7471 744017 744017 counter sn 74373 scx6218 74395
744040

Abstract: Scx6206 744017 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218
Text: handle multiple functions including: — Low-drive inputs compatible with TTL , CMOS or Schmitt Trigger — High-drive (Clock Driver) inputs compatible with TTL , CMOS or Schmitt Trigger — Output compatible with TTL , Current V| = Vdd or GND, V0 = 0.4V 4 mA VihTTL Min. High Level TTL l/P Voltage (for TTL Input Option) Vo = 0.5V or Vdd - 1V, lo = 1 /xA 2 V VilTTL Max. Low Level TTL l/P Voltage (for TTL Input Option) Vo , of 1X 7X 1SX 1 mA 2 mA 4 mA V D N Input Only TTL X X X X X X (36 Macros


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PDF AA32096 744040 Scx6206 744017 sn 74373 latch 74574 744020 Flip-Flop 7471 74292 74299 universal shift register SCX6218
xxnx

Abstract: HXE12 l 9737 1990 1142 xxnxx AMI500HXPS cmos tristate buffer schmitt trigger 7414
Text: Load L H PADM P D HDL Syntax IDTS3 PADM QC PADM 4.90 pF Non-inverting, TTL , L L H PADM P D H Non-inverting, TTL input buffer piece , Load H A 14.5 eql PADM HDL Syntax ODCHXX12 High performance TTL tri-statable , ) From: A To: PADM 4.754 5.210 7.026 7.471 9.282 9.760 12.637 13.249 18.169 19.186 , HDL Syntax HXE12 High performance TTL tri-statable non-inverting buffer piece, 12 mA


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PDF AMI500HXPS xxnx HXE12 l 9737 1990 1142 xxnxx cmos tristate buffer schmitt trigger 7414
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