The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTC2174IUKG-14#PBF Linear Technology LTC2174-14 - 14-Bit, 105Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Range: -40°C to 85°C
LTC2174IUKG-14#TRPBF Linear Technology LTC2174-14 - 14-Bit, 105Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Range: -40°C to 85°C
LTC2174CUKG-14#PBF Linear Technology LTC2174-14 - 14-Bit, 105Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Range: 0°C to 70°C
LTC2174CUKG-14#TRPBF Linear Technology LTC2174-14 - 14-Bit, 105Msps Low Power Quad ADCs; Package: QFN; Pins: 52; Temperature Range: 0°C to 70°C
SN7414NSRE4 Texas Instruments 7414 SERIES, HEX 1-INPUT INVERT GATE, PDSO14, GREEN, PLASTIC, SOP-14
SN7414DE4 Texas Instruments 7414 SERIES, HEX 1-INPUT INVERT GATE, PDSO14, GREEN, PLASTIC, MS-012AB, SOIC-14

TTL 7414 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
74573

Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Text: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and , UK ). Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together. The following tables are available . TTL Device Summary CMOS Device , device is suitable for your purposes. 1 of 12 E&OE. TTL Device Summary Please click on a , 7404 7405 7406 7407 7408 7410 7411 7414 7420 7421 7427 7430 7432 7447 7448 7473 7474


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TTL 7414

Abstract: TTL 7414 data schmitt trigger 7414 7414 74LS14 equivalent 7414 ttl inverter 7414 hex NOT 7414 SIGNETICS LS14 N7414N
Text: Signetics 7414 , LS14 Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification Logic Products DESCRIPTION The '14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input , phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to , and supply voltage variations. TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7414


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TTL 7414

Abstract: 7414 SIGNETICS 7414 74LS14 function table TTL 7414 data 74LS14 DATA S M 475 50v signetics 7414
Text: Signetics 7414 , LS14 Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification Logic Products DESCRIPTION The ' 14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input , shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback , insensitive to temperature and supply voltage varia tions. TYPE 7414 74LS14 TYPICAL PROPAGATION DELAY 15ns


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TTL 7414

Abstract: TTL 7414 data 7414 74LS14 function table 7414 hex not 7414 ttl inverter schmitt trigger 7414 7414 equivalent pin configuration 74LS14 ls14
Text: Signetics Logic Products 7414 , LS14 Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification DESCRIPTION The '14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into , phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feedback to , and supply voltage varia tions. TYPE 7414 74LS14 TYPICAL PROPAGATION DELAY 15ns 15ns TYPICAL


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schmitt trigger 7414

Abstract: 7414 TTL 7414 7414 ttl inverter TTL 7414 data N74LS14D 74ls inverters 74LS14 74LS 1N916
Text: standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly , Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses , insensitive to temperature and supply voltage variations. 7414 , LS14 Schmitt Triggers Hex Inverter Schmitt Trigger Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7414 15ns , Specification Schmitt Triggers 7414 , LS 14 ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range


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2002 - ls14

Abstract: No abstract text available
Text: 7414 LS14 SNJ54LS14FK †Package drawings, standard packing quantities, thermal data , APPLICATION DATA TTL System VT+ VT– Input CMOS Sine-Wave Oscillator Output TTL System , 7414 SN7414DE4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7414 SN7414DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7414 SN7414DR ACTIVE SOIC D 14 2500 Green


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PDF SN5414, SN54LS14, SN7414, SN74LS14 SDLS049B SN54LS14 SN7414 ls14
D1N4002

Abstract: D1N4002 diode DIODE D1N4002 AD780SQ TTL 7414 7414 ttl inverter schmitt trigger 7414 7414 oscillator MBR1060 DIODE DATASHEET 74LS14S
Text: Reset Reference Voltage 7414 7414 D2 C1 tOPEN = 100ms Reset_T UT80CRH196KD Power , the TTL totem pole effect which only allows the maximum output voltage to reach 3.4V typical. 6/4


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PDF UT80CRH196KD 16-state UT80CRH196KD. D1N4002 D1N4002 diode DIODE D1N4002 AD780SQ TTL 7414 7414 ttl inverter schmitt trigger 7414 7414 oscillator MBR1060 DIODE DATASHEET 74LS14S
1983 - pin diagram of sn74ls14n

Abstract: No abstract text available
Text: SNJ54LS14W SNJ54LS14FK TOP-SIDE MARKING SN7414N SN74LS14N 7414 LS14 SN7414 LS14 SN5414J SNJ5414J SN54LS14J , FEBRUARY 2002 TYPICAL APPLICATION DATA TTL System Input CMOS VT+ VT­ Sine-Wave Oscillator Output TTL System Interface for Slow Input Waveforms Pulse Shaper 0.1 Hz to 10 MHz 330 Input , JM38510/ 31302BCA JM38510/ 31302BCA SN5414J SN54LS14J 7414 7414 7414 7414 7414 7414 5962-9665801QCA


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PDF SN5414, SN54LS14, SN7414, SN74LS14 SDLS049B SN54LS14 SN7414 SN74LS14 pin diagram of sn74ls14n
Not Available

Abstract: No abstract text available
Text: minimum wwww Output: Square wave, will drive up to 10 TTL loads Input voltage: +5V D.C. ±5% MODEL ZN- 7414 Input current: 10.1 MHz to 20.0 MHz 25 ma. typical 40.0 kHz to 10.0 MHz 55 ma


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PDF ZN-155AZ) ZN-155 ZN-155A ZN-155B ZN-155C
TTL 7414

Abstract: IC sn7414
Text: tics High Noise Immunity SN 5414, SN 54LS14 . . . J OR W PACKAGE S N 7414 . . . J OR N PACKAGE SN , B O X 2 2 50 12 · D A L L A S , T E X A S 75265 385 TTL D E V IC E S TYPES SN5414 , m i n a l. VQC TTL D E V IC E S 3-86 . Te x a s In s t r u m e n t s POST O F F IC E BO X , 125 0 M IN 4.7 5 S N 7414 NOM 5 MAX 5.25 - 0.8 16 70 V mA mA °C U N IT electrical characteristics , TTL ns d e v ic e s § N o t m o r e t h a n o n e o u t p u t s h o u ld b e s h o r t e d a


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PDF SN5414, SN54LS14, SN7414, SN74LS14 54LS14 TTL 7414 IC sn7414
7404 TTL CMOS

Abstract: TTL 74h04 TTL 7400 fairchild 7404 ttl inverter CI 74LS00 TTL 7404 fairchild 9016 TTL 7404 fairchild 74H00 TTL TTL 9016 fairchild TTL 7401
Text: , 54LS/74LS04, 9017, 9S05A, 54/7405, 54H/74H05, 54S/74S05, 54L8/74LS05, 54/7406, 54/ 7414 , 54LS/74LS14, 54 , . a> Q. » Q c o ï 2 <= E ¡5 2 ^ S* « Q O) o .j Package(s) 1 /uA1488 Quad mA1489 TTL Volt Single Ended ±10 220 ±15 4 I49 6A,9A 2 54/7437 Quad 2-NAND Any TTL TTL Volt Single Ended 48 10 +5.0 ' ÜB 4 D2 3I, 6A,9A 3 54/7438 Quad 2-NAND 96106 TTL Volt Single Ended 48 13 +5.0 98 4 D2 3I, 6A,9A 4 54/7440 Dual 2-NAND Any TTL TTL Volt Single Ended 48 11 +5.0 52 2 D5 3I, 6A,9A 5 54H/74H40 Dual 2


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PDF 54H/74H04, 54S/74S04, 54LS/74LS04, 9S05A, 54H/74H05, 54S/74S05, 54L8/74LS05, 54LS/74LS14, 54H/74H00, 54S/74S00, 7404 TTL CMOS TTL 74h04 TTL 7400 fairchild 7404 ttl inverter CI 74LS00 TTL 7404 fairchild 9016 TTL 7404 fairchild 74H00 TTL TTL 9016 fairchild TTL 7401
SN7414

Abstract: sn7414 circuit SN414
Text: Immunity SN&414, SN 54LS14 J OR W PACKAGE S N 7414 . . . N PACKAGE SN 74LS14 . D OR N PACKAGE (TOP VIEW , 211 TTL Devices 1 20 1 9\ 1 8[ 6 Y C 1 7[ N 2Y ] 6 16[ 5 A C N C ]7 15[ N 1 4[ 5Y 3A ] 8 9 1 0 1 , , SN74LS14 HEX SCHMITT-TRIGGER INVERTERS schematics 'LS14 TTL Devices absolute maximum ratings , recommended operating conditions S N 5 41 4 M IN ^cc Iq h |q l S N 7414 MAX 5.5 - 0.8 16 O M IN 4 .7 5 , -0 .4 3 -0 .5 6 1 40 -0 .8 -1 8 22 39 -1 .2 -5 5 36 60 0.4 V V V mA 2 TTL Devices mA mA mA


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PDF SN5414, SN54LS14, SN7414, SN74LS14 54LS14 74LS14 SN7414 sn7414 circuit SN414
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
Text: intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or TTL , Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O compatibility â , OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 , 57 74164 43 74278 34 7413 14 7484 80 74165 85 74279 10 7414 30 7485 73 74166 62 74280 24 7415 8


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PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 CMOS 4017 series ttl 74395 74106
KM68V257C

Abstract: KM68V257C-15 KM68V257C-17 KM68V257CJ KM68V257CP 28-DIP-300
Text: KM68V257C CMOS SRAM 32,768 WORDx8 Bit High Speed CMOS Static RAM(3.3V Operating) FEATURES • Fast Access Time : 15,17, 20ris(Max.) • Low Power Dissipation Standby ( TTL ) : 30mA (max) (CMOS) : 100/jA (max) Operating : KM68V257C-15 : 90mA (max.) KM68V257C-17 : 80mA (max.) KM68V257C-20 : 70mA (max.) • Single 3.3V±0.3V power supply • TTL compatible inputs and outputs • Fully Static , 7^414 E 0010410 This Material Copyrighted By Its Respective Manufacturer KM68V257C CMOS SRAM WRITE


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PDF KM68V257C 20ris 100/jA KM68V257C-15 KM68V257C-17 KM68V257C-20 KM68V257CP 28-DIP-300 KM68V257CJ KM68V257C KM68V257C-15 KM68V257C-17 KM68V257CJ KM68V257CP 28-DIP-300
HCPL-3700 Application note 1004

Abstract: varistor xf 075 working of ic 7414 zener diode cross reference IC 7414 not gate with schmitt trigger MC6821 AN 1004 Threshold Sensing for Industrial Control Systems with the HCPL-3700 Interface Optocoupler pin diagram of ic 7414 7414 NOT gate ic flow switch water pump circuit diagram for 3 phase
Text: -3700 Schmitt Trigger Upper Threshold Voltage of TTL Gate ( 7414 ) Output Pullup Resistance Output Filter , configuration. The output is compatible with TTL and CMOS logic levels. High common mode rejection, or transient , with slow RC rise time of the output waveform when TTL logic is used. Input filtering avoids the RC , . Input filtering allows flexibility in using the HCPL-3700 output for direct interfacing with TTL or CMOS , -3700 optocoupler monitors the computer power line and the output of the optocoupler is interfaced to a TTL Schmitt


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PDF HCPL-3700 HCPL-3700 Application note 1004 varistor xf 075 working of ic 7414 zener diode cross reference IC 7414 not gate with schmitt trigger MC6821 AN 1004 Threshold Sensing for Industrial Control Systems with the HCPL-3700 Interface Optocoupler pin diagram of ic 7414 7414 NOT gate ic flow switch water pump circuit diagram for 3 phase
1983 - Not Available

Abstract: No abstract text available
Text: 7414 LS14 SNJ54LS14FK †Package drawings, standard packing quantities, thermal data , APPLICATION DATA TTL System VT+ VT– Input CMOS Sine-Wave Oscillator Output TTL System , SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 7414 , -1-260C-UNLIM 0 to 70 7414 SN7414DRE4 ACTIVE SOIC D 14 TBD Call TI Call TI 0 to 70 SN7414DRG4 ACTIVE SOIC D 14 TBD Call TI Call TI 0 to 70 Addendum-Page 1 7414


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PDF SN5414, SN54LS14, SN7414, SN74LS14 SDLS049B SN54LS14 SN7414
pin diagram of 7414

Abstract: KM64B1003J-10 KM64B1003J-12 KM64B1003J-15 pin 7 diagram of 7414
Text: KM64B1003 BiCMOS SRAM 262,144 WORD x 4 Bit (With OE) Ultra High-Speed BiCMOS Static RAM FEATURES • Fast Access Time: 8, 10, 12, 15ns (Max.) • Low Power Dissipation Standby ( TTL ) : 60mA (Max.) (CMOS): 10mA (Max.) Operating : KM6481003J-8: 165mA (Max.) KM64B1003J-10: 155mA (Max.) KM64B1003J-12: 145mA (Max.) KM64B1003J-15: 135mA (Max.) • Single 5V±10% Power Supply • TTL compatible , 1 3 - 3 - 3 - ns ^^^^ELECTRONICS ™ 7^414 E 0013444 17S This Material Copyrighted By Its


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PDF KM64B1003 KM6481003J-8: 165mA KM64B1003J-10: 155mA KM64B1003J-12: 145mA KM64B1003J-15: 135mA KM64B1003J pin diagram of 7414 KM64B1003J-10 KM64B1003J-12 KM64B1003J-15 pin 7 diagram of 7414
2007 - 5953-0406E

Abstract: IC 7414 not gate with schmitt trigger OPTOCOUPLER 3700 optocoupler with schmitt trigger input optocoupler PC 187 HCPL-3700 Application note 1004 HCPL-3700 optocoupler application note MC6821 working of ic 7414
Text: output of the optocoupler is interfaced to a TTL Schmitt trigger gate ( 7414 ). 360 320 , HCPL-3700 = Schmitt Trigger Upper Threshold Voltage of TTL Gate ( 7414 ) = Output Pullup Resistance , configuration. The output is compatible with TTL and CMOS logic levels. High common mode rejection, or , standard method, but may present problems with slow RC rise time of the output waveform when TTL logic , -3700 output for direct interfacing with TTL or CMOS devices without the slow rise time which would be


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PDF HCPL-3700 HCPL-3700 5953-0406E IC 7414 not gate with schmitt trigger OPTOCOUPLER 3700 optocoupler with schmitt trigger input optocoupler PC 187 HCPL-3700 Application note 1004 optocoupler application note MC6821 working of ic 7414
pin diagram of 7414

Abstract: 7414 fast TTL 7414 data KM68257CP-15 KM68257CJ KM68257CP-20 KM68257CJ20 KM68257C-20 KM68257C-15 KM68257C-12
Text: KM68257C CMOS SRAM 32Kx8 Bit High Speed CMOS Static RAM FEATURES • Fast Access Time 12, 15, 20 ns (Max.) • Low Power Dissipation Standby ( TTL ) : 40 mA (Max.) (CMOS) : 2 mA (Max.) Operating KM68257C-12 : 165 mA (Max.) KM68257C-15 : 150mA (Max.) KM68257C-20 : 140 mA (Max.) • Single 5V±10% Power Supply • TTL Compatible Inputs and Outputs • I/O Tolerance & Compatible with 3.3V Device â , Input/Output Capacitance Cl/O Vi/o=OV - 8 PF * Note: Capacitance is sampled and not 100% tested. 7^414


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PDF KM68257C 32Kx8 KM68257C-12 KM68257C-15 150mA KM68257C-20 KM68257CP 28-DIP-300 KM68257CJ 28-SQJ-300 pin diagram of 7414 7414 fast TTL 7414 data KM68257CP-15 KM68257CJ KM68257CP-20 KM68257CJ20 KM68257C-20 KM68257C-15 KM68257C-12
Not Available

Abstract: No abstract text available
Text: N 7414 5 . . . N PACKAGE SN 74LS145 D OR N PACKAGE {TOP VIEW) oC • All Outputs Are Off , H H H H H H H H H H H H H H H H _i < > Z TTL , standard load, respectively. Inputs and outputs are entirely compatible for use with TTL or DTL logic , range (unless otherwise noted) TTL Devices Input clamp voltage iQ (o ff) MAX Off-state , ) SN74LS145 M AX TTL Devices PARAMETER 3 V 'I Input current at maxim um input voltage


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PDF SN54145, SN54LS145, SN7414S. SN74LS145 SN74145, 74LS145 80-mA 54LS145 74LS145
112 pin cache

Abstract: No abstract text available
Text: C Y M 7414 —^ r # C Y PR ESS CYM7425 = ^ ^ = = = ^ ^ ^ ^ eee = = 128K/256K Cache Module for the Intel™ 82420EX PCIset • 5V (±5%) power supply • TTL-compatible inputs/outputs • 128 Kbyte (CYM7424) or 256 Kbyte (CYM7425) secondary cache module organized as 32K by 32 or 64K by 32 • Ideal for Intel 486-based systems with the 82420EX , CYM7425 cache modules are TTL compatible and operate from a single 5V power supply. The contact pins


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PDF CYM7425 128K/256K 82420EX CYM7424) CYM7425) 486-based 112-pin 112 pin cache
1997 - RL 782 relay

Abstract: 2N7000 MOSFET Texas Instrument Tip Texas Instrument TISP rf10001 2N7000 series protection
Text: = 40 RFeed = 741.4 This feed resistance would result in a short circuit loop current ILsh of: ILsh , RFeed · 50 = = 741.4 · 50 = 37.07 k The division between RDC1 and RDC2 is determined by the described , . If interfacing with TTL or LSTTL, take precautions to ensure sufficient drive capability. The


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PDF EIA/TIA-46 S-164 RL 782 relay 2N7000 MOSFET Texas Instrument Tip Texas Instrument TISP rf10001 2N7000 series protection
SN74 schmitt trigger

Abstract: 6S81 SN74LS14 SDLS049 sn7450 K LS14 SN7414 SN74 SN54LS14 SN5414
Text: . TEXAS 75265 SN 5414, SN54LS14, SN 7414 , SN74LS14 HEX SCHMITT-TRIGGER INVERTERS TYPICAL APPLICATION DATA i I TTL SYSTEM SINE-WAVE OSCILLATOR i i 1>- TTL SYSTEM INTERFACE FOR SLOW INPUT WAVEFORMS


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PDF SDLS049 SN5414, SN54LS14, SN7414, SN74LS14 983-REVISED SN5414 SN54LS14 SN7414 SN74 schmitt trigger 6S81 SDLS049 sn7450 K LS14 SN74
FZH115B

Abstract: fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
Text: Digital I.C.s, 74INTEGRATED CIRCUITS DIGITAL TTL , 74LS & 74HC Series Quad 2-input NAND gate Quad 2-input NAND gate, open collector Quad 2-input NOR gate Quad 2-input NOR gate, open collector Hex inverter Hex inverter, O/C collector Hex inverter, Buffer 30V O/P Hex buffer 30V O/P Quad 2 , 7413 7414 7420 7437 7438 7440 7442 7443 7444 7447 7450 7451 7453 7454 7460 7470 , 7414 7420 7437 7438 7440 7442 7443 7444 7447 7450 7451 7453 7454 7460 7470 7472 7473


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PDF 74INTEGRATED Line-to-10 150ns 16-DIL 150ns 18-pin 250ns 300ns FZH115B fzh261 FZK105 FZH131 FZJ111 FZH115 FZH205 Multiplexer IC 74151 FZH265B 74LS104
54LS14

Abstract: No abstract text available
Text: Noise Imm unity S N 5 4 1 4 , S N 5 4 L S 1 4 . . . J OR W PACKAG E S N 7414 . . . N PACKAGE S N 7 4 , , SN7414, SN74LS14 HEX SCHMITT-TRIGGER INVERTERS schematics 'LS14 TTL Devices absolute maximum , V, v l = V T+ v 1= v T _ V | = 5 .5 V V j h = 2 .4 V V j|_ = 0 .4 V 0 .4 V mA 2 TTL , 0 .5 0 4 I| = 18 m A VC C =5V V cc = 5 v V C c = M IN . V C c = M IN , 2 TTL Devices v OH , · V f - - Hysteresis - m V F IG U R E 5 V j + - V j _ -H y s te re s is - m V TTL Devices


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PDF SN5414, SN54LS14, SN7414, SN74LS14 54LS14
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