The Datasheet Archive

Top Results (6)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
SN10KHT5543DWR SN10KHT5543DWR ECAD Model Texas Instruments OCTAL TTL TO ECL TRANSLATOR, TRUE OUTPUT, PDSO24, SO-24
SN65ELT21DGKR SN65ELT21DGKR ECAD Model Texas Instruments 5V PECL to TTL Translator 8-VSSOP -40 to 85
SN74FB2033RC SN74FB2033RC ECAD Model Texas Instruments 8-Bit TTL/BTL Registered Transceivers 52-QFP 0 to 70
SN74FB2031RCG3 SN74FB2031RCG3 ECAD Model Texas Instruments 9-Bit TTL/BTL Address/Data Transceiver 52-QFP 0 to 70
SN74FB2040RCG3 SN74FB2040RCG3 ECAD Model Texas Instruments 8-Bit TTL/BTL Transceivers 52-QFP 0 to 70
SN65ELT20DGKR SN65ELT20DGKR ECAD Model Texas Instruments 5V TTL to Differential PECL Translator 8-VSSOP -40 to 85

TTL 7408 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
TTL 7408

Abstract: TTL LS 7408 ls 7408 7408 AND GATE 3 input and gate 7408 7408 7408 TTL TTL 7408 AND propagation delay logic symbol 74LS08 74LS08 signetics
Text: Signetics I 7408 , LS08, S08 Gates Logic Products Quad Two-Input AND Gate Product Specification TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7408 15ns 16mA 74LS08 9ns 3.4mA , Manufacturer Signetics Logic Products Product Specification Gates 7408 , LS08, S08 ABSOLUTE MAXIMUM RATINGS , 1.5V for all other TTL families. Input Pulse Definition FAMILY INPUT PULSE REQUIREMENTS , Manufacturer Signetics Logic Products Product Specification Gates 7408 , LS08, S08 DC ELECTRICAL


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PDF 74LS08 74S08 N7408N, N74LS08N, N74S08N 10Sul 10LSul TTL 7408 TTL LS 7408 ls 7408 7408 AND GATE 3 input and gate 7408 7408 7408 TTL TTL 7408 AND propagation delay logic symbol 74LS08 74LS08 signetics
TTL 7408

Abstract: 7408 pin configuration 7408 TTL TTL 7408 AND propagation delay 74LS08 fan-out 7408 74S08 74ls08 7408 7408 AND GATE ls 7408 74LS08 signetics
Text: Signetics Logic Products 7408 , LS08, S08 Gates Quad Two-Input AND Gate Product Specification , DELAY TYPICAL SUPPLY CURRENT (TOTAL) 7408 15ns 16mA 74LS08 9ns 3.4mA 74S08 5ns 25mA ORDERING CODE , Signetics Logic Products Product Specification Gates 7408 , LS08, S08 ABSOLUTE MAXIMUM RATINGS (Over , - 1.5V lor all other TTL families. Test Circuit For 74 Totem-Pole Outputs Input Pulse Definition , Logic Products Product Specification Gates 7408 , LS08, S08 DC ELECTRICAL CHARACTERISTICS (Over


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PDF 74LS08 74S08 N7408N, N74LS08N, N74S08N 10Sul 10LSul 40fiA TTL 7408 7408 pin configuration 7408 TTL TTL 7408 AND propagation delay 74LS08 fan-out 7408 74S08 74ls08 7408 7408 AND GATE ls 7408 74LS08 signetics
IC AND GATE 7408

Abstract: TTL 7408 IC AND GATE 7408 pin configuration LM 7408 IC 7408 TTL 7408 AND propagation delay function IC 7408 74LS08 pin configuration IC PIN CONFIGURATION OF 74LS08 IC 7408 and function
Text: Sjgnetics I 7408 , LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPE 7408 74LS08 74S08 TYPICAL PROPAGATION DELAY 16ns 9ns 5ns TYPICAL SUPPLY CURRENT , , 1985 5 -2 4 853-0507 81501 Signetics Logic Products Product Specification Gates 7408 , >- 90% P O S IT IV E PU LSE VM VM - 1.3V for 74LS; VM - 1.5V for all other TTL families , , 1985 5-25 Slgnetics Logic Products Product Specification Gates 7408 , LS08, S08 DC


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PDF 74LS08 74S08 N7408N, N74LS08N, N74S08N N74S08N 10Sul 10LSul Wf07sa0s IC AND GATE 7408 TTL 7408 IC AND GATE 7408 pin configuration LM 7408 IC 7408 TTL 7408 AND propagation delay function IC 7408 74LS08 pin configuration IC PIN CONFIGURATION OF 74LS08 IC 7408 and function
74LS08 fan-out

Abstract: TTL 7408 TTL 74LS08 AND propagation delay 7408 TTL 8 input 7408 AND GATE 7408 signetics TTL TTL 7408 AND propagation delay 1 cl 7408 74Ls08 iec 7408 TTL
Text: Signetics I 7408 , LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPE 7408 74LS08 74S08 TYPICAL PROPAGATION DELAY 15ns 9ns 5ns TYPICAL SUPPLY CURRENT , , 1985 5-24 853-0507 81501 Signetics Logic Products Product Specification Gates 7408 , CIRCUITS AND WAVEFORMS VM - 1.3V fo r 74LS; V « - 1,5V fo r all other TTL families. T e s t C irc u , , 1985 5-25 Signetics Logic Products Product Specification Gates 7408 , LS08, S08 DC


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PDF 74LS08 74S08 N7408N, N74LS08N, N74S08N N74LS08/I, N74S08N 10Sul WF07560S 74LS08 fan-out TTL 7408 TTL 74LS08 AND propagation delay 7408 TTL 8 input 7408 AND GATE 7408 signetics TTL TTL 7408 AND propagation delay 1 cl 7408 74Ls08 iec 7408 TTL
TTL 7408 AND propagation delay

Abstract: 74LS08 fan-out 7408 AND GATE TTL 7408 3 input and gate 7408 ST 7408 74LS08 pin configuration TTL 74LS08 AND propagation delay 7408 ttl family logic symbol 74LS08
Text: Signetics I 7408 , LS08, S08 Gates Quad Two-Input AND Gate Product Specification Logic Products TYPE 7408 74LS08 74S08 TYPICAL PROPAGATION DELAY 15ns 9ns 5ns TYPICAL SUPPLY CURRENT , Product Specification Gates 7408 , LS08, S08 ABSOLUTE MAXIMUM RATINGS PARAMETER Vcc V in l|N , VM - 1.3V for 74LS; Vm " 1.SV for all other TTL families. T e st C ircu it Fo r 74 T otem -P ole O , Product Specification Gates 7408 , LS08, S08 DC ELECTRICAL CHARACTERISTICS PARAMETER (Over


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PDF 74LS08 74S08 N7408N, N74LS08N, N74S08N N74S08N 10Sul 10LSul F07580S TTL 7408 AND propagation delay 74LS08 fan-out 7408 AND GATE TTL 7408 3 input and gate 7408 ST 7408 74LS08 pin configuration TTL 74LS08 AND propagation delay 7408 ttl family logic symbol 74LS08
74573

Abstract: 74574 7486 XOR GATE 7486 full adder latch 74574 7408, 7404, 7486, 7432 7490 Decade Counter 74373 cmos dual s-r latch 2 bit magnitude comparator using 2 xor gates design a BCD counter using j-k flipflop
Text: Semiconductor Logic Device Cross-Reference Here is a comprehensive cross-reference of TTL and , UK ). Tables of both TTL and CMOS devices are provided along with tables grouping chips with the same functionality together. The following tables are available . TTL Device Summary CMOS Device , device is suitable for your purposes. 1 of 12 E&OE. TTL Device Summary Please click on a , 7404 7405 7406 7407 7408 7410 7411 7414 7420 7421 7427 7430 7432 7447 7448 7473 7474


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1995 - IC AND GATE 7408

Abstract: IC 7408 pin DIAGRAM OF IC 7408 IC 7408 application circuit function IC 7408 7408 voltage regulator T310 kemet 7408 ic diagram IC 7408 and function IC 7408 AND
Text: Logic Circuits'' C1995 National Semiconductor Corporation TL H 7408 gain for the regulator It , drives the discharge transistor to reset the timing capacitor Q2 and Q3 makeup the TTL compatible , 1 Schematic Diagram TL H 7408 ­ 1 for the input trigger if the trigger voltage is referred to , ) TL H 7408 ­ 2 FIGURE 2 Eliminating Initial Timing Cycle USING ELECTROLYTIC TIMING CAPACITORS , 7408 ­ 5 FIGURE 4 Cycle Interrupt The output of the timer can be wire ORed with a discrete


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PDF LM122 IC AND GATE 7408 IC 7408 pin DIAGRAM OF IC 7408 IC 7408 application circuit function IC 7408 7408 voltage regulator T310 kemet 7408 ic diagram IC 7408 and function IC 7408 AND
2000 - 7404 not gate

Abstract: lm 7404 LM 7408 RL2048dag 7408 12V lm 7404 and pin configuration rl1024dag-111 RETICON RL 1024 rl1024dag 7408 ttl family
Text: Video Output Relationship +5V TTL ¿T Clock TTL ¿SB Clock 7404 7404 +12V 7408 7404 CLK Q 7474 D Q 100 ½ 7404 7408 10 pF 100 ½ 10 pF Figure 10. Drive Circuit for D , its peripheral TTL circuit. Use of the scan buffer at higher speeds, greater than 5 MHz, is not , 1 LM 3 361 MP1 6519 14 3 6 TTL Output 10½ 10 5.1K 1K +5V 0.1 µF Q2 , TTL level control circuit to D Series CCPD devices. It will ensure that the ø1 and ø2 clock


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PDF RL0256DAG-111 RL0512DAG-111 RL1024DAG-111 RL2048DAG-111 RL0256DKQ-111 RL0512DKQ-111 RL1024DKQ-111 RL2048DKQ-111 775-OPTO 7404 not gate lm 7404 LM 7408 RL2048dag 7408 12V lm 7404 and pin configuration rl1024dag-111 RETICON RL 1024 rl1024dag 7408 ttl family
74LS08 Quad 2-Input AND Gates

Abstract: TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
Text: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) Logic/Connection Diagram'2' D10 D11 D12 D13 Std. TTL 54/74 1 0 ns/10 mW 9000 Series 8 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW E £ NOR Gates 1 2 3 4 5 6 7 8 ~c o o c S U. L o w Power Schottky 54LS/74LS 5 ns/2 mW 5 'a t 0) o > IS o (0 C L Quad 2-Input Quad 2-Input Triple 3-Input Dual 4-Input w , /74LS21 54/7417 54/7407 54/ 7408 54/7409 54 H 74 HOB - - 54S/74S08 54S/74S09 9S41 D15 D15 D16


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PDF ns/10 54H/74H ns/22 54S/74S ns/19 54LS/74LS 54LS/74LS02 54LS/74LS27 54LS/74LS260 74LS08 Quad 2-Input AND Gates TTL 74s32 TTL 7408 or 2 input 74Ls32 74LS11 and 74LS32 74ls32 quad 2-input OR gates 54LS TTL 7421 74LS 3-input NOR 74LS11
CI 7408

Abstract: 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
Text: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' S Tu a SI 54LS/74LS02 54/7402 — 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 — — — â , 11 Quad 2-lnput — 54LS/74LS08 54/ 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12 Quad 2-lnput (OC) â


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PDF ns/10 54LS/74LS 54H/74H ns/22 54S/74S ns/19 54LS/74LS02 54S/74S02 54LS/74LS27 CI 7408 74LS series logic gates CI 7402 TTL 7408 7408 and 7408 TTL CI 74LS08 TTL 7486 7408 CI 74LS86
IC 7486

Abstract: CI 74LS08 TTL 7408 IC TTL 7432 7408 TTL TTL 74ls08 7408 ic diagram IC TTL 7402 IC 7432 74LS32 TTL
Text: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E £ Function'1' 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic/Connection Diagram'2' Packages'3' NOR Gates 1 Quad 2-lnput 54LS/74LS02 54/7402 — 54S/74S02 D10 3I,6A,9A 2 Quad 2-lnput 9015 — — — — D11 4L,6B 3 Triple , /74LS08 54/ 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12 Quad 2-lnput (OC) — 54LS/74LS09 54/7409 — 54S


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PDF ns/10 54LS/74LS 54H/74H ns/22 54S/74S ns/19 54LS/74LS02 54S/74S02 54LS/74LS27 IC 7486 CI 74LS08 TTL 7408 IC TTL 7432 7408 TTL TTL 74ls08 7408 ic diagram IC TTL 7402 IC 7432 74LS32 TTL
Z427

Abstract: FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02
Text: FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) c o 5S agic/Conne Diagram Std. TTL 54/74 1 ns/10 mW lig h Speed Schottky 54S/74S ns/19 mW ig h Speed 54H/74H ns/22 mW 9000 Series ns/10 mW ~'c o u c 3 U. D w Power Schottky ILS/74LS ns/2 mW 5 < 0 o (0 £L < D at E a > NOR Gates 1 2 3 4 5 6 7 8 C O - 1 IO U) O X to x n _i Quad 2-Input Quad 2-Input Triple 3-Input Dual , -Input Triple 3-Input (OC) Dual 4-Input - - - - 54/7417 54/7407 54/ 7408 54/7409 - - - -


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PDF ns/10 54S/74S ns/19 54H/74H ns/22 ILS/74LS 54LS/74LS02 54S/74S02 54LS/74LS27 Z427 FL 9014 TTL 7409 TTL 7486 74LS32 74ls86 TTL 74s32 74LS08 74LS11 74LS02
9N08

Abstract: TTL 7408 7408 circuit diagram 7408 logic diagram 7408 AND Gate 2 input CIRCUIT DIAGRAM 7408 7408 ttl gate 3 input and gate 7408 ScansUX998 9N08/5408DM
Text: FAIRCHILD TTL /SSI . 9N08/5408, 7408 QUAD 2-INPUT AND GATE logic and connection diagram schematic diagram (EACH GATE) dip (TOP VIEW) ritiifinrrnm flatpak (TOP VIEW) vcc O- rPi ra Ui¿JL¿JLIL¿IL¿JUI GND Positive logic: Y = AB inputs a o- J7X < -W-r< Î1Î < i < -O gnd Component values shown are typical. recommended operating conditions PARAMETER 9N08XM/5408XM 9N08XC/7408XC UNITS MIN. TYP. MAX. MIN. TYP. MAX. Supply Voltage Vqq 4.5 5.0 5.5 4.75 5.0 5.25 Volts Operating Free-Air Temperature


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PDF 9N08/5408, 9N08XM/5408XM 9N08XC/7408XC 9N08 TTL 7408 7408 circuit diagram 7408 logic diagram 7408 AND Gate 2 input CIRCUIT DIAGRAM 7408 7408 ttl gate 3 input and gate 7408 ScansUX998 9N08/5408DM
TTL LS 7407

Abstract: CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
Text: Lil Lil GND 13-43 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns , €” D15 3I,6A,9A 11 Quad 2-lnput — 54LS/74LS08 54/ 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12 Quad 2


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PDF 54H/74H30 54S/74S30, 54LS/74LS30 54S/74S133, 54LS/74LS133 54S/74S134 54S/74S02, 54LS/74LS02, 54LS/74LS28 74LS33 TTL LS 7407 CI 7407 CI 7402 TTL LS 7402 ls 7408 TTL 74s02 CI 74LS02 74LS27 TTL 7425 TTL 74ls02
CI 74LS08

Abstract: 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
Text: ! li! li] li] GND 13-44 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 , €” D15 3I,6A,9A 11 Quad 2-lnput — 54LS/74LS08 54/ 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12 Quad 2


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PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, CI 74LS08 7432 TTL fairchild TTL 7421 74LS21 ttl 7432 TTL 74ls32 TTL 7409 TTL 7486 TTL 74ls86 TTL 7432 fairchild
CI 7408

Abstract: CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and
Text: ] li] LÌ] li] liJ LJ GND 13-51 FAIRCHILD DIGITAL TTL SSI FUNCTIONS (Cont'd) E a o o e 3 LL 9000 Series 8 ns/10 mW Low Power Schottky 54LS/74LS 5 ns/2 mW Std. TTL 54/74 10 ns/10 mW High , — — D15 3I,6A,9A 11 Quad 2-lnput — 54LS/74LS08 54/ 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12


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PDF 54LS/74LS13 54LS/74LS125 54LS/74LS126 54LS/74LS365 54LS/74LS366 54LS/74LS367 54LS/74LS368 I4S09 54LS/74LS11 54H/74H11 CI 7408 CI 74LS08 TTL 74ls21 74LS21 7407 connection diagram 54LS CI 7413 7432 TTL fairchild 74LS125 7408 and
7411 pin diagram

Abstract: TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
Text: FAIRCHILD LOGIC/CONNECTION DIAGRAMS D93 54LS/74LS379 1 A 4 5 12 13 | E D0 Di D2 D3 CP Oo Qi Q2 03 lltlfltl 3 2 6 7 11 10 14 15 Vcc = Pin 16 GND = Pin 8 DIGITAL - TTL D94 9386 , SR MR Oo Oi 02 03 TT -19 9 8 16 15 14 13 Vcc = Pin 20 GND = Pin 10 13-55 FAIRCHILD DIGITAL TTL , ns/2 mW Std. TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 , / 7408 54H/74H08 54S/74S08 D16 3I,6A,9A 12 Quad 2-lnput (OC) — 54LS/74LS09 54/7409 — 54S/74S09 D16


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PDF 54LS/74LS379 74LS266, 54LS/74LS386 54LS/74LS398 54LS/74LS399 54LS/74LS574 54LS/74LSS02 O04S09 54LS/74LS11 54H/74H11 7411 pin diagram TTL 7408 DS 7409 74LS574 CI 7408 7407 connection diagram 74LS386 TTL 7408 DIAGRAMS 74LS08 PIN CI 74LS08
HA17408G

Abstract: HA17408 TTL 7408 7408 CMOS TTL 7408 AND power dissipation 1408 HA17408P cmos 7408 HA1740
Text: H A17408P,HA17408G Id-bit Multiplying Digital-to-Analog Converter HA1 7408 is a 8-bit monolithic D/A converter, with reference current amplifier and a ladder resistor of R-2R, and eight high speed current switches built in. By establishing a reference current and a reference resistor, it is possible to change the maximum output current according to the applications. And it is compatible with , . Compatible with TTL , CMOS logic. Reference Supply Voltage is; Vcc 58 +5.0V, VEE = 5.0V, -15.0V Output


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PDF A17408P HA17408G MC1508/1408. 992mA. HA17408G HA17408 TTL 7408 7408 CMOS TTL 7408 AND power dissipation 1408 HA17408P cmos 7408 HA1740
logic diagram of 7432

Abstract: CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
Text: E82 4L.6B •105XX and 106XX = Military temperature range 9-21 FAIR CHILD DIGITAL TTL SSI , . TTL 54/74 10 ns/10 mW High Speed 54H/74H 6 ns/22 mW High Speed Schottky 54S/74S 3 ns/19 mW Logic , 10 Hex Buffer (OC/30 V) — — 54/7407 — — D15 3I,6A,9A 11 Quad 2-lnput — 54LS/74LS08 54/ 7408


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PDF 54H/74H08, 54S/74S08, 54LS/74LS08 54S/74S09, 54LS/74LS09 54H/74H21 54LS/74LS21 54S/74S32 54LS/74LS32 54H/74H11, logic diagram of 7432 CI 7408 TTL 7486 7408 s.i 7408 FL 9014 7486 nor CI 74LS08 7408 fairchild 7432 TTL
Not Available

Abstract: No abstract text available
Text: . J OR W PA CKA G E SN 7408 . . . J OR N PA CKA G E S N 7 4 L S 0 8 , S N 7 4 S 0 8 . . . D , J OR , TTL Devices IN P U T S L >- Q O > Z Z « <3 n logic sym bol t < » N C — No in , , SN54S08, SN7408, SN74LS08, SN74S08 QUADRUPLE 2 INPUT POSITIVE AND GATES TTL Devices 'SQ8 , QUADRUPLE 2-INPUT POSITIVE-AND GATES recommended operating conditions SN 7408 SN 5408 U N IT M IN , 'C C L V CC = M A X. V j =0 V 20 33 20 33 TTL Devices PA RA M ETER


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PDF SN5408, SN54LS08, SN54S08, SN7408, SN74LS08, SN74S08 54S08
7408 texas

Abstract: TTL 7408 54ls08 74LS 7408
Text: 7408 . . . J OR N PACKAGE SN 74LS 08, S N 74S 08 . . . D. J OR N PACKAGE {TOP VIEW) ia ib C 1 0 , - , 2-41 POST OPFiCE BOX 6 5 5 0 1 2 · DALLAS TEXAS 75 26 5 TTL Devices NC ]5 , schematics (each gate) '08 'LS08 TTL Devices R e s is to r v a lu e s a re nom >nal. 'SOB absolute , NOM 5 MAX 5.5 M IN 4 75 2 0.8 - 0.8 16 70 S N 7408 U N IT NOM 5 MAX 5 25 V V V mA mA cC electrical , t r u m e n t s 2-43 TTL Devices SN54LS08, SN74LS08 QUADRUPLE 2-INPUT POSITIVE AND GATES


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PDF SN5408, SN54LS08, SNS4S08, SN7408, SN74LS08, SN74S08 SN54S08 7408 texas TTL 7408 54ls08 74LS 7408
ic ttl 7408

Abstract: 74LS08 texas instruments TTL 7408 74s08 7408 IC and TTL SN74LS08
Text: . J OR W P A C K A G E SN 7408 . J OR N PACKAG E S N 74LS 08, S N 7 4 S 0 8 . . . D, J OR N PACKAG E , - ii- i r - i i - i > Û CM 2 O O 2 > < co co 3 TTL DEVICES -47 NC - No internal connection , 2-INPUT POSITIVE-AND GATES schematics (each gate) S08 TTL DEVICES R esistor values are nom , IN 4 .7 5 2 0 .8 - 0 .8 16 70 SN 7408 U N IT NOM 5 M AX 5 .2 5 V V V mA mA °c electrical , , Texas ^ In s t r u m e n t s POST OF F :C E BOX 225C12 · D A L L A S T S X A S 75265 TTL DEVICES


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PDF SN5408, SN54LS08, SN54S08, SN7408, SN74LS08, SN74S08 SN54S08 ic ttl 7408 74LS08 texas instruments TTL 7408 74s08 7408 IC and TTL SN74LS08
7408 CMOS

Abstract: TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
Text: intervals along the row and column of the chip, also consist of I/O pads which are compatible of CMOS or TTL , Toggling Frequency: 40MHz • High density 3.5 micron geometries • TTL and CMOS I/O compatibility â , OF LS TTL TTL Pari No. Count TTL Part No. Count TTL Part No. Count TTL Part No. Count 7400 4 7470 , 20 74158 23 74265 7 7407 6 7477 14 74159 18 74266 10 7408 6 7478 20 74160 68 74273 50 7409 6 7480


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PDF KG10000 7408 CMOS TTL 7452 ttl 74183 LS 74141 7408, 7404, 7486, 7432 7404 7408 7432 TTL 74289 74106 CMOS 4017 series ttl 74395
RL2048dag

Abstract: RETICON RL 1024 STR 6656 RETICON RL0512DAG011 RL0512DKQ RL0512DAG RL2048DAG011 rl1024dag RL1024DAG-011
Text: required interface between the device's scan buffer output and its peripheral TTL circuit. Use of the scan , Output Circuit +12V> Buftered Video Output Odd ► Buttered Video Output Even ton AM,—< +12V TTL , will interface the TTL level control circuit to D Series CCPDdevices. It will ensure that the 01 and 02 , Crossing and Video Output Relationship H OLK Q 7474 _ D Q TTL 0j Clock )- 0.1 |jF 0.1 uF TTL 0SB Clock , 1K -r^ H1.1—i 7408 )-i-Wk-*■-JU 1K -Cx- ^7404 1 -aj L '_j Device 1A 1/2DS0026 "SB


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PDF 1993EG 00045AA RL2048dag RETICON RL 1024 STR 6656 RETICON RL0512DAG011 RL0512DKQ RL0512DAG RL2048DAG011 rl1024dag RL1024DAG-011
1994 - TTL 7408

Abstract: LT319A LT319AH 7408 TTL LM319 pin diagram LM119 LT319AN LT119 LM119H LM319
Text: ­ TTL OUTPUT 2 OUTPUT VOLTAGE (V) VUT 2mV 4 3 5mV 20mV 2 8 + 6 , 5V 100pF 9 10 ­ 680 6 1/2 LT319A 2k 8 5V INPUT PULSE + 7408 2 5V , 1k 3.9k 15k 1k CONVERT COMMAND INPUT ( TTL ) *1% FILM ­5V POLYSTYRENE, MOUNT , TYPICAL APPLICATIONS 5kHz to 2MHz VF Converter 5V 50pF POLYSTYRENE 3.3k 5V 5V 330 TTL OUT


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PDF LT119A/LT319A LM119/LM319 LT119A LT119A 254mm) TTL 7408 LT319A LT319AH 7408 TTL LM319 pin diagram LM119 LT319AN LT119 LM119H LM319
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