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LTC1596-1ACSW#TR Linear Technology LTC1596 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 16; Temperature Range: 0°C to 70°C
LTC1596BISW Linear Technology LTC1596 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 16; Temperature Range: -40°C to 85°C
LTC1595AIS8#PBF Linear Technology LTC1595 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LTC1595CCS8#TRPBF Linear Technology LTC1595 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LTC1596-1CISW#PBF Linear Technology LTC1596 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 16; Temperature Range: -40°C to 85°C
LTC1596BCSW#TRPBF Linear Technology LTC1596 - Serial 16-Bit Multiplying DACs; Package: SO; Pins: 16; Temperature Range: 0°C to 70°C

TMS320C54x program to multiply two q15 numbers Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - TMS32C54X

Abstract: matlab TMS320 rfft SPRA480 54xdsp TMS320C54x fir and iir filter applications SPR012 Assembly Programming Guide c code for convolution TMS320C54x program to multiply two q15 numbers TMS320C54X IFFT
Text: ). 59 fltoq15 Float to q15 Conversion , . 107 q15tofl Q15 to Float Conversion , . 131 4 TMS320C54x DSPLIB User's Guide SPRA480 Introduction Introduction to the TI , destination operand to conserve memory. 10 TMS320C54x DSPLIB User's Guide SPRA480 Calling a , used to convert between floating point fractional values and Q15 fractional values. However, in many


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PDF TMS320C54x SPRA480 TMS32C54X C5000 TMS32C54X matlab TMS320 rfft SPRA480 54xdsp TMS320C54x fir and iir filter applications SPR012 Assembly Programming Guide c code for convolution TMS320C54x program to multiply two q15 numbers TMS320C54X IFFT
2000 - Q15-format

Abstract: SPRA480B TMS320C54X IFFT LMS adaptive matlab code iir32 rfft LMS adaptive filter matlab C541 C5000 NX 38
Text: ).40 fltoq15 Float to q15 Conversion , .77 Q15 to Float Conversion , q15tofl DSPLIB functions are used to convert between floating point fractional values to Q15 fractional , ) Refer to the TMS320C54x Optimizing C Compiler User's Guide if more in-depth explanation is required , Accumulator A). Refer to the TMS320C54x Optimizing C Compiler User's Guide if a more in-depth explanation is


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PDF SPRA480B TMS320C54x C5000 TMS320C54xTM TMS320C54x Q15-format SPRA480B TMS320C54X IFFT LMS adaptive matlab code iir32 rfft LMS adaptive filter matlab C541 NX 38
2000 - fft matlab code using 8 point DIT butterfly

Abstract: SPRA480B Q15-format fft matlab code using 16 point DFT butterfly q15 format 54xdsp LMS matlab TMS320C54x fir filter applications LMS adaptive filter matlab SPRU131
Text: ).40 fltoq15 Float to q15 Conversion , .77 Q15 to Float Conversion , q15tofl DSPLIB functions are used to convert between floating point fractional values to Q15 fractional , ) Refer to the TMS320C54x Optimizing C Compiler User's Guide if more in-depth explanation is required , Accumulator A). Refer to the TMS320C54x Optimizing C Compiler User's Guide if a more in-depth explanation is


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PDF SPRA480B TMS320C54x C5000 TMS320C54xTM TMS320C54x fft matlab code using 8 point DIT butterfly SPRA480B Q15-format fft matlab code using 16 point DFT butterfly q15 format 54xdsp LMS matlab TMS320C54x fir filter applications LMS adaptive filter matlab SPRU131
1997 - TMS320C54x program to multiply two q15 numbers

Abstract: tms320c54x floating point processor 0X0002 TMS320 TMS320C54x fir filter applications
Text: running the program with two different sets of inputs. Firstly, pure 13 bit linear inputs were used to , : MIPS & Data Program Requirements to Run EEC for One Voice Channel.9 Echo Cancellation Software for the TMS320C54x v Contents vi Literature Number: BPRA054 The Program Echo Cancellation Software for the TMS320C54x ABSTRACT This application note describes how to realize an , Surface Before reporting any results let's define two quantities usually used to describe the


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PDF TMS320C54x BPRA054 0X2001, 0X0001, TMS320C54x program to multiply two q15 numbers tms320c54x floating point processor 0X0002 TMS320 TMS320C54x fir filter applications
1997 - TMS320C54x program to multiply two q15 numbers

Abstract: Modified LMS Algorithm 0X0002 TMS320 SIGMA 226 bt 1696 sigma as 226
Text: running the program with two different sets of inputs. Firstly, pure 13 bit linear inputs were used to , : MIPS & Data Program Requirements to Run EEC for One Voice Channel.9 Echo Cancellation Software for the TMS320C54x v Contents vi Literature Number: BPRA054 The Program Echo Cancellation Software for the TMS320C54x ABSTRACT This application note describes how to realize an , Surface Before reporting any results let's define two quantities usually used to describe the


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PDF TMS320C54x BPRA054 0X2001, 0X0001, TMS320C54x program to multiply two q15 numbers Modified LMS Algorithm 0X0002 TMS320 SIGMA 226 bt 1696 sigma as 226
2001 - SXM 08

Abstract: SPRU518 Architecture of TMS320C54X with diagram GSM modem M10 time division speech scrambler SPRU147 k875 block diagram of of TMS320C54X speech scrambler Viterbi Trellis Decoder texas
Text: . . . . . . . . . . . . . 3-25 Multiply Two Floating-Point Numbers . . . . . . . . . . . . . . . . , data or program memory, two options are available: The first one is to use one of the C54x , conventions. - The device number TMS320C54x is often abreviated as C54x. - Program listings, program , Guide (literature number SPRU137) describes how to install the TMS320C54x simulator and the C source , (literature number SPRU147) describes how to install the TMS320C54x assembly language tools and the C


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PDF TMS320C54x SPRU538 SPRU518) SXM 08 SPRU518 Architecture of TMS320C54X with diagram GSM modem M10 time division speech scrambler SPRU147 k875 block diagram of of TMS320C54X speech scrambler Viterbi Trellis Decoder texas
1998 - TMS320C54x program to multiply two q15 numbers

Abstract: spra454 4 bit left shift circuit for dsp iir filter applications 32x16-bit tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 iIR FILTER implementation in TMS320C54x
Text: multiply two unsigned numbers or two signed numbers as well as signed/unsigned numbers [4]. The `C54x has , n-bit numbers are multiplied, 2n bits are required to store the result. It is possible to use two , -1 to (1 - 2 -15 ) using Q15 format). Firstly, extended-precision 16x32-bit (or 32x16-bit) and 32x32 , multiplying two signed 16-bit numbers in fractional mode (when the FRCT bit of the ST1 register is set the , buses). The `C54x can generate up to two data memory addresses per cycle. Other advantages of the C54x


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PDF TMS320C54x SPRA454 TMS320C54x program to multiply two q15 numbers spra454 4 bit left shift circuit for dsp iir filter applications 32x16-bit tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 iIR FILTER implementation in TMS320C54x
1997 - NON LINEAR Quantizer

Abstract: g723 ADPCM algorithm ez 948 SP 1191 PCM sampling q encoder TDA audio power amplifier RCA 467 MAS 10 RCD K-two TMS320C54x program to multiply two q15 numbers
Text: word should be reduced to a 4-bit ADPCM word, correspondingly reducing the bit flow by a factor of two , encoding and decoding algorithms. Two modifications have been made, relating to the printed text of the , used to assign five, four, three, or two binary digits, respectively, to the value of the difference signal for transmission to the The Implementation of G.726 ADPCM on TMS320C54x DSP 3 decoder , used for the CCITT ADPCM algorithm: · The two accumulators often make it possible to perform parallel


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PDF TMS320C54x BPRA053 TMS320 NON LINEAR Quantizer g723 ADPCM algorithm ez 948 SP 1191 PCM sampling q encoder TDA audio power amplifier RCA 467 MAS 10 RCD K-two TMS320C54x program to multiply two q15 numbers
1997 - NON LINEAR Quantizer

Abstract: Implementation of G.726 on TMS320C54x 15S4 bpra TMS320 Family volume 1 TMS320C54x program to multiply two q15 numbers C541 VOCODER TLC320AC01 BPRA053
Text: word should be reduced to a 4-bit ADPCM word, correspondingly reducing the bit flow by a factor of two , encoding and decoding algorithms. Two modifications have been made, relating to the printed text of the , used to assign five, four, three, or two binary digits, respectively, to the value of the difference signal for transmission to the The Implementation of G.726 ADPCM on TMS320C54x DSP 3 decoder , used for the CCITT ADPCM algorithm: · The two accumulators often make it possible to perform parallel


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PDF TMS320C54x BPRA053 TMS320 NON LINEAR Quantizer Implementation of G.726 on TMS320C54x 15S4 bpra TMS320 Family volume 1 TMS320C54x program to multiply two q15 numbers C541 VOCODER TLC320AC01 BPRA053
1998 - tms320 54x mcbsp

Abstract: tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 lc542 ST c542 VC5416 SPRA017 SPRA016 TMS320C54x transmitter TMS320C54x pin details
Text: to program instructions and data, providing the high degree of parallelism. Two reads and one write , , literature number SPRU172. And for more information on extended program memory, refer to the TMS320C54x DSP , addressing mode for up to 8M × 16-bit maximum addressable external program space J Single-instruction , MAC Unit PB Program Bus Barrel Shifter T Register ALU S COMP TRN TC 8 TMS320C54x , . 1.2.10 Temporary Register (TREG) The TREG is used to hold one of the multiplicands for multiply and


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PDF TMS320C54xt SPRU307A TMS320C54x tms320 54x mcbsp tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 lc542 ST c542 VC5416 SPRA017 SPRA016 TMS320C54x transmitter TMS320C54x pin details
1998 - 4 bit barrel shifter circuit diagram

Abstract: dsp processor Architecture of TMS320C54X pdf Architecture of TMS320C54X Architecture of TMS320C54X with diagram dsp processor Architecture of TMS320C54X tms320 54x mcbsp tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 lc541 LC549 TMS 320 C 6X processor datasheet
Text: to program instructions and data, providing the high degree of parallelism. Two reads and one write , , literature number SPRU172. And for more information on extended program memory, refer to the TMS320C54x DSP , addressing mode for up to 8M × 16-bit maximum addressable external program space J Single-instruction , MAC Unit PB Program Bus Barrel Shifter T Register ALU S COMP TRN TC 8 TMS320C54x , . 1.2.10 Temporary Register (TREG) The TREG is used to hold one of the multiplicands for multiply and


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PDF TMS320C54xt SPRU307A TMS320C54x 4 bit barrel shifter circuit diagram dsp processor Architecture of TMS320C54X pdf Architecture of TMS320C54X Architecture of TMS320C54X with diagram dsp processor Architecture of TMS320C54X tms320 54x mcbsp tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 lc541 LC549 TMS 320 C 6X processor datasheet
1997 - Architecture of TMS320C54X with diagram

Abstract: TMS320C54X addressing modes with examples TMS320C54X addressing modes Architecture and features of TMS320C54X block diagram of of TMS320C54X dsp processor Architecture of TMS320C54X down Architecture of TMS320C54X features of tms320c54x Instructions of TMS320C54X dsp processor Architecture of TMS320C54X
Text: such as two accumulators and dual addressing modes that support the design goals. The TMS320C54x , Internally, there are several buses: q The P-Bus, used to fetch instructions from program memory, is also connected to the multiplier to provide an input from program memory. q A dual data-bus , of coefficients and AR3 points to a data array, the multiply can look like: MPY *AR2,*AR3,A , auxiliary registers, result in a clean instruction set. With the TMS320C54x , there is no need to manage


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PDF TMS320C54x SPRA182 Architecture of TMS320C54X with diagram TMS320C54X addressing modes with examples TMS320C54X addressing modes Architecture and features of TMS320C54X block diagram of of TMS320C54X dsp processor Architecture of TMS320C54X down Architecture of TMS320C54X features of tms320c54x Instructions of TMS320C54X dsp processor Architecture of TMS320C54X
1997 - dsp processor Architecture of TMS320C54X

Abstract: Architecture of TMS320C54X with diagram Architecture of TMS320C54X Architecture and features of TMS320C54X dsp processor Architecture of TMS320C54X down block diagram of of TMS320C54X TMS320C54X addressing modes features of tms320c54x TMS320C54X addressing modes with examples TMS320C54x family
Text: such as two accumulators and dual addressing modes that support the design goals. The TMS320C54x , from program memory, is also connected to the multiplier to provide an input from program memory. A , of coefficients and AR3 points to a data array, the multiply can look like: MPY *AR2,*AR3,A , auxiliary registers, result in a clean instruction set. With the TMS320C54x , there is no need to manage , the P-bus to read one operand enables coefficients to be stored in program memory. For example, if


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PDF TMS320C54x SPRA182 dsp processor Architecture of TMS320C54X Architecture of TMS320C54X with diagram Architecture of TMS320C54X Architecture and features of TMS320C54X dsp processor Architecture of TMS320C54X down block diagram of of TMS320C54X TMS320C54X addressing modes features of tms320c54x TMS320C54X addressing modes with examples TMS320C54x family
1996 - BSP 542

Abstract: Soft development of TMS320C54x application system tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 BH-16 SOT TMS320C54x, instruction set "Base Transceiver Station" TMS320LC546A TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit BSP 542 Soft development of TMS320C54x application system tms320c54x MEMORY MAPPED REGISTERS ST0 ST1 BH-16 SOT TMS320C54x, instruction set "Base Transceiver Station" TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
1996 - LC541

Abstract: TMS320LC546A TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit LC541 TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
1996 - BSP 542

Abstract: IC 541 TMS320LC546A TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit BSP 542 IC 541 TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
1996 - TMS320C54x

Abstract: TMS320LC546A TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320C54x TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
1996 - BSP 542

Abstract: TMS320VC54x block diagram of of TMS320C54X TMS320LC546A TMS320C541 LC549 C542 C541 IFR 740 TMS320LC545A
Text: to program instructions and data, providing the high degree of parallelism. Two reads and one write , program memory or program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to , , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data Memory , words of ROM can be configured as program memory or program /data memory. § Two standard , (A15­A0) are multiplexed to address external data/ program memory or I/O. A15­A0 are placed in the


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit BSP 542 TMS320VC54x block diagram of of TMS320C54X TMS320LC546A TMS320C541 LC549 C542 C541 IFR 740 TMS320LC545A
1996 - TMS320VC54

Abstract: TMS320LC546A TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320VC54 TMS320LC546A TMS320LC545A
1996 - TMS320LC546A

Abstract: TMS320LC545A
Text: program /data memory. | One standard and one BSP k One TDM and two BSPs h Refer to separate data sheet for , Shifter and Two Independent 40-Bit Accumulators 17- × 17-Bit Parallel Multiplier Coupled to a 40 , Words Program , 64K Words Data, and 64K Words I/O) On-Chip ROM with Some Configurable to Program /Data , flexibility and speed of these DSPs. Separate program and data spaces allow simultaneous access to program , be configured as program memory or program /data memory. § Two standard (general-purpose) serial ports


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PDF TMS320C54x, TMS320LC54x, TMS320VC54x SPRS039C 16-Bit 40-Bit 17-Bit TMS320LC546A TMS320LC545A
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