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TMS-SCE-1-2.0-4 TE Connectivity Ltd TMS-SCE-1-2.0-4
TMS-SCE-1-2.0-S1-9 (5134530001) TE Connectivity (5134530001) TMS-SCE-1-2.0-S1-9
TMS-SCE-2-2.0-9 (577739-000) TE Connectivity (577739-000) TMS-SCE-2-2.0-9
TMS-SCE-1/4-2.0-9 (6641710001) TE Connectivity (6641710001) TMS-SCE-1/4-2.0-9
TMS-SCE-1K-1-2.0-9 (0253350001) TE Connectivity (0253350001) TMS-SCE-1K-1-2.0-9
TMS-SCE-1K-2-2.0-4 (6194590001) TE Connectivity (6194590001) TMS-SCE-1K-2-2.0-4
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Not Available

Abstract: No abstract text available
Text: TMS-SCE and TMS-SCE 2X TMS-SCE (Black) TMS- 90-SCE STANDARD RIBBON 1966-RIBBON TMS-RJS-RIBBON , HLXNEL* HPK HT-SCE HT-SCE (Black) HX-SCE* NBC-SCE RPS TMS-SCE and TMS-SCE 2X TMS-SCE (Black) TMS- 90-SCE , -T200 1330-3300-101TT 1330-0607-T200 * HX-SCE, HLXNEL & TMS- 90-SCE for T212M only Note: T208M-Printer has been , ) TMS- 90-SCE UV-SCE STANDARD RIBBON 1330-3300-10 1966-RIBBON TMS-RJS-RIBBON-4DSCE (For Optimal , and TMS-SCE 2X TMS-SCE (Black) TMS- 90-SCE UV-SCE STANDARD RIBBON 1330-3300-10 1966


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SSY20

Abstract: SF828 funkamateur VEB mikroelektronik BUX 127 SF126 SF 127 SF819 SF128 SF 829 B
Text: ) 60 40 600 >250 2 BSY 34 SC 116 pnp NF 750 -20 -20 -100 90 2,5 1 - SC 117 pnp NF 750 -30 -30 -100 90 2,5 1 - SC 118 pnp NF 750 -60 -60 -100 90 2,5 1 - SC 119 pnp NF 750 -80 -80 -100 90 2,5 1 - SC 206 , 350 1,2 3 BC 309 SCE 237 npn NF, A (SMD) 150 50 45 100 185 <10 5 BC 847/BCX 70 SCE 238 npn NF (SMD) 150 30 20 100 185 <10 5 BC848/BCW31 SCE 239 npn NF (V) (SMD) 150 30 20 100 185 < 4 5 BC 849/BCF 32 SCE 307 pnp NF (SMD) 150 -50 -45 -100 145 <10 5 BC857/BCW69 SCE 308 pnp NF (SMD) 150 -30 -25 -100 145 <10


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sf 818 d

Abstract: NPN 337 SU 179 sf 819 d Funkamateur SF 127 SMD NF sf 118 d sd 339 NF 847 G
Text: ) (1,5) (-1,5) * [MHz] 250 90 90 90 90 300 300 145 145 161 175 350 350 350 185 , SC 309 pnp NF (V), A 250 -30 -25 SCE 237 npn NF, A, SMD 150 50 45 SCE 238 npn NF, SMD 150 30 20 SCE 239 npn NF (V), SMD 150 30 20 SCE 307 pnp NF, SMD 150 -50 -45 SCE 308 pnp NF, SMD 150 -30 -25 SCE 309 pnp NF, SMD 150 -30 -25 SCE 535 npn NF, SMD 800 45 45 SCE 536 pnp NF, SMD 800 -45 -45 SCE 537 npn NF, SMD 800 60 60 SCE 538 pnp NF, SMD 800


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1999 - LRS1327

Abstract: LRS1344 64FBGA
Text: DQ8 DQ0 DQ1 G F-A18 F-A17 A7 A6 A3 A2 A1 S-CE A5 A4 A0 F-CE , Operating temperature: -40°C to +85°C · Flash Memory ­ Access time (MAX.): 90 ns ­ Operating current (MAX , ,288 × 16-bit flash memory and 65,536 × 16-bit static RAM in one package. S-CE S-OE 1M (x16 , Inputs (Flash) Input F-CE Chip Enable Input (Flash) Input S-CE Chip Enable Input (SRAM , F-OE F-WE S-CE S-OE S-WE S-LB S-UB DQ0 - DQ15 NOTES Read Standby L H L H


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PDF LRS1327/LRS1344 64-BALL LRS1327 LRS1344 F-A16 F-A18 F-A17 SMA99086 64FBGA
2001 - MX 128 D 911 h

Abstract: ic 74192 pin configuration SCE 209 74192 internal diagram 38544 STE2001 STE2000 STE2001DIE1 C127 74192 pin configuration
Text: SERIAL SCE SDIN SCLK SD/C October 2001 This is preliminary information on a new product , Interface Clock SCE 209 I Serial Interface ENABLE. When Low the Incoming Data are Clocked In , VDD = 4.5V 70 ns TCYC TS2 SCE setup time 50 ns TH2 SCE hold time 50 ns SCE minimum high time 60 ns 60 ns TPWH2 TH5 SCE start hold time TS3 SD , the negative edge of SCE 9. For bus line loads Cb between 100 and 400pF the timing parameters must be


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PDF STE2001 MX 128 D 911 h ic 74192 pin configuration SCE 209 74192 internal diagram 38544 STE2001 STE2000 STE2001DIE1 C127 74192 pin configuration
ic 74192 pin configuration

Abstract: 46192 ic 74192 38544 SCE 209 STE2000 ic 74192 pin diagram f 74544 C5875 STE2001DIE2
Text: SERIAL SCE SDIN SCLK SD/C October 2001 This is preliminary information on a new product , Interface Clock SCE 209 I Serial Interface ENABLE. When Low the Incoming Data are Clocked In , VDD = 4.5V 70 ns TS2 SCE setup time 50 ns TH2 SCE hold time 50 ns SCE minimum high time 60 ns 60 ns TPWH2 TH5 SCE start hold time TS3 SD/C setup time , SCE 9. For bus line loads Cb between 100 and 400pF the timing parameters must be linearly


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PDF STE2001 ic 74192 pin configuration 46192 ic 74192 38544 SCE 209 STE2000 ic 74192 pin diagram f 74544 C5875 STE2001DIE2
SCF 5784

Abstract: 5583A 7135 led driver SCD 5583A Q68000-A8902 SLG 2016 D 5542Q DLG 2416 2114s SCF 5741
Text: 5744Q HEG* SCE 5745Q orange 4.7 19.91 x 10.54 Serial with 90 degree form single inline , Q68000A8637 9 Q68000A8638 Q68000A8639 * HEG = high efficiency green 126 For information , ASCII character ROM, 16 user definable characters, PDSP 1884 HEG* SCE 5781 yellow SCE 5782 super red SCE 5783 green SCE 5784 HEG* SCE 5786 InGaAIP Q68000A9107 7 Q68000A9108 Q68000A9109 8 4.7 42.93 x 4.57 Parallel SCE 5780 hyper red Q68000A9106 ±55/ ±65 deg


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PDF PD3537 PD243X PD4437 HDSP211XS DLO4135 DLO7135 SCF 5784 5583A 7135 led driver SCD 5583A Q68000-A8902 SLG 2016 D 5542Q DLG 2416 2114s SCF 5741
Transistoren DDR

Abstract: vergleichsliste TELEFUNKEN bux 127 BUX 127 aktive elektronische bauelemente ddr SF 127 vergleichsliste DDR "vergleichsliste" bauelemente DDR sf 369
Text: vorgesehen. SCE238 BC 848 BCW 31/32/33/60 SCE239 BC 849 BCF 32/33 SCE 307 BC 857 , Hybridtechnik vorgesehen. BCW 29/30/61 SCE 309 BC 859 BCF 29/30 SD 335/337/339 BD 135/137/139 , ) Si-pnp-Planar-Epitaxie-Typen für Treiber- und Lei- stungsendstufen in NF-Verstärkern mit hoher Aus- gangsleistung SF 126 , Si-npn-Leistungsschalttransistor SU 165 BU 126 Si-npn-Leistungsschalttransistor SU 167 BU 326 Si-npn-Leistungsschalttransistoren , €¢ FA 9/ 90


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PDF SCE237 SCE238 SCE239 SCE308 Transistoren DDR vergleichsliste TELEFUNKEN bux 127 BUX 127 aktive elektronische bauelemente ddr SF 127 vergleichsliste DDR "vergleichsliste" bauelemente DDR sf 369
FCJ111

Abstract: ph 48
Text: Memory AC Characteristics Timing 12.6 Reset , 32K-WORD 188000H- 18FFFFH Ut ¡3 126 32K-WORD 3B8000H - 3BFFFFH O IXi HH 55 32K-WORD 180000H 187FFFH , 32K-WORD 2A0000H - 2A7FFFH g 20 32K-WORD 068000H 06FFFFH i-l Pi S g 90 32K-WORD 298000H - 29FFFFH 19 , voltage 1,3,5 -0.2 to + 12.6 V Notes: 1. The maximum applicable voltage on any pins with respect to GND. 2 , 2 Not Used 11 200 9 185 us 2 Used 7 100 5 90 hs twhqvl'' tehqv2 4K-Word Parameter Block Erase


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PDF LRS1387 FCJ111 ph 48
2010 - TE3112-PRINTER

Abstract: cable marker
Text: Markers & Labels Product TMS-SCE, RPS HT-SCE, HTCM-SCE-TP D-SCE HX-SCE, HX, HLX, HXTM-FB TMS- 90-SCE


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PDF TE3112-Printer TE3112-PRINTER cable marker
2001 - ic 74192

Abstract: C4764 STE2000 C127 STE2001 45148
Text: I2CBUS SAO SCL SDA_IN PARALLEL SDA_OUT DB0 to DB7 E PD/C SERIAL SCE SDIN , 207 I Serial Interface Data Input SCLK 210 I Serial Interface Clock SCE 209 , 70 ns 8 MHz TS2 SCE setup time 50 ns TH2 SCE hold time 50 ns SCE minimum high time 60 ns 60 ns TPWH2 TH5 SCE start hold time TS3 SD/C setup time , edge of SCE 9. For bus line loads Cb between 100 and 400pF the timing parameters must be linearly


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PDF STE2001 ic 74192 C4764 STE2000 C127 STE2001 45148
2001 - TCP 8118

Abstract: 38544 ic 74192 C3451 C2643 C127 C3855 74544 ic 74192 dc characteristics table image R56-R63
Text: SCE SDIN SCLK SD/C January 2001 This is preliminary information on a new product now in , Interface Clock SCE 209 I Serial Interface ENABLE. When Low the Incoming Data are Clocked In , 60 ns 8 MHz TS2 SCE setup time 40 ns TH2 SCE hold time 40 ns SCE minimum high time 50 ns 50 ns TPWH2 TH5 SCE start hold time TS3 SD/C setup time , edge of SCE 9. For bus line loads Cb between 100 and 400pF the timing parameters must be linearly


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PDF STE2001 TCP 8118 38544 ic 74192 C3451 C2643 C127 C3855 74544 ic 74192 dc characteristics table image R56-R63
2001 - 30544

Abstract: STE2000 ic 74192 pin configuration c5589 ic 74192 dc characteristics table image 101 64 reset gnd sdin sclk lcd C7668 TCP 8118 ic 7918 C127
Text: SERIAL SCE SDIN SCLK SD/C D00IN1137 January 2001 This is preliminary information on a , Interface Clock SCE 224 I Serial Interface ENABLE. When Low the Incoming Data are Clocked In , 60 ns 8 MHz TS2 SCE setup time 40 ns TH2 SCE hold time 40 ns SCE minimum high time 50 ns 50 ns TPWH2 TH5 SCE start hold time TS3 SD/C setup time , edge of SCE 9. For bus line loads Cb between 100 and 400pF the timing parameters must be linearly


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PDF STE2000 30544 STE2000 ic 74192 pin configuration c5589 ic 74192 dc characteristics table image 101 64 reset gnd sdin sclk lcd C7668 TCP 8118 ic 7918 C127
Not Available

Abstract: No abstract text available
Text: ctal 3 -S ta te T ra n sce ive r 8 T 12 5/R — Q uad 3 -S ta te T ra n sce ive r 8T 126 /E , sce ive r 8 T 2 6 /E ,F 457 3 -S ta te Q uad Bus T ra n sce ive r 8 T 2 6 A /E .F , ) FUNCTION TYPE/PKG POWER CONSUMPTION (mW) 3-S tate Q ua d Bus T ra n sce ive r 8 T 2 8 /E ,F , idirectio na l I/O Port 8 T 3 3 /J.K — Q ua d Bus T ra n sce ive r w ith 3 -S ta te O utputs 8 , ith H yste re sis-S ch m itt T rig g e r 8 T 3 7 /E .F Q uad Bus T ra n sce ive r (O .C .) 8


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PDF -14-LEAD 16-LEAD 126/E, 129/E,
7824A

Abstract: UC7812 UC7800 MPC7805 UC7815 uPC7824A uPC7800A MPC7805AHF UPC7805A PC7800
Text: , T = 25 °C, V V in in 30 15 30 10 4.3 1.0 0.5 mV Load R e g u la tio n Q u ie sce n t C u rre n t Q u ie sce n t C u rre n t C hange O u tp u t N oize V o lta g e R ipple R ejection D ro p o u , °C, 5 m A S lo S 1.5 A Load R e g u la tio n Q u ie sce n t C u rre n t Q u ie sce n t C u rre n t C , g e REG l I b ia s 8 3 12 4 3 35 25 90 20 4.4 1.0 0.5 mV mA mA jLiVr.m.s. mV T, = 25 , m A £ lo S 1.5 A Load R e g u la tio n Q u ie sce n t C u rre n t Q u ie sce n t C u rre n t C hange


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PDF uPC7800A iPC7800A uPC7800 7824A UC7812 UC7800 MPC7805 UC7815 uPC7824A MPC7805AHF UPC7805A PC7800
1995 - TIR31

Abstract: MAC layer sequence number P996 AM79C930 CA16 MIR15 CA168
Text: ANTSLT XCE ANTSLT SCE SAR6-0 FCE ADIN2-1 ADREF RXDATA RXC USER6-0 SDCLK A14 , Signals ALE TAICE 80188 Interrupt Generator SCE INT1 RESET CLKIN 20183A-3 4


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PDF Am79C930 15-byte 0183A-3 TCR31 TIR31 0183A-4 TIR31 MAC layer sequence number P996 CA16 MIR15 CA168
2009 - MSP430F5438IPZ

Abstract: QCT32768 SMD PJ 77
Text: 54 53 52 51 90 89 10 9 50 49 48 47 46 45 44 43 42 41 40 39 36 35 34 33 , # SCE GND VOUT #RES R29 33k R18 100nF 100nF R1IN R2IN T1OUT T2OUT ST3232(SO16


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PDF 100nF 10uF/6 EXT1-28 MSP430F5438IPZ 7/A15 6/A14 5/A13 4/A12 47uF/6 MSP430F5438IPZ QCT32768 SMD PJ 77
2006 - st DB3 c126

Abstract: C127 MUX81 STE2001 STE2002 DB3 C109 D0227
Text: December 2006 SCL SDA_IN SOUT PARALLEL SDA_OUT DB0 to DB7 E R/W PD/C SCE Rev 3 SERIAL , Interface Data Input SCLK 217 I Serial Interface Clock SCE 216 I Serial Interface , D1 D2 D3 D4 D5 D6 D7 R/W VSSAUX Y COL 64 X SCLK SCE SD/C SDIN SDOUT MARK , (MX=0)(a) 0 1 2 3 124 125 126 127 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 , writing sequence with V=1 and Data RAM Normal Format (MX=0)(a) 0 1 2 3 124 125 126


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PDF STE2002 st DB3 c126 C127 MUX81 STE2001 STE2002 DB3 C109 D0227
2002 - C127

Abstract: MUX65 48nd mux 8*1 mux 8-1 TC4-14 -TR STE2002DIE2 STE2002DIE1 STE2002 STE2001
Text: SDA_IN SOUT PARALLEL SDA_OUT DB0 to DB7 E R/W PD/C SCE SERIAL SDIN SCLK SD/C 1 , 217 I Serial Interface Clock SCE 216 I Serial Interface ENABLE. When Low the , VSSAUX Y COL 64 X SCLK SCE SD/C SDIN SDOUT MARK_4 BSY_FLG VDD2 VDD2 VDD1 , Data RAM Normal Format (MX=0)1 0 1 2 3 124 125 126 127 BANK 0 BANK 1 BANK , 125 126 127 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 BANK 9


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PDF STE2002 STE2001 C127 MUX65 48nd mux 8*1 mux 8-1 TC4-14 -TR STE2002DIE2 STE2002DIE1 STE2002 STE2001
2005 - MUX 8-1

Abstract: 48nd MUX81 tr 9465
Text: I2CBUS SOUT PARALLEL SERIAL SAO SCL SDA_IN SDA_OUT DB0 to DB7 E R/W PD/C SCE , SELECTED BASIC EXTENDED 2/53 STE2002 Table 2. Pin Description (continued) N° SCLK SCE SD/C SOUT , /W VSSAUX SCLK SCE SD/C SDIN SDOUT BSY_FLG MARK_4 VDD2 VDD2 VDD1 VDD1 OSCIN , BANK 7 BANK 8 BANK 9 BANK 10 BANK 11 BANK 12 1 2 3 124 125 126 127 Figure 7 , 125 126 127 BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7 BANK 8 BANK 9 BANK 10


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PDF STE2002 MUX 8-1 48nd MUX81 tr 9465
2006 - STE2002

Abstract: transistor M 839 transistor code R74 db3 c53 nv ram data sheet db3 c103 MUX 8-1 C127 MUX81 STE2001
Text: December 2006 SCL SDA_IN SOUT PARALLEL SDA_OUT DB0 to DB7 E R/W PD/C SCE Rev 3 SERIAL , Serial Interface Data Input SCLK 217 I Serial Interface Clock SCE 216 I Serial , D1 D2 D3 D4 D5 D6 D7 R/W VSSAUX Y COL 64 X te le SCLK SCE SD/C SDIN SDOUT , with V=0 and Data RAM Normal Format (MX=0)(a) 0 1 2 3 124 125 126 127 BANK 0 , 8 BANK 9 BANK 10 BANK 11 BANK 12 bs O (s) ct te le so Ob - 124 125 126


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PDF STE2002 STE2002 transistor M 839 transistor code R74 db3 c53 nv ram data sheet db3 c103 MUX 8-1 C127 MUX81 STE2001
Not Available

Abstract: No abstract text available
Text: .23 12.6 Reset Operations . 26 13 , voltage 1,3,5 -0.2 to + 12.6 V Notes: 1. The maximum applicable voltage on any pins with respect to GND. 2 , 11 200 9 185 |is 2 Used 7 100 5 90 |is lwhqv2^ *ehqv2 4K-Word Parameter Block Erase Time 2 - , de-asserted. SHARP LRS1383F 26 12.6 Reset Operations (Ta = -25°C to +85°C. F-Vcc = 2.7V to 3.3V) Symbol , 40 ns t0H Output Hold from Address Change 10 ns lLZl S-CE ^ Low to Output Active 1 10 ns lLZ2 S-CE2


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PDF LRS1383F LRS1383F) MFM2-J14424
1999 - MGL633

Abstract: PCD8544 MGL629 PCD8544U ic 4046 notes with IC diagram MGL639 TRW PT 3154 D MGL638 MGL642 TOA 2709
Text: 29 D/C +1090 +1085 67 R3 -5679 -738 30 SCE + 90 +1085 68 R4 , pads SDIN: serial data line SCLK: serial clock line D/C: mode select SCE : chip enable OSC , generated (voltage generator enabled) ­ 6.0 to 9.0 V with LCD voltage externally supplied (voltage , T1 T2 T3 DATA REGISTER PCD8544 T4 I/O BUFFER MGL629 SDIN SCLK D/C SCE , 4.0 Mbits/s. SYMBOL DESCRIPTION SCLK data/command SCE T1, T3 and T4 must be


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PDF PCD8544 SCA63 465008/750/01/pp32 MGL633 PCD8544 MGL629 PCD8544U ic 4046 notes with IC diagram MGL639 TRW PT 3154 D MGL638 MGL642 TOA 2709
2001 - HM66WP18100BP-40

Abstract: HM66WP18100FP-40 HM66WP18100FP-50 HM66WP18100FP-60 HM66WP36512FP-40 HM66WP36512FP-50 HM66WP36512FP-60 Hitachi DSA00160
Text: / A18 A17 A8 A9 VDD VSS CLK CE2 100 99 98 97 96 95 94 93 92 91 90 89 88 87 , 41 42 43 44 45 46 47 48 49 50 NC NC NC 100 99 98 97 96 95 94 93 92 91 90 , , 20, 27, 54 61, 70, 77 1A, 1F, 1J, 1M, 1U, 7A, 7F, 7J, 7M, 7U 17, 40, 67, 90 , 5, 10, 21, 3D,3E , , cycle time = tCYC min. Standby current ISB 100 90 80 mA Device , rise and fall time: 2 V/ns (10% ­ 90 %) · Output timing reference level : 1.4 V (3.3 V I/O) : 1.2


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PDF HM66WP18100/HM66WP36512 HM66WP18100) 18-bit HM66WP36512) 512-Kword 36-bit ADE-203-1298C HM66WP18100 18-bit. HM66WP36512 HM66WP18100BP-40 HM66WP18100FP-40 HM66WP18100FP-50 HM66WP18100FP-60 HM66WP36512FP-40 HM66WP36512FP-50 HM66WP36512FP-60 Hitachi DSA00160
mc7805 samsung

Abstract: MC7810C mc78xx MC7805AC 78XXC mc7805c samsung
Text: AV0 V, = 8V to 12V Load Regulation Q u ie sce n t Current l, = 5.0m A to 1.5A AV0 T¡ = 25 °C lo = 250m A to 750mA T, = 2 5 °C lo = 5m A to 1.0A 3 5.0 3 5.0 Id mA Q u ie sce n t , Regulation A V0 T, = 2 5 °C Vi = 9V to 13V lo = 5m A to 1.5A Load Regulation Q u ie sce n t Current A Vo Id , 120 60 120 60 8 ; 0.5 T, = 2 5 °C lo = 250m A to 750mA T, = 25 °C l0 = 5m A to 1A Q u ie sce , , = 2 5 °C V = 11.5V to 17V l, = 5.0m A to 1.5A Load Regulation Q u ie sce n t Current A V0 Id lo


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PDF MC78XX/MC78XXA C78XX/M C78XXA T0-220 mc7805 samsung MC7810C mc78xx MC7805AC 78XXC mc7805c samsung
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