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Part ECAD Model Manufacturer Description Datasheet Download Buy Part
TMPM4GQF15XBG TMPM4GQF15XBG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-VFBGA145-1212-0.80-001 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4GRF20XBG TMPM4GRF20XBG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-VFBGA177-1313-0.80-001 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4KMFYAFG TMPM4KMFYAFG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4MMFYAFG TMPM4MMFYAFG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-LQFP80-1212-0.50-003 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4NQF10XBG TMPM4NQF10XBG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-VFBGA145-1212-0.80-001 Visit Toshiba Electronic Devices & Storage Corporation
TMPM4NRF15XBG TMPM4NRF15XBG ECAD Model Toshiba Electronic Devices & Storage Corporation Arm Cortex-M4 processor with FPU Core Based Microcontroller/32bit/P-VFBGA177-1313-0.80-001 Visit Toshiba Electronic Devices & Storage Corporation

TMS 320 C 6X processor datasheet Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - 360-pin BGA IBM

Abstract: Tag 225 600 replacement 750TM Loctite 640 250 mhz IBM PowerPC Processor
Text: RISC Microprocessor Datasheet The PowerPC 750TM microprocessor is an implementation of the , . 6/10/98 v 3.1 Datasheet Page 1 PowerPC 750TM SCM RISC Microprocessor Preliminary , processor core and an internal L2 Tag combined with a dedicated L2 cache interface and a 60x bus. Figure 8 , 60X BIU L2 Tags BIU Datasheet 6/10/98 Preliminary Copy PowerPC 750TM SCM RISC , Datasheet Page 3 PowerPC 750TM SCM RISC Microprocessor Preliminary Copy · Fixed-point units -


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PDF 750TM PowerPC740 PowerPC750 360-pin BGA IBM Tag 225 600 replacement Loctite 640 250 mhz IBM PowerPC Processor
1998 - 20pF3

Abstract: 360-lead scm ma loop f2
Text: 0.15 C (18x) e A2 b 0.3 C A B 0.15 C A1 A Not To Scale Page 28 v 3.2 Datasheet , RISC Microprocessor Datasheet The PowerPC 750TM microprocessor is an implementation of the PowerPCTM , v 3.2 Datasheet Page 1 PowerPC 750TM SCM RISC Microprocessor Preliminary Copy , management features; doze, nap, sleep, and dynamic power management. The 750 consists of a processor core and , Buffers 32K DCache L2 Tags L2 Cache BIU 60X BIU Page 2 v 3.2 Datasheet 7/15/99


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PDF 750TM PowerPC740 PowerPC750 20pF3 360-lead scm ma loop f2
Not Available

Abstract: No abstract text available
Text: ball grid array (CBGA) with L2 interface. 2.7 ± 5 0 m V D C 3.3 V ± 5% V D C Datasheet 6/10 , ooo ooo D ooo ooo c ooo ooo B ooo ooo A Not To Scale Page 28 v3.1 Datasheet 6/10/98 , PowerPC 750™ SCM RISC Microprocessor Datasheet The PowerPC 750™ microprocessor is an , .6 Electrical and Thermal C haracteristics , reserved. 6/10/98 v 3.1 Datasheet Page 1 PowerPC 750™ SCM RISC Microprocessor


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PDF PowerPC740 PowerPC750
2004 - PC745

Abstract: PC755M8 PCX755B
Text: VDC, 0 TJ < 105° C Processor (CPU) Frequency/L2 Frequency 300/150 MHz 350/175 MHz Unit 4.1 , Full military temperature range (Tj = -55° C , +125° C ) industrial temperature range (Tj = -40° C , +110° C , -bit mode selectable ­ Bus-to-core frequency multipliers of 2x, 3x, 3.5x, 4x, 4.5x, 5x, 5.5x, 6x , 6.5x , Compatible with 60X processor interface Parity checking on both address and data buses Power Management , -7] DBDIS DATA TERMINATION PROCESSOR STATUS CONTROL TA DRTRY TEA 1 1 64 8 1 QACK


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PDF PC755M8 2164C PC745 PCX755B
2005 - PC755BM8

Abstract: MCP 67 MV PC745 PC755M8 PCX755B
Text: -55° C , +125° C ) · Industrial Temperature Range (Tj = -40° C , +110° C ) Preliminary site SSRAM , physical memory · Bus Interface ­ Compatible with 60X processor interface ­ 32-bit address bus ­ 64 , , 5.5x, 6x , 6.5x, 7x, 7.5x, 8x, 10x supported ­ Selectable interface voltages of 2.5V and 3.3V ­ , Factory Test 1 VOLTDET DBWO DBB D[0-63] D[P0-7] DBDIS DATA TERMINATION PROCESSOR , -0.3 to 3.465 V Processor bus(2)(5) VIN -0.3 to OVDD + 0.3V V (2)(5) VIN -0.3


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PDF PC755BM8 PC755BM8 2164C MCP 67 MV PC745 PC755M8 PCX755B
2003 - cop interface

Abstract: PC745 PC755M8 PLL VCO MIL-PRF-38535 X755M
Text: . Power Consumption VDD = AVDD = 2.0 ± 0.1V, OVDD = 3.3V ± 5% VDC, GND = 0 VDC, 0 TJ < 105° C Processor , . Processor Bus Mode Selection AC Timing Specifications(1) At VDD = AVDD = 2.0V 100 mV; -55 Tj +125° C , OVDD , standards · Full military temperature range (Tj = -55° C , +125° C ) industrial temperature range (Tj = -40° C , +110° C ) RISC Microprocessor Multichip Package Preliminary Specification -site PC755M8 , Compatible with 60X processor interface ­ 32-bit address bus ­ Bus-to-core frequency multipliers


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PDF PC755M8 2164B cop interface PC745 PLL VCO MIL-PRF-38535 X755M
2003 - TMS 320 C 6X processor

Abstract: 2164A PC745 PC755M8 2164A dynamic ram cop interface l2-dp
Text: : VIN L2 Bus Die-junction temperature Processor bus Tj -40 110 ° C 1. These are , VDC, 0 Tj < 105° C Processor (CPU) Frequency/L2 Frequency 300 MHz/150 MHz Unit Full-on Mode , . Processor Bus Mode Selection AC Timing Specifications(1) At VDD = AVDD = 2.0V 100 mV; -55 Tj +125° C , OVDD , standards · Full military temperature range (Tj = -55° C , +125° C ) industrial temperature range (Tj = -40° C , +110° C ) RISC Microprocessor Multichip Package Preliminary Specification -site PC755M8


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PDF PC755M8 TMS 320 C 6X processor 2164A PC745 2164A dynamic ram cop interface l2-dp
2000 - IBM25PPC750CX

Abstract: 750CX
Text: Datasheet Figure 14. PowerPC 750CX Microprocessor Ball Placement 1 A B C D E F G H J K L M N P R T U V W , PowerPC 750CX RISC Microprocessor Datasheet Version 1.1 November 13, 2000 IBM , marks of others. This is a preliminary edition of PowerPC 750CX RISC Microprocessor Datasheet . Make , Datasheet Table of Contents 1.0. Preface , .39 9.0. Processor Version Register (PVR


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PDF 750CX IBM25PPC750CX
2001 - IBM25PPC750CX

Abstract: PowerPC-750CX PBGA 256 reflow profile dh28 code DH10 IBM25PPC750
Text: PowerPC 750CX RISC Microprocessor Datasheet Version 1.2 June 20, 2001 IBM Microelectronics , service marks of others. This is a preliminary edition of PowerPC 750CX RISC Microprocessor Datasheet , Microprocessor Datasheet Table of Contents 1.0. Preface , .39 9.0. Processor Version Register (PVR , .41 June 20, 2001 Version 1.2 Page 3 PowerPC 750CX RISC Microprocessor Datasheet List


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PDF 750CX IBM25PPC750CX PowerPC-750CX PBGA 256 reflow profile dh28 code DH10 IBM25PPC750
2000 - 750CX

Abstract: No abstract text available
Text: PowerPC 750CX RISC Microprocessor Datasheet Version 1.0 Thursday, June 01, 2000 IBM , Microprocessor Datasheet . Make sure you are using the correct edition for the level of the product. This document , Microprocessor Datasheet Table of Contents 1.0. Preface , . 37 9.0. Processor Version Register (PVR , Datasheet List of Figures Figure 1. PowerPC 750CX RISC Microprocessor Block Diagram


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PDF 750CX
1991 - IBM25PPC750CXE

Abstract: IBM25PPC750 DH10 PPC750 IBM25PPC750CXEJP RISCwatch DH11
Text: Information Page 3 of 38 Datasheet PowerPC 750CXe RISC Microprocessor Preliminary 1.4 Processor , PowerPC 750CXe RISC Microprocessor Datasheet Version: 1.1 (For DD3.1 Only) Preliminary , Preliminary Datasheet PowerPC 750CXe RISC Microprocessor Table of Contents List of Tables , . 1.4 Processor Version Register (PVR , Datasheet PowerPC 750CXe RISC Microprocessor Table of Contents Page iv of 38 Preliminary sw_ds


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PDF 750CXe IBM25PPC750CXE IBM25PPC750 DH10 PPC750 IBM25PPC750CXEJP RISCwatch DH11
1991 - DL20 SENSOR

Abstract: IBM25PPC750CXEJP DH10 PPC750 RISCwatch
Text: Datasheet PowerPC 750CXe RISC Microprocessor Preliminary 1.4 Processor Version Register (PVR) The , Preliminary Datasheet PowerPC 750CXe RISC Microprocessor Table of Contents List of Tables , . 1.4 Processor Version Register (PVR , 34 34 Page i of 36 Datasheet PowerPC 750CXe RISC Microprocessor Preliminary Revision , . 35 Page ii of 36 750cxe_TOC.fm.(1.4) January 15, 2003 Datasheet PowerPC 750CXe RISC


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PDF 750CXe DL20 SENSOR IBM25PPC750CXEJP DH10 PPC750 RISCwatch
1991 - IBM25PPC750CXEJP

Abstract: IBM25PPC750CX PPC750 600MHz RISCwatch ibm25ppc750cxe 8x9x
Text: Datasheet PowerPC 750CXe RISC Microprocessor Preliminary 1.4 Processor Version Register (PVR) The , Nominal Length (mm) C T 750cxe_DD3.1_Dev_3_gen_mkt.fm.(1.3) February 12, 2002 Datasheet , PowerPC 750CXe RISC Microprocessor Datasheet Version: 1.3 (For DD3.1 Only) Preliminary , Preliminary Preliminary Datasheet PowerPC 750CXe RISC Microprocessor Table of Contents List of , . 1.4 Processor Version Register (PVR


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PDF 750CXe IBM25PPC750CXEJP IBM25PPC750CX PPC750 600MHz RISCwatch ibm25ppc750cxe 8x9x
2001 - PPC750 600MHz

Abstract: PowerPC-750CX PowerPC-750CXe ibm25ppc750cxe DH10 PPC750 IBM25PPC750 IBM PPC750 dh23
Text: R Y PowerPC 750CXe RISC Microprocessor Datasheet February, 2001 PR EL IM IN , edition of PowerPC 750CXe RISC Microprocessor Datasheet . Make sure you are using the correct edition for , , 1991-2001. All rights reserved. PowerPC 750CX RISC Microprocessor Datasheet Table of Contents 1.0 , . 39 9.0 Processor Version Register (PVR , . 40 February, 2001 Version 1.0 Page 3 PowerPC 750CXe RISC Microprocessor Datasheet


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PDF 750CXe PPC750 600MHz PowerPC-750CX PowerPC-750CXe ibm25ppc750cxe DH10 PPC750 IBM25PPC750 IBM PPC750 dh23
2001 - ibm25ppc750cxe

Abstract: dh28 code RISCwatch
Text: R Y PowerPC 750CXe RISC Microprocessor Datasheet February, 2001 PR EL IM IN , edition of PowerPC 750CXe RISC Microprocessor Datasheet . Make sure you are using the correct edition for , , 1991-2001. All rights reserved. PowerPC 750CX RISC Microprocessor Datasheet Table of Contents 1.0 , . 39 9.0 Processor Version Register (PVR , . 40 February, 2001 Version 1.0 Page 3 PowerPC 750CXe RISC Microprocessor Datasheet


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PDF 750CXe ibm25ppc750cxe dh28 code RISCwatch
1999 - Not Available

Abstract: No abstract text available
Text: , on-chip MAC, 32-bit & 64 bit bus option Table 1 RISCore4000/RISCore5000 Processor Family 2 of 27 April , and 64-bit data pairs. The entire buffer is used for a data cache writeback and allows the processor , processor and memory at a peak rate of 1000MB/sec. A boot-time selectable option to run the system interface , boot-time mode control interface initializes fundamental processor modes and is a serial interface that , is facilitated through the full JTAG boundary scan facility. Five pins-TDI, TDO, TMS , TCK, TRST


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PDF 64-bit 79RC64574TM 79RC64575TM 250MHz 300MFLOPS/s RC4640 RC32364 128-pin 208-pin
1999 - idt79rc64t575

Abstract: No abstract text available
Text: processor clock with nominal 40-60% duty cycle. JTAG Command Select The logic signal received at the TMS , , on-chip MAC, 32-bit & 64 bit bus option Table 1 RISCore4000/RISCore5000 Processor Family 2 of 27 May 1 , -bit data pairs. The entire buffer is used for a data cache writeback and allows the processor to proceed in , 79RC64575TM ferring data between the processor and memory at a peak rate of 1000MB/sec. A boot-time , -bit system-is also supported. A boot-time mode control interface initializes fundamental processor modes and is


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PDF 64-bit 250MHz 300MFLOPS/s RC4640 RC32364 128-pin 208-pin 79RC64 idt79rc64t575
1999 - 79RC64575

Abstract: 79RC64574 RC32364 RC4640 RC4650 RC5000 RC64474 RC64575 5x1000 300-MFLOPS
Text: the system and processor clock with nominal 40-60% duty cycle. TMS I JTAG Command Select The , RISCore4000/RISCore5000 Processor Family 2 of 28 December 14, 2001 79RC64574TM 79RC64575TM , cache writeback and allows the processor to proceed in parallel with memory updates. Included in the , December 14, 2001 79RC64574TM 79RC64575TM ferring data between the processor and memory at a peak , mode control interface initializes fundamental processor modes and is a serial interface that operates


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PDF 79RC64574TM 79RC64575TM 64-bit RC5000 48-entry, 96-page 64-bit 125MHz 32-bit IDT79RC64474/475) 79RC64575 79RC64574 RC32364 RC4640 RC4650 RC64474 RC64575 5x1000 300-MFLOPS
1999 - 00LQ

Abstract: ad 149
Text: /RISCore5000 Processor Family 2 of 27 March 28, 2000 79RC64574TM 79RC64575TM ,QVWU ,QVWUXFWLRQ 6HW $U , -bit data pairs. The entire buffer is used for a data cache writeback and allows the processor to proceed in , of 27 March 28, 2000 79RC64574TM 79RC64575TM ferring data between the processor and memory , interface initializes fundamental processor modes and is a serial interface that operates at a very low , , TDO, TMS , TCK, TRST*-have been incorporated to support the standard JTAG interface. The RC64574/575


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PDF 64-bit 79RC64574TM 79RC64575TM 250MHz 300MFLOPS/s RC4640 RC32364 128-pin 208-pin 00LQ ad 149
1999 - MA2810

Abstract: idt79rc64t575 PQFP-128 footprint
Text: the system and processor clock with nominal 40-60% duty cycle. TMS I JTAG Command Select The , RISCore4000/RISCore5000 Processor Family 2 of 28 December 14, 2001 79RC64574TM 79RC64575TM , cache writeback and allows the processor to proceed in parallel with memory updates. Included in the , December 14, 2001 79RC64574TM 79RC64575TM ferring data between the processor and memory at a peak , mode control interface initializes fundamental processor modes and is a serial interface that operates


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PDF 79RC64574TM 79RC64575TM 64-bit RC5000 48-entry, 96-page 64-bit 125MHz 32-bit IDT79RC64474/475) MA2810 idt79rc64t575 PQFP-128 footprint
2001 - 300-MFLOPS

Abstract: No abstract text available
Text: Table 1 RISCore4000/RISCore5000 Processor Family 2 of 27 April 25, 2001 79RC64574TM 79RC64575TM , -bit data pairs. The entire buffer is used for a data cache writeback and allows the processor to proceed in , of 27 April 25, 2001 79RC64574TM 79RC64575TM ferring data between the processor and memory , interface initializes fundamental processor modes and is a serial interface that operates at a very low , , TDO, TMS , TCK, TRST*-have been incorporated to support the standard JTAG interface. The RC64574/575


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PDF 64-bit 79RC64574TM 79RC64575TM 250MHz 300MFLOPS/s RC4640 RC32364 128-pin 208-pin 300-MFLOPS
1999 - Not Available

Abstract: No abstract text available
Text: processor clock with nominal 40-60% duty cycle. JTAG Command Select The logic signal received at the TMS , , on-chip MAC, 32-bit & 64 bit bus option Table 1 RISCore4000/RISCore5000 Processor Family 2 of 27 May 1 , -bit data pairs. The entire buffer is used for a data cache writeback and allows the processor to proceed in , 79RC64575TM ferring data between the processor and memory at a peak rate of 1000MB/sec. A boot-time , -bit system-is also supported. A boot-time mode control interface initializes fundamental processor modes and is


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PDF 64-bit 250MHz 300MFLOPS/s RC4640 RC32364 79RC64 IDT79RC64T574 IDT79RC64T575
1999 - MA2810

Abstract: idt79rc64t575 79RC64574 79RC64575 RC32364 RC4640 RC4650 RC5000 RC64474 RC64575
Text: interrupt register. VC CO k I VC C is OK When assert ed, this signal indicates to the processor , . TCK is independent of the system and processor clock with nominal 40-60% duty cycle. TMS I , V C CP SysCmdP TDI TDO TMS TRST* JTAG 64 SysClock RC64574/ RC64575 Logic , ua tionFe U tch nit Primary Cac Controller he 32kB 2 set-associative Instruction C ache (Loc kable) RC5 000 Compatible Syste C m ontrol Coprocessor 48 -entry 96-page TLB 3


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PDF 64-bit 79RC64574TM 79RC64575TM RC5000 48-entry, 96-page 64-bit 125MHz 32-bit IDT79RC64474/475) MA2810 idt79rc64t575 79RC64574 79RC64575 RC32364 RC4640 RC4650 RC64474 RC64575
1999 - MA2810

Abstract: 79RC64574 79RC64575 RC32364 RC4640 RC4650 RC5000 RC64474 RC64475 RC64575
Text: the system and processor clock with nominal 40-60% duty cycle. TMS I JTAG Command Select The , illustrates the direction and functional groupings for the processor signals. SysCmdP TMS JTAG , locking, JTAG, syncDRAM mode, 3264- bit bus option Table 1 RISCore4000/RISCore5000 Processor Family 2 , allows the processor to proceed in parallel with memory updates. Included in the system interface are , 79RC64574TM 79RC64575TM ferring data between the processor and memory at a peak rate of 1000MB/sec. A


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PDF 79RC64574TM 79RC64575TM 64-bit RC5000 48-entry, 96-page 64-bit 125MHz 32-bit IDT79RC64474/475) MA2810 79RC64574 79RC64575 RC32364 RC4640 RC4650 RC64474 RC64475 RC64575
2004 - TT 2076

Abstract: ci tea 2261 G38-87 JESD51-2 PC7447 PC7447A powerpc 7447a 7447A pin configuration
Text: CLK_OUT TCK TDI TDO Test Interface (JTAG) TMS TRST OVDD 8 Processor Status/Control , ° C Processor bus supply voltage (6)(7) Input voltage VIN TSTG Notes: Storage , Processor bus GND OVDD JTAG signals GND OVDD -55 125° C Input voltage VIN Tj , host processor is a high-performance, low-power, 32-bit implementations of the PowerPC Reduced , Full Military Temperature Range (Tj = -55° C , +125° C ), · Industrial Temperature Range (Tj = -40°


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PDF MPx/60x 64-bit 36-bit Hz/166 TT 2076 ci tea 2261 G38-87 JESD51-2 PC7447 PC7447A powerpc 7447a 7447A pin configuration
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