The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTC1706EMS-63#TRPBF Linear Technology LTC1706-63 - 5-Bit VID Voltage Programmer for Sun CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC1706EMS-63#PBF Linear Technology LTC1706-63 - 5-Bit VID Voltage Programmer for Sun CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC3819EG#TRPBF Linear Technology LTC3819 - 2-Phase, High Efficiency, Step-Down Controller for Sun Server CPUs; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C
LTC1706EMS-63 Linear Technology LTC1706-63 - 5-Bit VID Voltage Programmer for Sun CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC3819EG Linear Technology LTC3819 - 2-Phase, High Efficiency, Step-Down Controller for Sun Server CPUs; Package: SSOP; Pins: 36; Temperature Range: -40°C to 85°C
LTC1706EMS-63#TR Linear Technology LTC1706-63 - 5-Bit VID Voltage Programmer for Sun CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C

Sun UltraSparc T2 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2008 - Sun UltraSparc t2

Abstract: Sun UltraSparc ultrasparc 3 UltraSPARC T2 Processor with Wind River wind river sunwin Sun UltraSparc T2 plus snort
Text: UltraSPARC T2 Reference Design Kit, with everything you need to start designing, go to: sun . com/products , UltraSPARC ® T2 Processor with Wind River Platform for Network Equipment, Linux Edition The future , latency · Wind River Platform for Network Equipment, Linux Edition, running on the UltraSPARC ® T2 , UltraSPARC T2 processor is a true "system on a chip" > Today's network infrastructure must deliver far , networking processors (NPUs), for networking functions. Now, with the UltraSPARC T2 CMT processor, plus Wind


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PDF 1-800-555-9SUN Sun UltraSparc t2 Sun UltraSparc ultrasparc 3 UltraSPARC T2 Processor with Wind River wind river sunwin Sun UltraSparc T2 plus snort
STP1030

Abstract: UltraSPARC ii AF5A Sun UltraSparc T1 Sun UltraSparc T2
Text: unidirectional (output only) pins on UltraSPARC -1 connected directly to system. Sun Microsystems, Inc 15 , ^ Business SPA R C Technology M ay 1995 UltraSPARC -1 DATA SHEET In t r o d u c t io n , o n e n t O v e r v i e w In a single chip implementation, the UltraSPARC -1 processor integrates , dynamic branch prediction scheme is implemented in Sun Microsystems, Inc 2 Prelim inary , units in the FPU allows UltraSPARC -1 to issue and execute two float ing-point instructions per cycle


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PDF STP1030, 64-bit STP1030 UltraSPARC ii AF5A Sun UltraSparc T1 Sun UltraSparc T2
Z2 150 1AK

Abstract: Sun UltraSparc T2 UltraSPARC ii AJ17A
Text: UltraSPARC -4 module, is present and is used to man age duplicate tags, for efficient data sharing. Sun , . There are five unidirectional (output only) pins on UltraSPARC -! connected directly to system. Sun , Introduction High-Performance 64 Bit RISC Processor The STP1030, UltraSPARC -!, is a high-performance , ) UltraSPARC -! Bus F ig u r e 1. F u n c tio n a l B lo ck D iagram U l t r a S P A R C -I C o m p o n e n t O v e r v i e w In a single chip implementation, the UltraSPARC -! processor integrates the


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PDF STP1030, 64-bit STP1030 Z2 150 1AK Sun UltraSparc T2 UltraSPARC ii AJ17A
Sun UltraSparc T2

Abstract: Sun UltraSparc T1 STP1080 sparc v8 spitfire Sun UltraSparc II
Text: . Sun Microsystems, Inc 16 Prelim in ary Revision OS - UltraSPARC -4Data Buffer (UDB) STP II W , Prel i m i na r y SPA RC T echrdogy Business STP1080 May 1995 UltraSPARC -1 Data Buffer (U DB) DATA SHEET Introduction The UltraSPARC ^ Data Buffer(UDB) consists of two chips that connect UltraSPARC -! and its E-eache to a 144bit data bus. Data Buffer chips move data between the E-eache and , · · · · · Isolates the processor from the system bus Interface to the UltraSPARC -1 Bus Operates at


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PDF STP1080 144bit 16paritybils. STP1080 44ayer Sun UltraSparc T2 Sun UltraSparc T1 sparc v8 spitfire Sun UltraSparc II
1998 - 6803 microprocessor

Abstract: Sun UltraSparc ultrasparc 3 SUN MICROELECTRONICS register file UltraSPARC ii memory bandwidth
Text: UltraSPARC II Microprocessor TM High-Performance, Highly-Scalable, Multiprocessing, 64-bit SPARCTM V9 RISC Microprocessor Placeholder for illustration or photo The UltraSPARC II processor , special-purpose media processor. And the UltraSPARC II delivers superior raw compute performance by using the , UltraSPARC II processor not only helps the system designer by implementing industry-standard testing and , reliability. With high performance, high scalability, and high reliability, the UltraSPARC II is the


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PDF 64-bit 64-way PBN-0140-01 6803 microprocessor Sun UltraSparc ultrasparc 3 SUN MICROELECTRONICS register file UltraSPARC ii memory bandwidth
1998 - Sun UltraSparc T1

Abstract: ULTRASPARC-III UPA64 ultrasparc 3 ULTRASPARC Sun UltraSparc UltraSparc IIi
Text: the UltraSPARC IIi, while using PC-class, PCI-based mother boards and components. In addition, Sun , traditional processors. Software Support The UltraSPARC IIi processor supports Sun 's popular SolarisTM , Solution The UltraSPARC i-Series family consists of processors at 270, 300, and 333MHz and modules at , system performance and features the award-winning UltraSPARC processor in a single-chip system solution. The UltraSPARC IIi processor incorporates a CPU, PCI bus interface, and memory controller to deliver


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PDF 64-bit 333MHz 270MHz/256Kb, 300MHz/512Kb, 333MHz/2MB. PBN-0014-03 Sun UltraSparc T1 ULTRASPARC-III UPA64 ultrasparc 3 ULTRASPARC Sun UltraSparc UltraSparc IIi
1997 - STP2003QFP

Abstract: Sun Ultra 5 EDO FLASH DIMMs 72 pin CONNECTOR HEADER 20 PIN MAIL "ISP" server SIMM 72 simm72 Sun Ultra AX M48T59 DB25S
Text: DESCRIPTION The Ultra AX Net Engine combines the Sun UltraSPARC microprocessor, network software and PC , AX Net Engine is an UltraSPARC powered PCI motherboard that can be installed in a PC standard ATX , UltraSPARC I and II microprocessor modules. - Optional modules support a broad range of networked options , transfer of competitive technologies. · Visual Instruction Set - Sun 's Visual Instruction Set (VIS , Internet Mail Server, SunScreen SKIP Client and Sun WebServer software. Secure Communications Server


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PDF SEUAX-1167-0 167MHz 33MHz SEUAX-12501-0 250MHz SEUAXE-12501-0 33/66MHz SEKIT-AX167-SIS10-M STP2003QFP Sun Ultra 5 EDO FLASH DIMMs 72 pin CONNECTOR HEADER 20 PIN MAIL "ISP" server SIMM 72 simm72 Sun Ultra AX M48T59 DB25S
STP2003QFP

Abstract: Sun Ultra AX Sun Ultra 5 CONNECTOR HEADER 20 PIN MAIL pci connector 124 pin "ISP" server SEUAX-1167-0 462 motherboard
Text: The Ultra AX Net Engine combines the Sun UltraSPARC microprocessor, network software and PC hardware , is an UltraSPARC powered PCI motherboard that can be installed in a PC standard ATX chassis and , Benefits · UltraSPARC I and II microprocessor modules. - Optional modules support a broad range of , the data transfer of competitive technologies. · Visual Instruction Set - Sun 's Visual Instruction Set , Internet Mail Server, SunScreen SKIP Client and Sun Webserver software. Secure Communications Server This


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PDF SEUAX-1167-0 SEUAX-12501-0 SEUAXE-12501-0 SEKIT-AX167-SIS10-M SEKIT-AX167-UIS10-M SEKIT-AX167-SEC10-M 167MHz 250MHz STP2003QFP Sun Ultra AX Sun Ultra 5 CONNECTOR HEADER 20 PIN MAIL pci connector 124 pin "ISP" server 462 motherboard
805-0086-02

Abstract: J0801 UltraSPARC ii Sun UltraSparc II
Text: ] o UPA_ADR_VLD SYS-DAT[63:0] o I/O 10 Sun M icrosystem s, Inc July 1998 UltraSPARC , Distribution 12 Sun M icrosystem s, Inc July 1998 UltraSPARC TM-IIi CPU Module 300 M H z CPU, 0.5 , V ss to V D D 1. To be announced 14 Sun M icrosystem s, Inc July 1998 UltraSPARC , /CPU module with Heat Sinks 18 Sun M icrosystem s, Inc July 1998 UltraSPARC TM-IIi CPU , Sun M icrosystem s, Inc July 1998 UltraSPARC TM-IIi CPU Module 300 M H z CPU, 0.5 M B E-cache


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PDF SME5421MCZ-300 UPA64S) UPA64S E5421M Z-300 UPA64s, 805-0086-02 J0801 UltraSPARC ii Sun UltraSparc II
1999 - ULTRASPARC-III

Abstract: Sun UltraSparc itanium merced "rainbow technologies" 21264 PowerPC 7400 ultrasparc 3 rainbow technologies 1999 MPC7400
Text: Processor Sun UltraSPARC * III Clock Frequency 660 MHz 600 MHz RSA Decryptions Per Second 1,000 , data for the Sun UltraSPARC * III processor. Figure 2. Relative component costs for SSL transactions , , number Processor Intel® ItaniumTM Processor Sun UltraSPARC * III Clock Frequency 660 MHz 600 , instruction execution in the Itanium processor. The processors (Ref. 7) · Sun UltraSPARC * III processor , Motorola, MPC7400TS/D, Rev. 0, 8/1999. ® Sun UltraSPARC III processor I Software IBM


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SRAM

Abstract: ultrasparc
Text: 14 mm. 390 Sun M ic ro elec tro n ics July 1997 UltraSPARC "-! CPU Module 167 MHz , S un M icro electro nics July 1997 UltraSPARC "-! CPU Module DATA SHEET D e s c r ip t io n The UltraSPARC -1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The main components on the module are: one UltraSPARC -1 CPU, two UltraSPARC -1 UDB data buffer chips, one 32kx36 tag SRAM


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PDF 32kx36 32kx36 MC100LVE111 STP5110AUPA-167 STP1030A) STP5110A SRAM ultrasparc
Not Available

Abstract: No abstract text available
Text: k B u ffe r: M C 1 0 L V E 2 1 0 2 Sun M icrosystem s, Inc July 1998 UltraSPARC ™-IIi , Data bus 10 Sun M icrosystem s, Inc July 1998 UltraSPARC ™-IIi CPU Module 270 M H z CPU , Distribution 12 Sun M icrosystem s, Inc July 1998 UltraSPARC ™-IIi CPU Module 270 M H z CPU, 256 , b e a n n o u n c e d 14 Sun M icrosystem s, Inc July 1998 UltraSPARC ™-IIi CPU Module , 16 Sun M icrosystem s, Inc July 1998 UltraSPARC ™-IIi CPU Module 270 M H z CPU, 256 Kbyte


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PDF SME541OMCZ-270 SME5410MCZ-270) UPA64S) UPA64S SME5410MCZ-270 5410M Z-270 UPA64s,
1999 - SME2411BGA

Abstract: SME2411BGA-66 J0801 SME1040LGA UltraSPARC ii w48c60 UltraSparc IIi
Text: Exclusively describes the 360 MHz and the 440 MHz UltraSPARC IIi CPU Modules September 2001 Sun , . CPU-integrated memory and bus controllers drive signals to two external connectors. These two UltraSPARC IIi CPU , slave interface operates at 1/4 CPU frequency, also uses 3.3 volt signalling and is compatible with Sun 's FFB Creator and AFB Elite graphics boards. The 66 MHz, 32-bit PCI bus is normally connected to Sun , : See page 11 for the details of the clock distribution. 2 Sun Microsystems, Inc September 2001


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PDF SME5431PCI-360 SME5434PCI-440 360/440MHz UPA64S, 66MHz UPA64S SME2411BGA SME2411BGA-66 J0801 SME1040LGA UltraSPARC ii w48c60 UltraSparc IIi
Not Available

Abstract: No abstract text available
Text: STP5111A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC ™ CPU Module -! DATA SHEET 200 MHz UltraSPARC -1 + 1 MB E-Cache + UDBs D e s c r ip t io n The UltraSPARC-I m , interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The m ain com ponents on the m odule are: one UltraSPARC -1 CPU, two UltraSPARC-I UDB data buffer chips, one 32kx36 tag SRAM , eight 64 k x , interface at a 2:1 frequency ratio. The m odule w ill be available w ith the UltraSPARC -1 running at 200


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PDF STP5111A 32kx36 MC10ELV111 PA-200 STP1030A)
UltraSPARC IIIi

Abstract: UltraSPARC iie ultrasparc AF5A
Text: ) External ` Cache RAM Memory Interface Unit (MIU) UltraSPARC - I Bu £ Figure 1. F unctional Block , this bus. (3.3V, UPA)"1 Bidirectional radial UltraSPARC -1 Bus signal betw een UltraSPARC -1 and the system. Driven by UltraSPARC -1 to initiate SYSADR transactions to the system. Driven by the sys tem to initiate Coherency, Interrupt or Slave transactions to UltraSPARC -1. Synchronous to the system clock. (3.3 V, UPA) UltraSPARC -1 system address bus arbitration request from up to 3 other UltraSPARC -1 bus


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PDF 64-bit STP1030A P1030A STP1030A UltraSPARC IIIi UltraSPARC iie ultrasparc AF5A
2001 - itanium merced

Abstract: intel 283 PowerPC 7400 MPC7400 Sun UltraSparc UltraSPARC-III
Text: processor is nearly 10 times faster Virtual Private Networks (VPN) are than the Sun UltraSPARC III , public-key performance. Also included in those analyses is performance data for the Sun UltraSPARC III , all functional units for the bulk of this computation. This processors (Ref. 7) · Sun UltraSPARC , non-pipelined · Sun UltraSPARC III processor IBM The Alpha 21264/21364 has a single pipelined 64 , Performance Comparison problems with key distribution. In publicProcessor ItaniumTM Processor Sun


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PDF 0101/CMD/JH/1K itanium merced intel 283 PowerPC 7400 MPC7400 Sun UltraSparc UltraSPARC-III
STP51

Abstract: No abstract text available
Text: S T P 5111A S un M ic r o e le c t r o n ic s July 1997 UltraSPARC TM -l CPU Module , , small form factor processor m odule, which interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The m ain com ponents on the m odule are: one UltraSPARC-I CPU, two UltraSPARC -1 UDB data , available with the UltraSPARC -1 running at 200 MHz. The interface to the m odule is through a high-speed edge connector. 200 MHz UltraSPARC -1 + 1 MB E-Cache + UDBs Features High performance UltraSPARC


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PDF 32kx36 MC10ELV111 STP5111AU PA-200 STP1030A) STP51
Not Available

Abstract: No abstract text available
Text: STP5110A S un M ic r o e l e c t r o n ic s J u ly 1997 UltraSPARC ™ CPU Module -! , interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The m ain com ponents on the m odule are: one UltraSPARC -1 CPU, two UltraSPARC-I UDB data buffer chips, one 32kx36 tag SRAM , four 32kx36 , interface at a 2:1 frequency ratio. The m odule w ill be available w ith the UltraSPARC -1 running at 167 , €¢ High perform ance UltraSPARC -1 CPU module • Delivers approxim ately 7.7 SPEC int95, 11.4 SPEC


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PDF STP5110A 32kx36 32kx36 MC100LVE111 5110AUPA-167 STP1030A)
instruction set Sun SPARC T3

Abstract: Sun UltraSparc T2 "64-Bit Microprocessor" instruction set Sun SPARC T5 UltraSPARC ii SUN MICROELECTRONICS Sun UltraSparc SPARC v9 architecture BLOCK DIAGRAM Sun UltraSparc T1 ULTRASPARC-II integer execution unit
Text: STP1031 Sun Microelectronics July 1997 UltraSPARC™-!! DATA SHEET Second Generation SPARC , second generation of UltraSPARC pipeline-based products. In addition to using a new process technology , External ' Cache RAM Sun icroelectronics July 1997 This Material Copyrighted By Its Respective , Sun Microelectronics 3 This Material Copyrighted By Its Respective Manufacturer STP1031 , Timing Considerations Section on page 21 for more detail.) Sun icroelectronics July 1997 This


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PDF STP1031 64-Bit STP1031, STP1031 787-Pin instruction set Sun SPARC T3 Sun UltraSparc T2 "64-Bit Microprocessor" instruction set Sun SPARC T5 UltraSPARC ii SUN MICROELECTRONICS Sun UltraSparc SPARC v9 architecture BLOCK DIAGRAM Sun UltraSparc T1 ULTRASPARC-II integer execution unit
STP5111

Abstract: No abstract text available
Text: e s c r ip t io n The UltraSPARC -1 module is a high performance, SPARC V9 compliant, small form factor processor module, which interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The , with the system interface at a 2:1 frequency ratio. The module will be available with the UltraSPARC , UltraSPARC -1 + 1 MB E-Cache + UDBs Features · High performance UltraSPARC -1 CPU module · Programmable bus , scalable systems to be built · UltraSPARC 's pipelined E-Cache interface delivers high performance · Allows


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PDF 32kx36 64kxl8 MC10ELV111 5111AUPA-200 STP1030A) STP5111
UltraSPARC ii

Abstract: No abstract text available
Text: STP5110A S un M ic r o e le c t r o n ic s July 1997 UltraSPARC TM -l CPU Module , , small form factor processor m odule, which interfaces to the UltraSPARC Port Architecture (UPA) interconnect bus. The m ain com ponents on the m odule are: one UltraSPARC-I CPU, two UltraSPARC -1 UDB data , available with the UltraSPARC -1 running at 167 MHz. The interface to the m odule is through a high-speed edge connector. 167 MHz UltraSPARC -1 + 0.5 MB E-Cache + UDBs Features High performance


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PDF STP5110A 32kx36 32kx36 MC100LVE111 STP511 STP51 OAUPA-167 STP1030A) UltraSPARC ii
2005 - ultraspark

Abstract: LTC1706-63 LTC3819 Sun UltraSparc
Text: PolyPhase DC/DC Controller for New SUN UltraSPARC ® and SPARC® Processors MILPITAS, CA ­ December 5, 2005 ­ , integrated MOSFET drivers and an on-board 5-bit digital interface designed to power Sun Microsystems' new , -lead SSOP package. The LTC3819's 5-bit VID code corresponds to the core voltage range of Sun 's new , meet the 1.025V to 1.4125V range (more.) Single-Chip PolyPhase DC/DC Controller for New SUN UltraSpark® and Spark® Processors Page 2 required by the new Sun processors. The LTC1706-63 is housed


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PDF LTC3819, LTC3819 1-800-4-LINEAR ultraspark LTC1706-63 Sun UltraSparc
2000 - Contivity Extranet Switch 4500

Abstract: AH3214015-1 "L2TP" "PPTP"
Text: None Intel/Pentium 300 MHz and greater Solaris 2.7 (Solaris 7) None SPARC/ UltraSPARC Solaris 2.5.1, 2.6, 2.7 (Solaris 7) None SPARC/ UltraSPARC Solaris 2.5.1, 2.6, 2.7 (Solaris 7) HP OpenView 4.1.x, 5.0.x, 6.x SPARC/ UltraSPARC Solaris 2.5.1, 2.6, 2.7 (Solaris 7) Sun , 5.2* None SPARC/ UltraSPARC Red Hat Linux 5.2* None *Not officially supported


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1997 - AE21 ARRAY DIODE

Abstract: Sun UltraSparc T1 STP2223BGA ac10 stc AAD20
Text: the primary connection on an UltraSPARC CPU board between the UPA System Bus (including UltraSPARC , master and slave port connection to the high-speed UltraSPARC UPA Interconnect Architecture. The UPA is , busses. · A "Mondo-Vector" Dispatch Unit, or MDU, for delivering Interrupt requests to UltraSparc CPU , U2P in a PCI UltraSPARC system. U2P connects to the System Controller chip and other UPA ports via , UPA is UltraSPARC 's packet switched main system bus. In an UltraSPARC system, the UPA can operate up


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PDF STP2223BGA AE21 ARRAY DIODE Sun UltraSparc T1 STP2223BGA ac10 stc AAD20
diode marking code e26

Abstract: PIN DIAGRAM of IC AD 524 ultrasparc
Text: The U2P * chip is the primary connection on an UltraSPARC CPU board between the UPA System Bus (including UltraSPARC Processors and Memory) and a PCI based I/O Subsystem. Its major functions are UPA port , . UPA to PCI Interface Features · Full master and slave port connection to the high-speed UltraSPARC , requests to UltraSparc CPU modules, including support for PCI interrupts from up to six total slots, as , possible configuration of U2P in a PCI UltraSPARC system. U2P connects to the System Controller chip and


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