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Part Manufacturer Description Datasheet Download Buy Part
SPARTAN-6LX16-REF Texas Instruments Spartan-6 LX16 Eval Kit
SPARTAN-6-LX150T-REF Texas Instruments Spartan-6 LX150T Dev Kit
SPARTAN-3TM-CYCLONE-IITM-PCI-EXPRESS-DEV-KIT Texas Instruments Spartan 3?/Cyclone II? based x1 PCI Express Development kit

Spartan-6 LXT Datasheets Context Search

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2010 - virtex-6 ML605 user guide

Abstract: virtex-7 sp605 verilog code 8 bit LFSR UG476 ARM v7 block diagram virtex7
Text: LXT Family Resource Usage for Streaming with 2-Byte Lane Width Spartan-6 LXT Family Lanes 1 , 2 Table 11: Spartan-6 LXT Family Resource Usage for Framing with 2-Byte Lane Width Spartan-6 LXT , IP Aurora 8B/10B v7.1 Table 12: Spartan-6 LXT Family Resource Usage for Streaming with 4-Byte Lane Width Spartan-6 LXT Family Lanes 1 2 4 Streaming Duplex Resource Type FFs LUTs FFs LUTs FFs LUTs , RX Only 170 117 383 284 683 493 Table 13: Spartan-6 LXT Family Resource Usage for Framing with 4


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PDF 8B/10B DS797 virtex-6 ML605 user guide virtex-7 sp605 verilog code 8 bit LFSR UG476 ARM v7 block diagram virtex7
2010 - virtex-7

Abstract: Aurora LX240T virtex7 vhdl coding for error correction and detection xilinx virtex-7 Spartan-6 LXT LX240T-FF1156 kintex 7
Text: LXT Family Resource Usage for Streaming with 2-Byte Lane Width Spartan-6 LXT Family Lanes 1 , 2 Table 11: Spartan-6 LXT Family Resource Usage for Framing with 2-Byte Lane Width Spartan-6 LXT , Aurora 8B/10B v8.1 Table 12: Spartan-6 LXT Family Resource Usage for Streaming with 4-Byte Lane Width Spartan-6 LXT Family Lanes 1 2 4 Streaming Duplex Resource Type FFs LUTs FFs LUTs FFs LUTs Simplex , Only 170 117 383 284 683 493 Table 13: Spartan-6 LXT Family Resource Usage for Framing with 4


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PDF 8B/10B DS797 virtex-7 Aurora LX240T virtex7 vhdl coding for error correction and detection xilinx virtex-7 Spartan-6 LXT LX240T-FF1156 kintex 7
2008 - virtex-6 ML605 user guide

Abstract: vhdl code 8 bit LFSR UG353 3030 xilinx aurora GTX virtex-5 ML605 user guide SP006 65Gbps simple 32 bit LFSR using verilog virtex 5 fpga utilization
Text: Core Specifics Virtex-5 LXT /SXT/FXT/TXT Virtex- 6 LXT /SXT/CXT/HXT, -1L Spartan-6 LXT LocalLink , LogiCORE IP Aurora 8B/10B v5.3 Table 12: Spartan-6 LXT Family Resource Usage for Streaming for 2-byte Lane Width Spartan-6 LXT Family Lanes 1 Streaming Duplex Resource Type FFs LUTs FFs LUTs FFs LUTs , : Spartan-6 LXT Family Resource Usage for Framing for 2-byte Lane Width Spartan-6 LXT Family Lanes 1 , 224 502 407 801 642 2 2 4 2 Table 14: Spartan-6 LXT Family Resource Usage for Streaming


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PDF 8B/10B DS637 virtex-6 ML605 user guide vhdl code 8 bit LFSR UG353 3030 xilinx aurora GTX virtex-5 ML605 user guide SP006 65Gbps simple 32 bit LFSR using verilog virtex 5 fpga utilization
2009 - Not Available

Abstract: No abstract text available
Text: Transceivers Low-Cost, Easy-to-Use Connectivity Solutions for Spartan- 6 FPGAs • Spartan-6 LXT FPGAs are , SPARTAN-6 LXT FPGA • Lowest-Cost Logic • Low-Cost Serial Connectivity - 8 GTP 3.1258Gb/s , controller design GbE (RJ-45) Spartan-6 LXT FPGA Virtex- 6 Connectivity Targeted Reference Design includes: Memory GTP User Application Virtex- 6 LXT FPGA Glue Logic Local Link to AXI4 , Transceivers • Virtex- 6 LXT /SXT FPGAs serve applications that require high-performance logic, DSP, and


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PDF 125Gb/s) power00
2009 - virtex 6 fpga based image processing

Abstract: SPARTAN-6 image processing spartan 6 LX150t Xilinx Spartan-6 FPGA Kits DSP48A1 Digital filter design for SPARTAN 6 FPGA car central lock virtex 5 fpga based image processing PCIe Endpoint spi flash spartan 6
Text: standards-based configuration. Spartan-6 LXT FPGAs extend the LX family to deliver up to eight 3.125Gbps GTP , Spartan-6 LXT : 100Mbps to 3.125Gbps Implement serial protocols at lowest power PCI Express Block in Spartan-6 LXT FPGA Integrated block for PCI Express designs Optimized Power Saving Modes Hibernate , FPGA FAMILY spartan- 6 FPGAs Th e Low-Cost Programmable Silicon Foundation for Targeted , for low cost and low power, the new Spartan®- 6 family is the answer. This silicon foundation of the


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2010 - LPDDR KINTEX 7

Abstract: SPARTAN-6 spartan6 ug384 XA6SLX75
Text: optimized • XA Spartan-6 LXT FPGA: High-speed serial connectivity Automotive Temperatures: â , . All XA Spartan-6 LXT devices have 2–4 gigabit transceiver circuits. Each GTP transceiver is a , supports a data rate of 2.0 Gb/s per lane. The XA Spartan-6 LXT devices include one integrated Endpoint , Spartan- 6 LX -2, -3 -2, -3(1) XA Spartan-6 LXT -2, -3 -2, -3(1) Notes: 1. The , Guide (UG386) This guide describes the GTP transceivers available in all Spartan-6 LXT FPGAs. Spartan- 6


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PDF DS170 UG382) UG393) UG394) LPDDR KINTEX 7 SPARTAN-6 spartan6 ug384 XA6SLX75
2010 - XA6SLX45

Abstract: Spartan-6 FPGA iodelay XA6SLX75 XA6SLX16 UG381 Xa6SLX9 2FGG484 SPARTAN 6 UG385 Spartan-6 PCB design guide
Text: Spartan- 6 LX FPGA: Logic optimized · XA Spartan-6 LXT FPGA: High-speed serial connectivity Automotive , capable of coping with the signal integrity issues at these high data rates. All XA Spartan-6 LXT , supports a data rate of 2.0 Gb/s per lane. The XA Spartan-6 LXT devices include one integrated Endpoint , ) available in all Spartan- 6 devices. This guide describes the GTP transceivers available in all Spartan-6 , transceivers, the LX and LXT pinouts are not compatible. Table 2: XA Spartan- 6 Device-Package Combinations and


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PDF DS170 UG382) UG393) UG386) XA6SLX45 Spartan-6 FPGA iodelay XA6SLX75 XA6SLX16 UG381 Xa6SLX9 2FGG484 SPARTAN 6 UG385 Spartan-6 PCB design guide
2010 - SPARTAN 6 UG385

Abstract: XA6SLX16 XA6SLX100 iodelay FTG256 Spartan-6 PCB design guide XA6SLX4 XA6sLx25
Text: Family: · XA Spartan- 6 LX FPGA: Logic optimized · XA Spartan-6 LXT FPGA: High-speed serial connectivity , . All XA Spartan-6 LXT devices have 2­4 gigabit transceiver circuits. Each GTP transceiver is a combined , /s per lane. The XA Spartan-6 LXT devices include one integrated Endpoint block for PCI Express , Range Device Family I-Grade ­40°C to +100°C XA Spartan- 6 LX XA Spartan-6 LXT Notes: 1. The Q-Grade , (UG386) This guide describes the GTP transceivers available in all Spartan-6 LXT FPGAs. Spartan- 6 FPGA


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PDF DS170 UG388) UG393) UG394) SPARTAN 6 UG385 XA6SLX16 XA6SLX100 iodelay FTG256 Spartan-6 PCB design guide XA6SLX4 XA6sLx25
2009 - Spartan-6 Family Overview

Abstract: Spartan-6 DS160 XC6SLX SPARTAN 6 UG385 CSG324 XC6SL XC6SLX150 spartan6 XC6slx45
Text: Spartan- 6 FPGA Features · Spartan- 6 Family: · Spartan- 6 LX FPGA: Logic optimized · Spartan-6 LXT FPGA , . All Spartan-6 LXT devices have 2­8 gigabit transceiver circuits. Each GTP transceiver is a combined , /s per lane. The Spartan-6 LXT devices include one integrated Endpoint block for PCI Express , Spartan-6 LXT Commercial (C) 0°C to +85°C -3, -3N, -2, -1L -3, -3N, -2 Industrial (I) ­40°C to , guide describes the GTP transceivers available in all the Spartan-6 LXT FPGAs. Spartan- 6 FPGA DSP48A1


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PDF DS160 DS172) UG388) UG393) Spartan-6 Family Overview Spartan-6 DS160 XC6SLX SPARTAN 6 UG385 CSG324 XC6SL XC6SLX150 spartan6 XC6slx45
2009 - SPARTAN 6 xc6slx45 pin configuration

Abstract: XC6SLX45 spartan 6 partial configuration Spartan-6 FPGA iodelay XC6SLX16 XC6SLX9 SPARTAN 6 xc6slx45 XC6SLX150 DS160
Text: optimized - Spartan-6 LXT FPGA: High-speed serial connectivity Designed for low cost - Multiple efficient , signal integrity issues at these high data rates. All Spartan-6 LXT devices have 2­8 gigabit , ). When using 8B/10B encoding, this supports a data rate of 2.0 Gb/s per lane. The Spartan-6 LXT , transceivers available in all the Spartan-6 LXT FPGAs. Spartan- 6 FPGA Configuration Guide (UG380) This , transceivers, the LX and LXT pinouts are not compatible. Table 2: Spartan- 6 Device-Package Combinations and


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PDF DS160 UG382) UG393) UG386) SPARTAN 6 xc6slx45 pin configuration XC6SLX45 spartan 6 partial configuration Spartan-6 FPGA iodelay XC6SLX16 XC6SLX9 SPARTAN 6 xc6slx45 XC6SLX150 DS160
2009 - xc6slx45 pinout

Abstract: DS160 xc6slx75t XC6SLX4 2 CSG225 I XC6SLX75 XC6SLX45 XC6SLX9 2 CSG225 I XC6SLX16 SPARTAN 6 DS162 ISERDES spartan 6
Text: : Logic optimized · Spartan-6 LXT FPGA: High-speed serial connectivity Designed for low cost · , of coping with the signal integrity issues at these high data rates. All Spartan-6 LXT devices have , /s per lane. The Spartan-6 LXT devices include one integrated Endpoint block for PCI Express , transceivers available in all the Spartan-6 LXT FPGAs. Spartan- 6 FPGA Configuration Guide (UG380) This , Table 2. Due to the transceivers, the LX and LXT pinouts are not compatible. Table 2: Spartan- 6


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PDF DS160 UG382) UG393) UG386) xc6slx45 pinout DS160 xc6slx75t XC6SLX4 2 CSG225 I XC6SLX75 XC6SLX45 XC6SLX9 2 CSG225 I XC6SLX16 SPARTAN 6 DS162 ISERDES spartan 6
2009 - iodelay

Abstract: SPARTAN-6 GTP DSP48A1 SPARTAN 6 peripherals datasheet XC6SLX75 DS160 spi flash spartan 6 Spartan-6 PCB design guide XC6SLX25 UG381
Text: : Logic optimized · Spartan-6 LXT FPGA: High-speed serial connectivity Designed for low cost · , signal integrity issues at these high data rates. All Spartan-6 LXT devices have 2­8 gigabit , /10B encoding, this supports a data rate of 2.0 Gb/s per lane. The Spartan-6 LXT devices include one , (UG382) This guide describes the GTP transceivers available in all the Spartan-6 LXT FPGAs. Spartan- 6 , transceivers, the LX and LXT pinouts are not compatible. Table 2: Spartan- 6 Device-Package Combinations and


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PDF DS160 UG394) UG383) DS170) iodelay SPARTAN-6 GTP DSP48A1 SPARTAN 6 peripherals datasheet XC6SLX75 DS160 spi flash spartan 6 Spartan-6 PCB design guide XC6SLX25 UG381
2009 - DS160

Abstract: SPARTAN 6 XC6SLX45T Spartan-6 FPGA spi flash spartan 6 XC6SLX45 XC6SLX75T xc6slx75 XC6SLX16 iodelay
Text: optimized - Spartan-6 LXT FPGA: High-speed serial connectivity Designed for low cost - Multiple efficient , these high data rates. All Spartan-6 LXT devices have 2­8 gigabit transceiver circuits. Each GTP , /10B encoding, this supports a data rate of 2.0 Gb/s per lane. The Spartan-6 LXT devices include one , Spartan- 6 devices. This guide describes the GTP transceivers available in all the Spartan-6 LXT FPGAs , , the LX and LXT pinouts are not compatible. Table 2: Spartan- 6 Device-Package Combinations and Maximum


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PDF DS160 UG382) UG393) UG386) DS160 SPARTAN 6 XC6SLX45T Spartan-6 FPGA spi flash spartan 6 XC6SLX45 XC6SLX75T xc6slx75 XC6SLX16 iodelay
2009 - UG380

Abstract: Spartan-6 PCB design guide XC6SLX45T XC6SLX25 lx25t XC6SLX150 XC6SLX45 XC6SLX100 spartan6 block ram iodelay
Text: : Logic optimized · Spartan-6 LXT FPGA: High-speed serial connectivity Designed for low cost · , these high data rates. All Spartan-6 LXT devices have 2­8 gigabit transceiver circuits. Each GTP , supports a data rate of 2.0 Gb/s per lane. The Spartan-6 LXT devices include one integrated Endpoint block , ) This guide describes the GTP transceivers available in all the Spartan-6 LXT FPGAs. Spartan- 6 FPGA , 11 Spartan- 6 Family Overview DS160 (v1.7) March 21, 2011 Preliminary Product Specification


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PDF DS160 UG383) UG384) UG386) DSP48A1 UG389) UG380 Spartan-6 PCB design guide XC6SLX45T XC6SLX25 lx25t XC6SLX150 XC6SLX45 XC6SLX100 spartan6 block ram iodelay
2012 - R_10024

Abstract: Avateq, NXP and Xilinx join to meet design challenge
Text: ActiveCore platform. For example, the Spartan-6 LXT includes 3.2 Gbps GTP transceivers, which are ideal for , logic using cost-effective Xilinx, Inc. (San Jose, CA, www.xilinx.com) Spartan- 6 FPGAs. Utilizing NXP , interworking between the Spartan- 6 FPGA and NXP Semiconductors’ CGV high speed converters. Xilinx FPGAs , be found at www.avateq.com. Xilinx Spartan- 6 FPGA SP605 evaliation board SP605-ADC1613D125 SFP , repeater Xilinx Spartan- 6 FPGA SP605 evaliation board SP605-DAC1408D650 SFP adaptor (AVQ-SP6DAC-SFP


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2010 - Xilinx Spartan6 Design Kit

Abstract: vhdl code for spartan 6 AMBA AXI specifications displayport 1.3 STANDARD VESA Video Electronics Standards Association Local Bus vhdl code for spartan 6 audio virtex5 vhdl code for dvi controller axi wrapper spdif input processor FIFO AMBA AXI verilog code
Text: supported device families are: · · · · · · · Virtex-7 Kintex-7 Virtex- 6 LXT Virtex- 6 SXT Virtex- 6 HXT Spartan-6 LXT XA Spartan-6 LXT References 1. 2. 3. 4. 5. 6 . 7. 8. 9. VESA DisplayPort Standard v1 , Specifics Supported Device Family (1) Supported User Interfaces Virtex-7, Kintex-7, Virtex- 6 , Spartan- 6 , specifically for the Spartan- 6 FPGA Consumer Video Kit (CVK). XAPP593, Displayport Sink Reference Design , Spartan- 6 FPGA Consumer Video Kit (CVK1.0). Both documents can be found on xilinx.com. I/O Signals


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PDF DS802 Xilinx Spartan6 Design Kit vhdl code for spartan 6 AMBA AXI specifications displayport 1.3 STANDARD VESA Video Electronics Standards Association Local Bus vhdl code for spartan 6 audio virtex5 vhdl code for dvi controller axi wrapper spdif input processor FIFO AMBA AXI verilog code
2010 - XC6SLX25T-CSG324

Abstract: SPARTAN-6 Spartan-6 FPGA UG386 spartan ucf file 6 "network interface cards" spartan 6 UG672 SPARTAN-6 GTP xc6slx25tcsg324
Text: guarantee critical timing Uses GTP transceivers for Spartan-6 LXT devices · · · · 2.5 Gbps line speed , v LogiCORE IP Spartan- 6 FPGA Integrated Endpoint Block v2.4 for PCI Express DS801 January 18, 2012 Product Specification Introduction The LogiCORETM IP Spartan®- 6 FPGA Integrated Endpoint Block , for use with Spartan- 6 FPGAs. The Spartan- 6 FPGA Integrated Endpoint Block for PCI Express (PCIe , PCIe Base Specification Compliance 1-lane Integrated Endpoint Block Spartan- 6 32 x1 2.5 GT/s v1


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PDF DS801 XC6SLX25T-CSG324 SPARTAN-6 Spartan-6 FPGA UG386 spartan ucf file 6 "network interface cards" spartan 6 UG672 SPARTAN-6 GTP xc6slx25tcsg324
AES-S6DEV-LX150T-G

Abstract: DS-KIT-FX12MM1-G SPARTAN-3 XC3S400 based MXS3FK VIRTEX-5 LX110 SPARTAN-3 XC3S400 Virtex 5 LX50T VIRTEX-5 DDR2 controller AES-XLX-V4FX-PCIE100-G virtex 5 fpga based image processing MXS3FK-PQ208-001-IM
Text: Xilinx Spartan-6 LXT FPGA family. Avnet AES-S6EV-LX16-G Spartan- 6 LX16 Evaluation Kit Spartan- 6 , Virtex- 6 Development Boards & Kits Part Number Product Name Short Description Vendor , for high-definition image sensor cameras to Spartan- 6 or Virtex- 6 FMC enabled baseboards. Avnet , designers implementing FPGA-based PCI Express designs on the Virtex-5 LXT family; features 8 high speed , environment for PCI Express designers implementing FPGA-based PCI Express designs on the Virtex-5 LXT family


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PDF LX110T/SX95T 512MByte TD-BD-TS101 TB-3S-1400A-IMG XC3A1400A AES-S6DEV-LX150T-G DS-KIT-FX12MM1-G SPARTAN-3 XC3S400 based MXS3FK VIRTEX-5 LX110 SPARTAN-3 XC3S400 Virtex 5 LX50T VIRTEX-5 DDR2 controller AES-XLX-V4FX-PCIE100-G virtex 5 fpga based image processing MXS3FK-PQ208-001-IM
2009 - virtex5 vhdl code for dvi controller

Abstract: displayport implementation using verilog AMBA APB bus protocol vhdl code for spartan 6 audio HDMI verilog code DS735 LogiCORE IP DisplayPortTM v1.3 APB to I2C interface ModelSim 6.5c UG366
Text: a list of supported device families. · · · · · · · · Virtex- 6 LXT Virtex- 6 SXT Virtex- 6 HXT Virtex-5 LXT Virtex-5 SXT Virtex-5 TXT Virtex-5 FXT Spartan-6 LXT References 1. VESA , Standard v1.1a specification [Ref 1]. Spartan®- 6 , Virtex®- 6 and Virtex-5 families are supported. Included , ://www.digital-cp.com. [Ref 6 ] Virtex- 6 , Virtex-5, Spartan- 6 Synthesis Xilinx XST Support Provided by , protection according to the HDCP v1.3 Standard [Ref 6 ]. A pre-synthesis directive includes this module, which


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PDF DS735 virtex5 vhdl code for dvi controller displayport implementation using verilog AMBA APB bus protocol vhdl code for spartan 6 audio HDMI verilog code LogiCORE IP DisplayPortTM v1.3 APB to I2C interface ModelSim 6.5c UG366
2009 - zynq cpri ethernet software example

Abstract: virtex-7 GTH2 virtex7 zynq axi ethernet software example 3030 xilinx gtx 970
Text: . Designs implemented on Virtex-5 LXT /SXT and Spartan-6 LXT devices operate at line rates of 614.4 Mb/s , specification in Virtex-7, Kintex-7, Virtex- 6 , Spartan- 6 and Virtex-5 LXT /SXT/FXT devices. The CPRI core , 3072.0 Mb/s 4915.2 Mb/s 6144.0 Mb/s 9830.4 Mb/s Virtex- 6 LXT /SXT (-1/-1L speed grade , (FPGA) RocketIOTM GTP and GTX transceivers, Virtex- 6 FPGA GTXE1 transceivers, Virtex-7 and KintexTM-7 FPGA GTXE2 and GTH2 transceivers or Spartan®- 6 FPGA GTPA1 transceivers to implement the Physical Layer


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PDF DS611 zynq cpri ethernet software example virtex-7 GTH2 virtex7 zynq axi ethernet software example 3030 xilinx gtx 970
2009 - MDIO clause 45 specification

Abstract: MDIO clause 45 MDIO vhdl code for ethernet csma cd vhdl code for mac interface vhdl code for ethernet mac spartan 3 Xilinx ISE Design Suite 9.2i ffs 642 verilog code for frame synchronization SPARTAN-6 mgt
Text: . Speed grade restricted to -3 and higher for Spartan-6 LXT devices. 2. Please see Table 10-14 for , Virtex- 6 , Virtex- 6 Lower Power Virtex-5 FXT/ LXT /SXT/TXT Virtex-4 FX Spartan-61 Supported Device , Unit Interface (XAUI) solution for the Xilinx® Virtex®- 6 , Virtex-5, Virtex-4, and Spartan®- 6 FPGA families. The Virtex- 6 , Virtex-5, Virtex-4, and Spartan- 6 FPGA families in combination with the XAUI core , specification Uses four transceivers at 3.125 Gbps line rate to achieve 10-Gbps data rate - Virtex- 6 FPGA GTX


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PDF DS266 10-Gbps 10-Gigabit MDIO clause 45 specification MDIO clause 45 MDIO vhdl code for ethernet csma cd vhdl code for mac interface vhdl code for ethernet mac spartan 3 Xilinx ISE Design Suite 9.2i ffs 642 verilog code for frame synchronization SPARTAN-6 mgt
2010 - DXAU

Abstract: xilinx logicore fifo generator 6.2 Xilinx ISE Design Suite 9.2i 10Gigabit Ethernet PHY MDIO clause 45 specification 10G Ethernet PHy verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3 kintex 7
Text: operation are listed in the following table. Table 10: Speed Grades Device Virtex-7 Kintex-7 Virtex- 6 LXT /SXT/HXT Virtex- 6 CXT Spartan-6 LXT Virtex-5 FXT/ LXT /SXT/TXT Virtex-4 FX 1. For FFG packages only , Unit Interface (XAUI) solution for the Virtex®-7, KintexTM-7, Virtex- 6 , Virtex-5, Virtex-4, and Spartan®- 6 Field Programmable Gate Array (FPGA) devices. Supported Device Family 1 Supported User Interfaces LogiCORE IP Facts Core Specifics Virtex-7, Kintex-7, Virtex- 6 , Spartan- 6 , Virtex-5, Virtex-4 64-bit XGMII


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PDF DS266 10-Gb/s 10-Gigabit 64-bit DXAU xilinx logicore fifo generator 6.2 Xilinx ISE Design Suite 9.2i 10Gigabit Ethernet PHY MDIO clause 45 specification 10G Ethernet PHy verilog code for 10 gb ethernet vhdl code for ethernet mac spartan 3 kintex 7
2009 - XC6SLX45

Abstract: Spartan-6 LX45 XC6SLX45-CSG484 XC6SLX16-CSG324 xc6slx16 XC6SLX25 XC6SLX75T XC6SLX16CSG324 XC6SLX150 xc6slx45t
Text: 70 Spartan- 6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v1.4) March 10, 2010 Advance Product Specification Spartan- 6 FPGA Electrical Characteristics Spartan®- 6 LX FPGAs are available in -3, -2, and -1L speed grades, with -3 having the highest performance. Spartan-6 LXT FPGAs are , Specifications GTP transceivers are available in the Spartan-6 LXT family of devices. See DS160: Spartan- 6 , Designs Switching Characteristics The Endpoint block for PCI Express is available in the Spartan-6 LXT


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PDF DS162 XC6SLX45 Spartan-6 LX45 XC6SLX45-CSG484 XC6SLX16-CSG324 xc6slx16 XC6SLX25 XC6SLX75T XC6SLX16CSG324 XC6SLX150 xc6slx45t
2009 - XC6SLX25-CSG324

Abstract: FG484 XC6SLX9-CSG225 XC6slx45 lx25t ISERDES XC6SLX25 XC6SLX25CSG324 xc6slx16 csg225
Text: 73 Spartan- 6 FPGA Data Sheet: DC and Switching Characteristics DS162 (v1.9) August 23, 2010 Advance Product Specification Spartan- 6 FPGA Electrical Characteristics Spartan®- 6 LX FPGAs are available in -3, -2, and -1L speed grades, with -3 having the highest performance. Spartan-6 LXT FPGAs are , Characteristics GTP Transceiver Specifications GTP transceivers are available in the Spartan-6 LXT family of , Switching Characteristics The Endpoint block for PCI Express is available in the Spartan-6 LXT family


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PDF DS162 XC6SLX25-CSG324 FG484 XC6SLX9-CSG225 XC6slx45 lx25t ISERDES XC6SLX25 XC6SLX25CSG324 xc6slx16 csg225
2010 - UG394

Abstract: spartan 6 LX150 SPARTAN 6 Configuration XC6SLX16L-1LCSG324 SPARTAN 6 lx FPGA XC6SL spartan6 Spartan-6 FPGA DCM_CLKGEN xc6slx75 UG381
Text: guide describes the GTP transceivers available in the Spartan-6 LXT FPGAs. · Spartan- 6 FPGA , Spartan- 6 FPGA Power Management User Guide UG394 (v1.0) May 18, 2010 Xilinx is disclosing , document. Date Version 05/18/10 1.0 Revision Initial Xilinx release. Spartan- 6 FPGA Power , . . . . . . . . . . . . . . . . 6 Chapter 1: Power Management With Suspend Mode Introduction . . , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Spartan- 6 FPGA Power


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PDF UG394 UG394 spartan 6 LX150 SPARTAN 6 Configuration XC6SLX16L-1LCSG324 SPARTAN 6 lx FPGA XC6SL spartan6 Spartan-6 FPGA DCM_CLKGEN xc6slx75 UG381
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