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STS-48/STM16 Datasheets Context Search

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SFI4

Abstract: PEB2757AE STM-16 STM-64
Text: PEB2757AE TETHYSTM II 4 STS-192/STM-64, 16 STS- 48 / STM-16 , MUX/DEMUX OCT 2009 REV. 1.0.0 GENERAL DESCRIPTION · Processes SONET/SDH sixteen STS- 48 / STM-16 or a TethysTM II PEB2757AE is , -192/STM64 or mix of sixteen MUX/DEMUX channels of STS- 48 / STM-16 or STS-12/STM-4 or STS-3/STM-1 (in groups , direction, TethysTM II PEB2757AE accepts either two STS-192/ STM-64 or sixteen STS- 48 / STM-16 , or a mix of , accepts sixteen STS- 48 / STM-16 signals in serial 2.5 Gbit/s format. TethysTM II PEB2757AE further


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PDF PEB2757AE STS-192/STM-64, STS-48/STM-16, STS-48/STM-16 PEB2757AE STS-192/STM64 STS-48/STM-16 STS-12/STM-4 STS-192/ SFI4 STM-16 STM-64
2001 - STM-16

Abstract: No abstract text available
Text: · Supports STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux functions · 8-bit LVDS data path for STS- 48 / STM-16 , chip is a fully integrated STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux device. The S3045 performs all , -12/ STM-4 data streams into/from a single STS- 48 / STM16 data stream. The S3045 functions in conformance , / demultiplex four STS-12/STM-4 data streams into a single STS- 48 / STM-16 data stream. Each of the four STS , compatibility with industry standard network interface processors. The STS- 48 / STM-16 data stream uses an 8


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PDF OC-12 OC-48 S3045 S3045 STS-12/STM-4 STS-48/STM-16 STM-16
2002 - 6 to 64 demux

Abstract: STM-64 64 to 4 Mux STS-192 STM-16 s19235 S19223CBI11 GR-253 FR192 xcvr
Text: /STM-16s. · Multiplexes 4 STS- 48 / STM-16 tributaries into an STS-192/ STM-64 or bypass for STS , . · Non-Intrusive TOH Monitoring for all inputs: STS-192/STM-64 or 4x STS- 48 / STM-16 . · STS-192/STM , Low-speed side supports a 622 MHz 16-bit STS-192/STM-64 interface or four 622 MHz 4-bit STS- 48 / STM-16 interfaces. · Demultiplexes an STS-192/STM-64 into 4 STS- 48 / STM-16 connections or supports a bypass mode , transparently passed-through the device on a per function basis. · STS-192/STM-64 or 4 x STS- 48 / STM-16 framer


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PDF STS-192/STM-64 S19223CBI11, STS-192/STM-64 STS-48/STM-16s. STS-48/STM-16 STS-192/ STM-64 STS-192/STM-64-to-STS-192/STM-64 STS-6c/9c/24c S3485 6 to 64 demux 64 to 4 Mux STS-192 STM-16 s19235 S19223CBI11 GR-253 FR192 xcvr
2004 - 4x2 mux

Abstract: GR-253 PEB1756E STM-16 STS-48 to48c
Text: Preliminary PEB1756E TETHYSTM 448 16 STS- 48 / STM-16 MUX/DEMUX REV. P1.0.0 GENERAL DESCRIPTION TethysTM 448 is optimized for SONET/SDH applications as a full-duplex sixteen STS- 48 / STM-16 or a , demultiplex ingress direction, TethysTM 448 accepts either sixteen STS- 48 / STM-16 , or a mix of sixteen STS , overhead transparency. In the multiplex direction, TethysTM 448 accepts sixteen STS- 48 / STM-16 signals in , -48c/ STM-16 · Supports STS-1 level pointer processing of STS- 48 / STM-16 or STM-12/STM-4 or STS-3/STM


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PDF PEB1756E STS-48/STM-16 STS-12/STM-4 STS-48/ STM-16, PEB1756E STS-48 4x2 mux GR-253 STM-16 STS-48 to48c
2002 - S4805CBI11

Abstract: danube S4805 GR-253 STS-48 STM-16 STM16 S4805CBI
Text: DANUBE Product Brief Part Number S4805CBI11, Revision 1.5, January 2003 SONET/SDH STS- 48 / STM-16 , Pointer Processors for STS- 48 / STM-16 and up to 4 x STS-12/STM-4 or 16 x STS-3/STM-1s. · TOH can be , Supports a single STS- 48 / STM-16 input. Multiplex Direction: · Provides parallel STS- 48 / STM-16 , serial 4xSTS-12/STM-4 or serial 16xSTS-3/STM-1 outputs. · Supports parallel STS- 48 / STM-16 or serial 4xSTS-12 , -48c/ AU-4-16c, STS-12c/AU-4-4c, STS-3c/AU4, or STS-1/AU-3 signals. · Provides a single STS- 48 / STM-16


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PDF S4805CBI11, STS-48/STM-16 STS-12/STM-4 4xSTS-12 16xSTS-3) STS-48 622CLK 622DATA S4805CBI11 danube S4805 GR-253 STM-16 STM16 S4805CBI
2000 - S4802

Abstract: STS-48 XCVR Fiber Optic regenerator STM-16
Text: /SDH STS- 48 / STM-16 Framer/Pointer Processor Features Features Demultiplex Direction: ·SONET/SDH Mux/Demux,Transport Overhead Terminating Transceiver, & Pointer Processors for STS- 48 / STM-16 and , -1) tributaries from an STS- 48 / STM-16 or bypass for STS- 48 /STM-16-to-STS- 48 / STM-16 connection. ·Serial STS , : ·Multiplexes 4 x (STS-12/STM-4 or 4 STS-3/STM-1) tributaries into an STS- 48 / STM-16 or bypass for STS- 48 /STM-16-to-STS- 48 , STS-1/AU-3 signals. ·STS- 48 / STM-16 Framer. ·Configurable selector for choosing low-speed


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PDF S4802 STS-48/STM-16 STS-12/STM-4 STS-48/STM-16-to-STS-48/STM-16 STS-48c/AU-4-16c, STS-12c/AU-4-4c, S4802 STS-48 XCVR Fiber Optic regenerator STM-16
PEB1757AE

Abstract: GR-253-CORE Exar cross SDH ADM sfi4.1 STM64 multiplex PEB1757E STM-16
Text: PEB1757E TETHYSTM 2 STS-192/STM-64, 16 STS- 48 / STM-16 , MUX/DEMUX MARCH 2008 REV. 1.0.2 , is optimized for SONET/SDH applications as a full-duplex two STS-192/STM64 or sixteen STS- 48 / STM-16 , , TethysTM PEB1757E accepts sixteen STS- 48 / STM-16 signals in serial 2.5 Gbit/s format. TethysTM PEB1757E , of STS- 48 / STM16 or STM-12/STM-4 or STS-3/STM-1 streams · Provides interfaces for dropping alarm , Provides 2 SFI4.1 interfaces for STS-192/STM-64 links · Provides serial STS- 48 / STM-16 , STS-12/STM-4 or STS


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PDF PEB1757E STS-192/STM-64, STS-48/STM-16, PEB1757E STS-192/STM64 STS-48/STM-16 STS-12/ STS-192/STM-64 STS48/ PEB1757AE GR-253-CORE Exar cross SDH ADM sfi4.1 STM64 multiplex STM-16
1999 - SDVB

Abstract: PM5312 PM5355 S3045
Text: Supports STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux functions · 8-bit LVDS data path for STS- 48 / STM-16 data , -4 to STS- 48 / STM-16 Mux/Demux device. The S3045 performs all necessary byte interleave and byte , single STS- 48 / STM16 data stream. The S3045 functions in conformance with SONET/SDH transmission , / demultiplex four STS-12/STM-4 data streams into a single STS- 48 / STM-16 data stream. Each of the four STS , compatibility with industry standard network interface processors. The STS- 48 / STM-16 data stream uses an 8


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PDF OC-12 OC-48 S3045 STS-12/STM-4 STS-48/STM-16 STS-48/STM-16 SDVB PM5312 PM5355 S3045
S3047

Abstract: U311D XS-3045
Text: STS- 48 / STM-16 Mux/Demux functions · 8-bit LVDS data path for STS- 48 / STM-16 data · 8-bit LVTTL data , The S3045 SONET/SDH byte interleave chip is a fully integrated STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux , multiplexing and de-multiplexing of four STS-12/ STM-4 data streams into/from a single STS- 48 / STM16 data stream , OC- 48 M UX/D EM U X 7. Frame synchronous scrambling. 8. B1 calculation and insertion. 9. STS- 48 / STM-16 , streams into a single STS- 48 / STM-16 data stream. Each of the four STS-12/STM-4 transmit/receive data


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PDF OC-48 S3045 STS-12/STM-4 STS-48/STM-16 S3041/S3042 PM5355 PM5312 311CLKINP S3047 U311D XS-3045
2002 - processor cross reference

Abstract: AU4-64c 192x192 AU44 STS-192 STM-64 STM-16 S19204CBI12 GR-253 FRGN192
Text: Monitoring for all inputs: STS-192/STM-64 or 4x STS- 48 / STM-16 . · SONET/SDH Mux/Demux, Transport Overhead , 4-bit STS- 48 / STM-16 interfaces. · Demultiplexes an STS-192/STM-64 into 4 STS- 48 / STM-16 , interface, low-speed interfaces or from APS inputs. · Multiplexes 4 STS- 48 / STM-16 tributaries into an STS , bypass (frame generation enabled) are provided. · STS-192/STM-64 or 4 x STS- 48 / STM-16 framer(s). · , function basis. · Configurable TOH Generators for STS-192/STM-64 or STS- 48 / STM-16 outputs. · Selector


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PDF S19204CBI12, STS-192/STM-64 STS-192/STM-64 STS-48/STM-16. STS-48/STM-16s. 16-bit S3485 processor cross reference AU4-64c 192x192 AU44 STS-192 STM-64 STM-16 S19204CBI12 GR-253 FRGN192
2005 - TSOT1610GP-YB21

Abstract: MARS10G el12n 1724-pin TSOT1610GP AW23 mars10g T-PRO 0AA00 1724P TSOT1610G
Text: termination/generation: - On the line side SFI-4 interface: " One STS-192/STM-64 " Four STS- 48 / STM-16 - On the MARS10G TD-Pro system interface: " One STS-192/STM64 or " Four STS- 48 / STM-16 Path processing: - , -12/ STM-3s or a single STS- 48 / STM-16 . - The TD-Pro system receive (drop) data path provides one 1 × 16/4 , ). 222 MARS10G T-Pro Backplane STS- 48 / STM-16 or STS-12/STM-4 Framing, Descrambling, and TOH , . 238 STS- 48 / STM-16 Processors


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PDF MARS10G TSOT1610GP/GPD) STS-192/STM-64 0A-301C, TSOT1610GP-YB21 el12n 1724-pin TSOT1610GP AW23 mars10g T-PRO 0AA00 1724P TSOT1610G
2002 - S3485

Abstract: GR-253 S19201 S19204 S3024 S3076 S4805 S4806
Text: Sales and Support Danube (S4805) SONET/SDH STS- 48 / STM-16 Framer/Pointer Processor Features q , Processors for STS- 48 / STM-16 and up to 4 x STS-12/STM-4 or 16 x STS-3/STM-1s. Serial STS-12/STM-4 and STS , Supports parallel STS- 48 / STM-16 or serial 4xSTS-12/STM-4 or serial 16xSTS-3/STM-1 inputs. Provides a single STS- 48 / STM-16 output. Pointer Processors for all valid input combinations of STS-48c/ AU , Supports a single STS- 48 / STM-16 input. Provides parallel STS- 48 / STM-16 , serial 4xSTS-12/STM-4 or serial


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PDF S4805) STS-48/STM-16 STS-12/STM-4 192x48 GR-253, STS-48/ STS-12/STS-3 20and S3485 GR-253 S19201 S19204 S3024 S3076 S4805 S4806
1999 - sd 4841 p

Abstract: No abstract text available
Text: · Supports STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux functions · 8-bit LVDS data path for STS- 48 / STM-16 , chip is a fully integrated STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux device. The S3045 performs all , -12/ STM-4 data streams into/from a single STS- 48 / STM16 data stream. The S3045 functions in conformance , multiplex/ demultiplex four STS-12/STM-4 data streams into a single STS- 48 / STM-16 data stream. Each of the , maintain compatibility with industry standard network interface processors. The STS- 48 / STM-16 data stream


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PDF OC-12 OC-48 S3045 S3045 STS-12/STM-4 STS-48/STM-16 sd 4841 p
1999 - Not Available

Abstract: No abstract text available
Text: · Supports STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux functions · 8-bit LVDS data path for STS- 48 / STM-16 , chip is a fully integrated STS-12/STM-4 to STS- 48 / STM-16 Mux/Demux device. The S3045 performs all , -12/ STM-4 data streams into/from a single STS- 48 / STM16 data stream. The S3045 functions in conformance , / demultiplex four STS-12/STM-4 data streams into a single STS- 48 / STM-16 data stream. Each of the four STS , compatibility with industry standard network interface processors. The STS- 48 / STM-16 data stream uses an 8


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PDF OC-12 OC-48 S3045 S3045 STS-12/STM-4 STS-48/STM-16
2003 - 2.5G DWDm

Abstract: TO-48C 2.5G GR-253 PEB1756E STM-16 STS-48 to48c
Text: Applications TethysTM 448 is optimized for SONET/SDH applications as a full-duplex sixteen STS- 48 / STM-16 or a , demultiplex ingress direction, TethysTM 448 accepts either sixteen STS- 48 / STM-16 , or a mix of sixteen STS , overhead transparency. In the multiplex direction, TethysTM 448 accepts sixteen STS- 48 / STM-16 signals in , Test Equipment TethysTM 448 Features Provides serial STS- 48 / STM-16 , STS-12/STM-4 or STS-3/STM , interface to system/backplane TFI-5 Support Processes SONET/SDH sixteen STS- 48 / STM-16 or a mix of


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PDF STS-48/STM-16 STS-12/STM-4 STS-48/ STM-16, 2.5G DWDm TO-48C 2.5G GR-253 PEB1756E STM-16 STS-48 to48c
SFP EVAL BOARD

Abstract: STS-48 XRT91L82 power supply tester schematic diagram EVM-91L82
Text: EVM-91L82 STS- 48 / STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25, 2006 2.488/2.667 GBPS STS- 48 / STM-16 SONET/SDH XRT91L82 Transceiver Evaluation Board User Manual 1 EVM-91L82 STS- 48 / STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25, 2006 Figure 1.0 XRT91L82 , . 26 2 EVM-91L82 STS- 48 / STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25 , . 41 3 EVM-91L82 STS- 48 / STM-16 SONET/SDH XRT91L82 Evaluation Board User Manual Jul 25, 2006


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PDF EVM-91L82 STS-48/STM-16 XRT91L82 XRT91L82 SFP EVAL BOARD STS-48 power supply tester schematic diagram EVM-91L82
2004 - GFp 85

Abstract: B115-H8436-X-X-7600 stm 16 mapper TUG-3 STM16 STM-16 STS-48 PEB1761
Text: Preliminary Product Brief MetroMapperTM 2.5G Multi-Service Framer for STS- 48 / STM-16 , STS , SONET/SDH transport payloads. On the line side, the MetroMapperTM 2.5G supports protected STS- 48 / STM-16 , /AU and VT/TU pointer processing capabilities Processes a single STS- 48 / STM-16 or a quad STS-12/STM , for system debugging implemented Interfaces Source synchronous STS- 48 / STM-16 or quad STS-12/STM , / 155M Line Interface Single STM-16 / STS- 48 Quad STM-4 / STS-12 Tx Packet Proces. Tx Layer 2


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PDF STS-48/ STM-16, STS-12/STM-4 STS-48/STM-16 STS-12/ B115-H8436-X-X-7600 GFp 85 B115-H8436-X-X-7600 stm 16 mapper TUG-3 STM16 STM-16 STS-48 PEB1761
2001 - s19203

Abstract: S8710 AU-4-64c danube non-blocking STS-1 switching architecture amcc 783 STM-16 S8710PBGA GR-253-CORE STM-16 intel Architecture
Text: between redundant core stage switches. · 48 x 48 serial STS- 48 / STM-16 or STS-12/STM-4 phase compensated , combinations of STS-48c/AU-416c, STS-12c/AU-4-4c, STS-3c/AU-4, or STS-1/AU-3 signals within an STS- 48 / STM-16 , , non-blocking architecture allowing any STS-Nc tributary from any of the STS- 48 / STM-16 serial-input streams to be switched to any STS-Nc tributaries in any of the STS- 48 / STM-16 serial-output streams. Any number , S8710 implements SONET/SDH framing and monitoring functions for up to 48 STS- 48 / STM-16 data streams. It


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PDF S8710PBGA S3098 S3097 S19203 S8710PBGA: s19203 S8710 AU-4-64c danube non-blocking STS-1 switching architecture amcc 783 STM-16 S8710PBGA GR-253-CORE STM-16 intel Architecture
2002 - STM-64

Abstract: GR-253-CORE STM-16 VSC9186 STM64
Text: PHYSICAL LAYER PRODUCT TIMESTREAM® PRODUCT FAMILY VSC9186 VSC9186 Killington - Quad STS- 48 / STM-16 , SPLITTER/COMBINER MODE (DWDM): F E AT U R E S : 4Bidirectional Quad STS- 48 / STM-16 or STS-192/ STM , Quad Independent STS- 48 / STM-16 or a Single STS-192/STM-64 4Pointer Processing of all Concatenation , local clock. The signal is crossconnected at the STS-1 level and then demultiplexed to four STS- 48 / STM-16 , bidirectional interfaces allow loopback of all four STS- 48 / STM-16 and the STS-192/ STM-64 interfaces


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PDF VSC9186 VSC9186 STS-48/STM-16 STS-192/STM-64 4720-pin STS-192/ STM-64 300ppm STS-48/ STM-64 GR-253-CORE STM-16 STM64
2000 - STM-16 chips

Abstract: S19201 GR-253 STS-192
Text: demultiplexing of STS- 48 / STM-16 SONET/SDH signals into an STS-192/STM-64 SONET/SDH signal. · SONET/SDH low speed side interfaces compatible with AMCC's STS- 48 / STM-16 devices. · Supports the transfer of up to four STS- 48 / STM-16 data streams, carrying any valid combination of STS-48c/AU-4-16c, STS-12c/AU , highly-integrated VLSI device that provides for the multiplexing and demultiplexing of STS- 48 / STM-16 SONET/SDH , four STS- 48 / STM-16 signals in each direction. On the multiplex side the S19201 generates section


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PDF S19201 STS-192 STS-48/STM-16 STS-192/STM-64 STS-48c/AU-4-16c, STS-12c/AU-4-4c, OC-192 STM-16 chips S19201 GR-253
624-Pin

Abstract: S19202CBI30 hdlc GR-253 S19202 STM-16 STM-64 STS-192 STS-48
Text: single STS-192/STM-64 or quad STS- 48 / STM16 line interfaces on the line side and on the protection port. Each STS- 48 / STM-16 can support a concatenated payload or can be channelized down to STS-12c/AU , STS- 48 / STM-16 . It supports framing, scrambling and descrambling, alarm signal insertion and detection , and receive directions. · Supports independent loop timing when in quad STS- 48 / STM-16 mode. · , traffic type in SONET/SDH STS-192/ STM-64 and STS- 48 / STM-16 payloads · 16-bit synchronous


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PDF S19202CBI30 STS-192 STS-192c/AU-4-64c, STS-48c/AU-4-16c STS-12c/AU-4-4c 95Gb/s. STS-192/STM-64 STS-48/STM16 STS-48/STM-16 STS-12c/AU-4-4c. 624-Pin S19202CBI30 hdlc GR-253 S19202 STM-16 STM-64 STS-48
2005 - 1292-Pin

Abstract: PM5326 STS-192 STS-48 STM-64 serdes sfi-4
Text: framer/aggregator for use in channelized STS-192/STM64 and STS- 48 / STM-16 applications. · 20 Gbit/s , : · One STS-192/STS-192c/STM64/STM-64c stream. · Four STS- 48 /STS-48c/ STM16 /STM-16c streams. · , ) for direct connection to SERDES and CRU/CSU devices. · Supports up to eight STS- 48 / STM-16 via SFI , OC-192 (STM-64) or 8 x OC- 48 ( STM-16 ) CRSU Protect PM5326 ARROW-2x192 APS Connection , PM5326 ARROW 2x192 SONET/SDH Transport Framer/Aggregator for OC- 48 and OC-192 FEATURES ·


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PDF PM5326 2x192 OC-48 OC-192 PM7390 S/UNIPM7390 MACH48 PMC-2001648 1292-Pin PM5326 STS-192 STS-48 STM-64 serdes sfi-4
STS-192

Abstract: BIMX192 VSC9116 STM-64 STM-16 stm-64 controller
Text: for combining four STS- 48 / STM-16 data streams at the drop side interface into a single STS-192/STM , ANSI, Bellcore, and ITU specifications, 4x4 cross-connection of any of the STS- 48 / STM-16 data streams in both transmit and receive direction, enhanced buffer capabilities for de-skewing STS- 48 / STM-16 data streams, SONET/SDH section generation and termination of the STS- 48 / STM-16 drop signals, four 4 , -64 section/line overhead access of line interface data stream, dedicated ports for STS- 48 / STM-16 section


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PDF VSC9116 STS-192/STM-64 VSC9116 STS-48/STM-16 16-bit, STS-192 BIMX192 STM-64 STM-16 stm-64 controller
2002 - stm-64

Abstract: STS-192 S3485 S3098 S3097 S3092 S3091 S19208 S19204 GR-253
Text: Speed Side supports a 622 MHz 16-bit STS-192/STM-64 interface or four 622 MHz 4-bit STS- 48 / STM-16 , S4805 Multiplex Direction q q q q q q Multiplexes 4 STS- 48 / STM-16 tributaries into , . Non-Intrusive TOH Monitoring for all inputs: STS-192/STM-64 or 4x STS- 48 / STM-16 . TOH can be either terminated , -192/STM-64 into 4 STS- 48 / STM-16 connections or supports a bypass mode for STS-192/STM-64to-STS-192/STM , Summary q q passed-through the device on a per function basis. STS-192/STM-64 or 4 x STS- 48 / STM-16


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PDF S19204) STS-192/STM-64 STS-192/STM-64 STS-48/STM-16s. 16-bit STS-48/STM-16 reg6/28/2005 stm-64 STS-192 S3485 S3098 S3097 S3092 S3091 S19208 S19204 GR-253
2004 - STM-16

Abstract: overhead processor OC48 XRT94L55
Text: XRT94L55 Preliminary SONET/SDH OC- 48 / STM-16 , 4XOC-12/STM-4, 16XOC-3/STM-1 FRAMER/CONCENTRATOR WITH INTEGRATED CDR'S REV. P1.0.0 GENERAL DESCRIPTION The XRT94L55 is a SONET/SDH OC- 48 / STM-16 , OC- 48 / STM-16 , 4-bit parallel LVDS compliant with TFI-5 Protocol LOW SPEED INTERFACES · Provides , modules · Provides 1+1 protected 4-bit parallel 2.488 Gbits/ sec OC- 48 / STM-16 interface, compatible with , optical interfaces · Terminates Section Overhead, Line Overhead on OC- 48 / STM-16 , 4xOC-12, 16xOC-3


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PDF XRT94L55 OC-48/STM-16, 4XOC-12/STM-4, 16XOC-3/STM-1 XRT94L55 16xOC-3/STM-1 48x48 OC-12/OC-3 STM-16 overhead processor OC48
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