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STR 2013 application Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract: No abstract text available
Text: IronwoodPremium_243200_Catalog-On-Demand1.QXD 7/10/ 2013 7:33 PM Page 63 The best connectors do more than fit your application ; they also fit your hand, and they feel good to use. At 3M, we , , as well as the application . We give you plenty of choices. Section Page Spring Connectors , /10/ 2013 7:33 PM Page 64 SPRING CONNECTORS FEATURES ADVANTAGES BENEFITS 3Mâ , 2#8 6#12 4#10 5#10 2#6 IronwoodPremium_243200_Catalog-On-Demand1.QXD 7/10/ 2013 7:33


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PDF 2011/65/EU
2013 - STR 2013 application

Abstract: No abstract text available
Text: register reset function ( STR ) sets all shift register values to zero and is independent of all clocks. Data , 12 11 10 9 Vcc Q0 DS STR STCP SHCP SHR Q7S SO-16 / TSSOP-16 Features Wide Supply , www.diodes.com June 2013 © Diodes Incorporated 74AHCT594 Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND Q7S SHR SHCP STCP STR DS Q0 Vcc Description , Q D LATCH CP Q R R STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 74AHCT594 Document


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PDF 74AHCT594 74AHCT594 DS35485 STR 2013 application
2013 - Not Available

Abstract: No abstract text available
Text: register reset function ( STR ) sets all shift register values to zero and is independent of all clocks. Data , 12 11 10 9 Vcc Q0 DS STR STCP SHCP SHR Q7S SO-16 / TSSOP-16 Features Wide Supply , www.diodes.com June 2013 © Diodes Incorporated 74AHCT594 Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND Q7S SHR SHCP STCP STR DS Q0 Vcc Description , D LATCH CP R Q STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 74AHCT594 Document number: DS35485


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PDF 74AHCT594 74AHCT594 DS35485
2013 - 74HC4094

Abstract: No abstract text available
Text: 74HC4094-Q100; 74HCT4094-Q100 8-stage shift-and-store bus register Rev. 1 - 30 January 2013 , when the STR input is HIGH. Data in the storage register appears at the outputs whenever the output , 5. Functional diagram 3 CP 1 STR QS1 QS2 QP0 QP1 QP2 2 D QP3 QP4 QP5 QP6 QP7 OE 15 7 14 13 12 11 9 , STR 8-BIT STORAGE REGISTER 10 9 1 15 OE 3-STATE OUTPUTS QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7 4 , is subject to legal disclaimers. © NXP B.V. 2013 . All rights reserved. 74HC


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PDF 74HC4094-Q100; 74HCT4094-Q100 74HCT4094-Q100 HCT4094 74HC4094
2013 - Not Available

Abstract: No abstract text available
Text: HEF4094B 8-stage shift-and-store register Rev. 10 — 25 June 2013 Product data sheet 1 , when the strobe ( STR ) input is HIGH. Data in the storage register appears at the outputs whenever the , NXP Semiconductors 8-stage shift-and-store register 4. Functional diagram 3 1 CP STR D 1 STR 8-BIT STORAGE REGISTER 2 15 OE 5 6 7 14 13 12 QP7 9 4 , LATCH 0 LATCH 7 STR OE QP2 QP0 QP1 Fig 3. QP4 QP3 001aag799 QP6 QP5 QP7


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PDF HEF4094B HEF4094B
2013 - Not Available

Abstract: No abstract text available
Text: HEF4094B 8-stage shift-and-store register Rev. 11 - 29 August 2013 Product data sheet 1 , strobe ( STR ) input is HIGH. Data in the storage register appears at the outputs whenever the output , -STAGE SHIFT REGISTER QS2 QS1 STR 8-BIT STORAGE REGISTER 2 OE D QP3 QP4 3-STATE OUTPUTS QP5 QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7 4 5 6 7 14 13 12 11 001aaf119 1 STR QS1 9 10 4 5 6 7 14 13 12 11 10 9 QS2 QP0 , D LE Q D LE Q LATCH 0 STR LATCH 7 OE QP0 QP1 QP2 QP3 QP4 QP5 QP6 QP7


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PDF HEF4094B HEF4094B
2013 - 74AHC594

Abstract: No abstract text available
Text: asserted low the storage register reset function ( STR ) sets all shift register values to zero and is , 3 4 5 6 7 8 16 15 14 13 12 11 10 9 Vcc Q0 DS STR STCP SHCP SHR Q7S SO-16 / TSSOP , : DS35484 Rev. 3 - 2 1 of 11 www.diodes.com June 2013 © Diodes Incorporated 74AHC594 Pin , STCP STR DS Q0 Vcc Functions Parallel Data Output 1 Parallel Data Output 2 Parallel Data Output 3 , R SHR D LATCH CP STCP Q D LATCH CP Q R R STR Q0 Q1 Q2 Q3 Q4 Q5 Q6


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PDF 74AHC594 74AHC594 DS35484
2013 - STR 2013 application

Abstract: 74HCT594T 74hct594 STR 2013
Text: ( STR ) sets all shift register values to zero and is independent of all clocks Data from the input , Rev. 2 - 2 1 of 12 www.diodes.com June 2013 © Diodes Incorporated 74HCT594 Pin , STCP STR DS Q0 Vcc Description Parallel Data Output 1 Parallel Data Output 2 Parallel Data Output 3 , R SHR D LATCH CP STCP Q D LATCH CP Q R R STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 74HCT594 Document number: DS35491 Rev. 2 - 2 2 of 12 www.diodes.com June 2013 © Diodes


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PDF 74HCT594 74HCT594 DS35491 STR 2013 application 74HCT594T STR 2013
2013 - STR 2013 application

Abstract: 74hc594 STR 2013
Text: storage register reset function ( STR ) sets all shift register values to zero and is independent of all , 16 15 14 13 12 11 10 9 Vcc Q0 DS STR STCP SHCP SHR Q7S SO-16 / TSSOP-16 Features Wide , Document number: DS35484 Rev. 3 - 2 1 of 10 www.diodes.com June 2013 © Diodes Incorporated , GND Q7S SHR SHCP STCP STR DS Q0 VCC Description Parallel Data Output 1 Parallel Data Output 2 Parallel , 7 D FF7 CP Q R R SHR D LATCH CP STCP Q D LATCH CP Q R R STR Q0


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PDF 74HC594 74HC594 74AHC594 DS35484 STR 2013 application STR 2013
2013 - 74AHC594

Abstract: STR 2013 application
Text: asserted low the storage register reset function ( STR ) sets all shift register values to zero and is , June 2013 © Diodes Incorporated 74AHC594 Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name Q1 Q2 Q3 Q4 Q5 Q6 Q7 GND Q7S SHR SHCP STCP STR DS Q0 Vcc Functions Parallel , Q D LATCH CP Q R R STR Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 74AHC594 Document number: DS35484 Rev. 3 - 2 2 of 11 www.diodes.com June 2013 © Diodes Incorporated 74AHC594


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PDF 74AHC594 74AHC594 DS35484 STR 2013 application
2013 - Not Available

Abstract: No abstract text available
Text: 74LVC594A 8-bit shift register with output register Rev. 2 — 21 October 2013 Product data , STR ) will clear the corresponding register. 2. Features and benefits      ï , €” 21 October 2013 © NXP B.V. 2013 . All rights reserved. 2 of 20 74LVC594A NXP , legal disclaimers. Rev. 2 — 21 October 2013 © NXP B.V. 2013 . All rights reserved. 3 of 20 , 14 DS 2 15 Q0 Q4 4 13 STR Q3 3 14 DS Q5 5 12 STCP Q4 4 13


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PDF 74LVC594A 74LVC594A
2013 - Not Available

Abstract: No abstract text available
Text: HEF4094B-Q100 8-stage shift-and-store register Rev. 2 - 6 June 2013 Product data sheet 1 , when the strobe ( STR ) input is HIGH. Data in the storage register appears at the outputs whenever the , package; 16 leads; body width 4.4 mm Version SOT109-1 SOT403-1 4. Functional diagram 3 CP 1 STR QS1 QS2 2 3 D CP 8-STAGE SHIFT REGISTER QS2 QS1 STR 8-BIT STORAGE REGISTER 10 9 2 D QP3 1 QP4 QP5 15 OE , . © NXP B.V. 2013 . All rights reserved. Product data sheet Rev. 2 - 6 June 2013 2 of 18 NXP


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PDF HEF4094B-Q100 HEF4094B-Q100
2013 - R-IN32M3

Abstract: No abstract text available
Text: R18UZ0019EJ0200 Oct 3, 2013 CGI application sample Network sapplication sample Page 12 of 106 , : R18UZ0019EJ0200 Issue date : Oct 3, 2013 Renesas Electronics www.renesas.com Notice 1. 2. 3. 4 , only to illustrate the operation of semiconductor products and application examples. You are fully , check the quality grade of each Renesas Electronics product before using it in a particular application . You may not use any Renesas Electronics product for any application for which it is not intended


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PDF R-IN32M3 R-IN32M3-EC R-IN32M3-CL R18UZ0019EJ0200
2013 - Not Available

Abstract: No abstract text available
Text: 74AHC594-Q100; 74AHCT594-Q100 8-bit shift register with output register Rev. 2 — 4 July 2013 , direct overriding clears (SHR and STR ) are provided on both the shift and storage registers. A serial , — 4 July 2013 © NXP B.V. 2013 . All rights reserved. 2 of 24 74AHC594-Q100; 74AHCT594 , 11 SHCP 8-STAGE SHIFT REGISTER 10 SHR 9 12 STCP 13 STR 8-BIT STORAGE , Functional diagram SHCP STCP STR 11 12 STCP 9 Q7S SHR 13 R2 12 10 C2 R1 SRG8


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PDF 74AHC594-Q100; 74AHCT594-Q100 74AHCT594-Q100 AHCT594
2013 - Not Available

Abstract: No abstract text available
Text: HEF4094B-Q100 8-stage shift-and-store register Rev. 3 — 4 July 2013 Product data sheet 1 , when the strobe ( STR ) input is HIGH. Data in the storage register appears at the outputs whenever the , outline package; 16 leads; body width 4.4 mm SOT403-1 4. Functional diagram 3 1 CP STR QS1 QS2 15 QP2 STR 9 2 3-STATE OUTPUTS Fig 1. 5 6 7 Functional , document is subject to legal disclaimers. Rev. 3 — 4 July 2013 001aaf111 © NXP B.V. 2013 . All


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PDF HEF4094B-Q100 HEF4094B-Q100
2001 - str g 6351

Abstract: 745419
Text: EWL C+ Library Reference Document Number: CWEWLCPPREF Rev 10.5, 09/ 2013 EWL C+ Library Reference, Rev. 10.5, 09/ 2013 2 Freescale Semiconductor, Inc. Contents Section number Title , .61 EWL C+ Library Reference, Rev. 10.5, 09/ 2013 Freescale Semiconductor, Inc. 3 Section number , .68 EWL C+ Library Reference, Rev. 10.5, 09/ 2013 4 Freescale Semiconductor, Inc. Section number , .77 EWL C+ Library Reference, Rev. 10.5, 09/ 2013 Freescale Semiconductor, Inc. 5 Section number


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PDF
2013 - 10D560

Abstract: l22f
Text: date page 03/20/ 2013 1 of 6 SERIES: P7805-S DESCRIPTION: NON-ISOLATED SWITCHING REGULATOR , : NON-ISOLATED SWITCHING REGULATOR date 03/20/ 2013 page 2 of 6 INPUT parameter conditions/description , : NON-ISOLATED SWITCHING REGULATOR date 03/20/ 2013 page 3 of 6 ENVIRONMENTAL parameter operating , : NON-ISOLATED SWITCHING REGULATOR date 03/20/ 2013 page 4 of 6 DERATING CURVES Temperature Derating Curve , C2 Ceramic Tantalum S cope C1 C2 S cope GND Copper str ip GND Copper str ip


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PDF P7805-S P7805-Q12-S1R5-S P7805-Q12-S1R8-S P7805-Q12-S2-2 P7805-Q24-S3-S P7805-Q24-S5-S P7805-Q24-S6-S P7805-Q24-S9-S P7805-Q24-S12-S P7805-Q24-S15-S 10D560 l22f
2013 - Not Available

Abstract: No abstract text available
Text: 74LVC594A-Q100 8-bit shift register with output register Rev. 1 — 15 November 2013 Product , pulse ahead of the storage register. A LOW level on one of the two register reset pins (SHR and STR , disclaimers. Rev. 1 — 15 November 2013 © NXP B.V. 2013 . All rights reserved. 2 of 20 74LVC594A , subject to legal disclaimers. Rev. 1 — 15 November 2013 © NXP B.V. 2013 . All rights reserved , 11 shift register clock input STCP 12 storage register clock input STR 13


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PDF 74LVC594A-Q100 74LVC594A-Q100 74LVC594A
2013 - Not Available

Abstract: No abstract text available
Text: x 8mm (TBGA24) SPI-compatible serial bus interface Single and double transfer rate ( STR /DTR) 2.7–3.6V single supply voltage Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz , Supported protocols in both STR and DTR – Extended I/O protocol – Dual I/O protocol – Quad I/O , Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron , Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013


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PDF 512Mb, MT25QL512AB 09005aef84fe19ac
2013 - Not Available

Abstract: No abstract text available
Text: – 64KB • SPI-compatible serial bus interface • Single and double transfer rate ( STR /DTR) • Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz (MAX) for all protocols , both STR and DTR – Extended I/O protocol – Dual I/O protocol – Quad I/O protocol â , products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved , specifications without notice. © 2013 Micron Technology, Inc. All rights reserved. 512Mb, 3V Multiple I/O


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PDF 512Mb, MT25QL512AB 512Mb 16-pin SO16W, SO16-Wide, SOIC-16) 24-ball 05/6mm TBGA24)
2013 - Not Available

Abstract: No abstract text available
Text: ●Typical Application Circuit 0.1 to 10µF VCC VCC VCC PS Power Save GPIO TSD & UVLO , VREF GND Figure 1. Typical Application Circuit ○Product structure:Silicon monolithic integrated circuit . www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111ã , -0H2H0B600770-1-2 01. Jul. 2013 Rev.001 Datasheet BU64244GWZ ●Pin Configuration 1 2 A OUT PS , Figure 3. Block Diagram www.rohm.com © 2013 ROHM Co., Ltd. All rights reserved. TSZ22111ã


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PDF BU64244GWZ BU64244GWZ
2013 - Not Available

Abstract: No abstract text available
Text: €¢ SPI-compatible serial bus interface • Single and double transfer rate ( STR /DTR) • Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz (MAX) for all protocols in DTR • Dual/quad I/O commands for increased throughput up to 65 MB/s • Supported protocols in both STR and DTR – Extended , , Inc. reserves the right to change products or specifications without notice. © 2013 Micron , notice. © 2013 Micron Technology, Inc. All rights reserved. 1Gb, 1.8V Multiple I/O Serial Flash


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PDF MT25QU01GAB 16-pin SO16W, SO16-Wide, SOIC-16) 24-ball 05/6mm TBGA24) 09005aef857a770a
2013 - Not Available

Abstract: No abstract text available
Text: x 8mm (TBGA24) SPI-compatible serial bus interface Single and double transfer rate ( STR /DTR) 1.7–2.0V single supply voltage Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz , Supported protocols in both STR and DTR – Extended I/O protocol – Dual I/O protocol – Quad I/O , Technology, Inc. reserves the right to change products or specifications without notice. © 2013 Micron , Micron Technology, Inc. reserves the right to change products or specifications without notice. © 2013


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PDF MT25QU01GAB 09005aef857a770a
2013 - MT25QU02

Abstract: 0/CRC64
Text: €¢ SPI-compatible serial bus interface • Single and double transfer rate ( STR /DTR) • Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz (MAX) for all protocols in DTR • Dual/quad I/O commands for increased throughput up to 65 MB/s • Supported protocols in both STR and DTR – Extended , , Inc. reserves the right to change products or specifications without notice. © 2013 Micron , notice. © 2013 Micron Technology, Inc. All rights reserved. 2Gb, 1.8V Multiple I/O Serial Flash


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PDF MT25QU02GAB 16-pin SO16W, SO16-Wide, SOIC-16) 24-ball 05/6mm TBGA24) 09005aef857a7818 MT25QU02 0/CRC64
2013 - MT25QU512

Abstract: No abstract text available
Text: ( STR /DTR) • Clock frequency – 133 MHz (MAX) for all protocols in STR – 66 MHz (MAX) for all , in both STR and DTR – Extended I/O protocol – Dual I/O protocol – Quad I/O protocol â , products or specifications without notice. © 2013 Micron Technology, Inc. All rights reserved , , Inc. reserves the right to change products or specifications without notice. © 2013 Micron , , Inc. reserves the right to change products or specifications without notice. © 2013 Micron


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PDF 512Mb, MT25QU512AB 512Mb 16-pin SO16W, SO16-Wide, SOIC-16) 24-ball 05/6mm TBGA24) MT25QU512
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