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RMS-88

Abstract: RMS-06 pgs 1 RMS06 sngs-5 spgs-5 spgs-4
Text: ) .072-.105 (1.8-2.7 *PGS— 5 SPGS-5 188 (4.8) .047 (1.2) .156 (4.0) .106-,164 (2.6-4.2 .188 (4.8) .165-,187 , -4 NYLON (RMS—88) *NGS— 5 SNGS- 5 172 (4.4) .031 (0.8) .031 (0.8) .026-,036 (0.7-0.9; .109 (2.8 , 5 /32 (4.0) TYP. REF. 'B NOTES: 1. COLOR: NATURAL OR BLACK; ADD SUFFIX "B" FOR BU\CK 2. LENGTH: 100 FT (3048 cm). "D" ZF .01 5 /.060 (0.4)/(1.5) REF. BOTH SIDES SERRATED ONLY J SEE CO 200505 FOR CHANGES


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PDF 188SEE RMS-13 RMS-88 RMS-06 pgs 1 RMS06 sngs-5 spgs-5 spgs-4
Not Available

Abstract: No abstract text available
Text: DQ2 VDD NC DQ3 VSS NC VDD NC /WE /CAS /RAS /CS BA0 BA1 A10/AP A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 , . Revision 1.2 Page 5 of 20 64Mbit ­ High Speed SDRAM (CAS2/150 MHz) 8Mx8 HSDRAM Preliminary Data , Current Notes: 1. 2. 3. 4. 5 . 64Mbit ­ High Speed SDRAM (CAS2/150 MHz) 8Mx8 HSDRAM Test Condition , 210 35 4 Units mA mA mA mA mA mA mA mA mA mA mA Notes 1 ICC4B ICC5F ICC5D ICC6 1,2 3,4, 5 3,4, 5 The specified value is obtained with the outputs open. The specified value is obtained when


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PDF 64Mbit CAS2/150 SM3603 PC-133 SM3603T-6 54-pin 545-DRAM;
2000 - Not Available

Abstract: No abstract text available
Text: DQ2 VDD NC DQ3 VSS NC VDD NC /WE /CAS /RAS /CS BA0 BA1 A10/AP A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 , . Revision 1.2 Page 5 of 19 64Mbit ­ High Speed SDRAM (CAS2/150 MHz) 8Mx8 HSDRAM Preliminary Data , Current Notes: 1. 2. 3. 4. 5 . 64Mbit ­ High Speed SDRAM (CAS2/150 MHz) 8Mx8 HSDRAM Test Condition , 210 35 4 Units mA mA mA mA mA mA mA mA mA mA mA Notes 1 ICC4B ICC5F ICC5D ICC6 1,2 3,4, 5 3,4, 5 The specified value is obtained with the outputs open. The specified value is obtained when


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PDF 64Mbit CAS2/150 SM3603 PC-133 SM3603T-6 54-pin 545-DRAM;
Not Available

Abstract: No abstract text available
Text: at http://www.pc133memory.com Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 , reserved. The information contained herein is subject to change without notice. Revision 1.4 Page 5 , CK0 CK1 CK2 CK3 5 SDRAM 5 SDRAM 4 SDRAM+3.3 pf 4 SDRAM+3.3 pf DQMB1 DQ(15:8) U1 U10 DQMB5 DQ(47 , Load Circuit 3. 4. 5 . The transition time is measured between VIH and VIL (or between VIH and VIL , . 5 . 6. Access time is measured at 1.4V (LVTTL) at max clock rate for the CAS latency specified. See


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PDF PC-133 128MB 168-pin pc133memory Vdd408DT-7 SM12808DT-7 SM12809DT-7
Not Available

Abstract: No abstract text available
Text: 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 54 53 52 51 50 49 48 47 46 45 44 43 , . AC measurements assume tT = 1ns. 5 . In addition to meeting the transition rate specification, the , herein is subject to change without notice. Revision 1.1 Page 5 of 10 Industrial Temperature , ,2 1,2 Refresh Parameters tREF tSREX Notes: 1. 2. 3. 4. 5 . 6. Access time is measured at 1.4V , +tRC 64 - ms ns 5 , 6 7 7. Self-Refresh exit is a synchronous operation and begins on the 2nd


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PDF 64Mbit 4Mx16 SM3604 PC-133 communications999 SM3604T-7 54-pin 545-DRAM;
RMS-21

Abstract: rms-21 nylon RMS-06 dlc7 spgs-5
Text: (0.7-0.9 .109 (2.8) .037—.071 (0.9-1.8) .072-.105 (1.8-2.7) SPGS-5 188 (4.8) .047 (1.2) .156 (4.0 , . .031 (0.8) PANEL THICKNESS RANGE "GAP" REF. NGS-1 NGS-2 NGS-2.5 NGS-3 NGS-4 NGS- 5 SNGS-1 SNGS-2 SNGS-2.5 SNGS-3 SNGS-4 NYLON (RMS—21 ) SNGS- 5 172 (4.4) .031 (0.8) .026—.036 (0.7-0.9] .109 , (0.5 .037 (0.9 .060 (1.5 .106 (2.7 .165 (4.2 .187 (4.8 PGS-1 PGS-2 PGS-2.5 PGS-3 PGS-4 PGS- 5 , (0.9 .060 (1.5 .106 (2.7 .165 (4.2 .187 (4.8 "GAP ■H 5 /32 (4.0) TYP. REF. NOTES: 1. COLOR


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PDF RMS-13 RMS-21 rms-21 nylon RMS-06 dlc7 spgs-5
2000 - SM3404

Abstract: No abstract text available
Text: LDQM WE# CAS# RAS# CS# A11 (BS) A10/AP A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 , to change without notice. Revision 1.0 Page 5 of 20 16Mbit ­ High Speed SDRAM 1Mx16 HSDRAM , Notes: 1. 2. 3. 4. 5 . 16Mbit ­ High Speed SDRAM 1Mx16 HSDRAM Test Condition BL = 1, CL = 3, Read , Units mA mA mA mA mA mA mA mA mA mA mA Notes 1 ICC4B ICC5F ICC5D ICC6 1,2 3,4, 5 3,4, 5 The , measured between VIH and VIL (or between VIH and VIL). 4. AC measurements assume tT = 1ns. 5 . In addition


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PDF 16Mbit 1Mx16 SM3404 SM3404T-10 SM3404T-7 SM3404T-6 SM3404T-10I 50-pin
2000 - U815

Abstract: No abstract text available
Text: 45 46 5 DQ3 47 6 Vdd 7 DQ4 8 Symbol CK0 84 Vdd 126 RFU , herein is subject to change without notice. Page 5 of 13 Low latency PC-133 HSDRAM 32MB, 64MB , # S1# Clock Wiring DQMB0 DQ(7:0) DQMB4 U0 U9 U1 U10 U5 U6 5 SDRAM 5 SDRAM 4 , and VIL). 4. AC measurements assume tT = 1ns. 5 . In addition to meeting the transition , Data Write Mask Latency 0 - CLK - 64 ms 5 , 6 2CLK+tRC - ns 7 4


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PDF PC-133 128MB 168-pin PC133-322-46100. 545-DRAM; U815
Not Available

Abstract: No abstract text available
Text: 1 5 1 E n h a n c e d Æ FJ 4Mx4, 2Mx8, 1Mx16 M m w y Systems Inc. 16Mbit Enhanced , 4.5 5 ns Hidden P recharge and Hidden A uto Refresh Self Refresh 8K bit SRAM C ache S , 37 ] DQ2 36 ] VDDQ VDDQ [ 9 NC [ 10 35 ] NC NC [ 11 WE [ 12 DQ1 [ 4 VDDQ [ 5 DQ2 I 6 VSSQ [ 7 DQ3 [ 8 VDDQ [ 9 42 ] VSSQ C M VDDQ [ 5 VSSQ [ 3 DQ0 [ o 41 , DQ2 [ 5 46 ] DQ13 39 ] DQ5 DQ3 [ 6 45 ] DQ12 38 ] VSSQ VDDQ [ 7 37 ] DQ4 44


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PDF 1Mx16 16Mbit -12ns 545-DRAM;
sngs-5

Abstract: No abstract text available
Text: N G S-4 *NGS- 4 *SNGS- 5 *NGS- 5 125 (3 .2 ) PGS-1 SPGS-1 .031 P G S -2 *SPGS- 2 172 (4 .4 , *PGS- 5 *SPGS- 5 *BLACK PARTS A V A ILAB LE BY SPECIAL DRDER DNLY * * PART AVA ILAB LE BY SPECIAL , (4.8 (6 .4 (0 .8 ) PANEL THICKNESS RANGE .0 2 6 - .036 .0 3 7 - .071 .0 7 2 -.1 0 5 .1 0 6 -,1 6 4 .1 6 5 -.1 8 7 .18 8- .250 .0 2 6 - .036 .0 3 7 - .071 .0 7 2 -,1 0 5 .1 0 6 -.1 6 4 .1 6 5 -.1 8 , (2.7 (4.2 (4.8 .109 (2 .8 ) .109 (2 .8 ) .156 (4.0 .188 (4.8: .250 (6 .4 5 /3 2 ''GAP" (4


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PDF
ESDRAM

Abstract: Enhanced SDRAM
Text: S3# 4 DQ2 46 DQMB2 88 DQ34 130 DQMB6 5 DQ3 47 DQMB3 89 DQ35 , D Q (1 5 :8 )V W " 10 D Q (47 :4 0)-v/W " CK 7W I 10 pf S2# DQMB2 SDA , . Page 5 of 13 HE Enhanced 168-pin Enhanced SDRAM DIMM 8MB, 16MB, 32MB DIMM Memory Systems Inc , -1 - +15 (a A I in3 RAS, CAS, A0-A10, BA0, WE - +20 (a A + 5 (a A Symbol , crossover point. T Rt = 50 ohm Zn = 50 ohm Output — £ C|_OAD = 5 0 P F AC Output Load Circuit


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PDF 168-pin PC-100 66MHz 133MHz SM2M64DT-10 SM4M64DT-7 SM4M64DT-10 PC100-222-50120 545-D ESDRAM Enhanced SDRAM
1999 - Not Available

Abstract: No abstract text available
Text: DQ4 VDD DQ5 DQ6 VSS DQ7 VDD LDQM /WE /CAS /RAS /CS BA0 BA1 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 , . 5 . In addition to meeting the transition rate specification, the clock and CKE must transition VIH , notice. Revision 1.0 Page 5 of 9 64Mbit ­ High Speed SDRAM 8Mx8, 4Mx16 HSDRAM AC Operating , Parameters tREF tSREX Notes: 1. 2. 3. 4. 5 . 6. Access time is measured at 1.4V (LVTTL) at max clock rate for , command is registered. Refresh Period Self Refresh Exit Time 2CLK+tRC 64 - ms ns 5 , 6 7


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PDF 64Mbit 4Mx16 SM3603 SM3604 PC-133 SM3603T-7 SM3604T-7
2001 - 04nS

Abstract: cq 545 72MBIT
Text: 209-ball PBGA 1 2 3 4 5 6 7 8 9 10 11 A VSS VDDQ VSS A , such that it is 5 times the desired driver impedance. M1 Input Mode 1 Input: This static , Address Interleaved A2 A1 A0 (decimal) 0 0 0 0, 1, 2, 3, 4, 5 , 6, 7 0 0 1 1, 0, 3, 2, 5 , 4, 7, 6 0 1 0 2, 3, 0, 1, 6, 7, 4, 5 0 1 1 3, 2, 1, 0, 7, 6, 5 , 4 1 0 0 4, 5 , 6, 7, 0, 1, 2, 3 1 0 1 5 , 4, 7, 6, 1, 0, 3, 2 1 1


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PDF 72Mbit 2Mx36 SS2615 209-ball SS2615 209-ball 04nS cq 545
1999 - Not Available

Abstract: No abstract text available
Text: -7.5 133 7.5 4.5 -10 100 10 5 Units MHz ns ns · Programmable Burst Length: 1,2,4,8,full-page · , VDDQ NC NC WE CAS RAS CS A11 (BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 , WE CAS RAS CS A11 (BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 , LDQM WE CAS RAS CS A11(BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 , notice. Revision 2.1 Page 5 of 100 Data Input/Output Buffers Data Latches DQ0 DQ1 DQ2 DQ3


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PDF 0316409C 0316169C 0316809C 1Mx16 16Mbit SM2402T-6 SM2403T-6 SM2404T-6 SM2402T-7 SM2403T-7
2000 - pc150

Abstract: No abstract text available
Text: Vss 44 DNU 3 DQ1 4 DQ2 45 46 5 DQ3 47 6 Vdd 7 DQ4 8 , DQMB0 DQ(7:0) DQMB4 U0 U9 U1 U10 U5 U6 5 SDRAM 5 SDRAM 4 SDRAM+3.3 pf 4 SDRAM , subject to change without notice. Page 5 of 12 CAS2/150MHz HSDRAM 64MB, 128MB DIMM Preliminary , VIL (or between VIH and VIL). 4. AC measurements assume tT = 1ns. 5 . In addition to , (16 pcs) Description 0 1 2 3 4 5 6 15 16 17 18 19 20 21 22 23 24 25 26 27


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PDF CAS2/150MHz 128MB 168-pin PC-150 PC150-232-45120. 545-DRAM; pc150
2001 - Not Available

Abstract: No abstract text available
Text: 2 79 DQb DQc 3 78 DQb VDDQ 4 77 VDDQ VSSQ 5 76 VSSQ DQc , 2Mx36 119-ball PBGA 1 2 3 4 5 6 7 A VDDQ A A A A A VDDQ , herein is subject to change without notice. Page 5 of 30 72Mbit Pipelined BSRAM w/ NoBL , II(L) Input Leakage Current - - ± 5 µA IO(L) Output Leakage Current - - ± 5 µA Notes: 1. Applies to SM2625Q and SM2625B 3.3V devices. 2. Applies to SM2625Q1 and


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PDF 72Mbit 2Mx36 SS2625 72-Mbit 119-ball SS2625B-10 SS2625Q1-6
1999 - SM3603

Abstract: No abstract text available
Text: VSS VSS NC DQ1 4 51 DQ14 NC DQ1 VSS DQ2 5 50 DQ13 DQ6 VSS , measurements assume tT = 1ns. 5 . In addition to meeting the transition rate specification, the clock and CKE , herein is subject to change without notice. Page 5 of 9 64Mbit ­ High Speed SDRAM (150 MHz) 8Mx8 , Data Write Mask Latency 0 - CLK - 64 ms 5 , 6 2CLK+tRC - ns 7 3 4 Refresh Parameters tREF Refresh Period tSREX Self Refresh Exit Time Notes: 1. 2. 3. 4. 5


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PDF 64Mbit 4Mx16 SM3603 SM3604 PC-133 SM3603T-6 54-pin SM3604T-6
1999 - pc133 sdram 512mb ECC unbuffered

Abstract: U9-16 ENHANCED MEMORY SYSTEMS
Text: Supply Available on-line at http://www.pc133memory.com Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 , CK1 CK2 CK3 5 SDRAM Termination 4 SDRAM+3.3 pf Termination 10 DQMB1 ? DQ(15:8) CK0 U2 , change without notice. Revision 1.0 Page 5 of 11 PC-133 HSDRAM 256MB, 512MB DIMM 512MB ECC DIMM , U9 DQ(39:32) U5 U13 CK0 CK1 CK2 CK3 5 SDRAM 5 SDRAM 4 SDRAM+3.3 pf 4 SDRAM+3.3 pf DQMB0 DQ(7:0) U1 , VTT RT = 50 ohm Z0 = 50 ohm Output CLOAD = 50pF AC Output Load Circuit 3. 4. 5 . The


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PDF PC-133 256MB, 512MB 168-pin pc133memory A10T-7 SM51208BDT-7 SM51209BDT-7 pc133 sdram 512mb ECC unbuffered U9-16 ENHANCED MEMORY SYSTEMS
2001 - cq 545

Abstract: No abstract text available
Text: (Top View) SS2615 2Mx36 209-ball PBGA 1 2 3 4 5 6 7 8 9 10 11 A , such that it is 5 times the desired driver impedance. M1 Input Mode 1 Input: This static , Address Interleaved A2 A1 A0 (decimal) 0 0 0 0, 1, 2, 3, 4, 5 , 6, 7 0 0 1 1, 0, 3, 2, 5 , 4, 7, 6 0 1 0 2, 3, 0, 1, 6, 7, 4, 5 0 1 1 3, 2, 1, 0, 7, 6, 5 , 4 1 0 0 4, 5 , 6, 7, 0, 1, 2, 3 1 0 1 5 , 4, 7, 6, 1, 0, 3, 2 1 1


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PDF 72Mbit 2Mx36 SS2615 209-ball SS2615 209-ball cq 545
1999 - Not Available

Abstract: No abstract text available
Text: Clock Frequency tCK2 · · · · · · · -7.5 fCK Clock Access Time 4.5 5 ns , DQ5 3 4 5 6 7 8 9 48 47 46 45 44 43 42 DQ14 VSSQ DQ13 DQ12 VDDQ DQ11 DQ10 , (or between VIH and VIL). 4. AC measurements assume tT = 1ns. 5 . In addition to meeting the , reserved. The information contained herein is subject to change without notice. Page 5 of 9 , =2, 3 2.8 - 3.5 - ns 1 tCKH1, tCKL1 Clock High & Low Times, CL=1 5 - 6


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PDF 16Mbit 1Mx16 SM2404T-7 50-pin SM2404T-10I 545-DRAM;
pc133 sdram 512mb ECC unbuffered

Abstract: 6464af 144-Pin Unbuffered SDRAM SO-DIMM PC133 ENHANCED MEMORY SYSTEMS SM640
Text: DQ41 76 Vss 112 NC 5 DQ1 41 DQ10 77 RSVD 113 Vdd 6 DQ33 42 , notice. Page 5 of 15 144-pin SDRAM SODIMMs 64MB, 128MB, 256MB, 512MB Preliminary Data Sheet , measurements assume tT = 1ns. 5 . In addition to meeting the transition rate specification, the clock and , Description 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 , SDRAM SODIMMs 256MB 512MB Byte Description 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15


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PDF 144-pin 128MB, 256MB, 512MB PC133 512MB A10/AP SM6408SDT-7 pc133 sdram 512mb ECC unbuffered 6464af 144-Pin Unbuffered SDRAM SO-DIMM PC133 ENHANCED MEMORY SYSTEMS SM640
Not Available

Abstract: No abstract text available
Text: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 , . Page 5 of 19 Revision 1.0 168-pin Low Profile SDRAM DIMMs 32MB, 64MB, 128MB, 256MB, 512MB 128MB , DQ(7:0) DQ(39:32) DQMB4 U5 CK0 CK1 CK2 CK3 5 SDRAM Termination 4 SDRAM+3.3 pf Termination 10 CK0,2 , Preliminary Data Sheet S0# Clock Wiring S1# CK0 CK1 CK2 CK3 U5 DQ(39:32) CK0-3 U14 10 SDRAMs 5 SDRAM 5 , DQ(39:32) CK0-3 U14 10 SDRAMs 5 SDRAM 5 SDRAM 4 SDRAM+3.3 pf 4 SDRAM+3.3 pf DQMB0 U0 DQ(7:0) U9


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PDF 168-pin 128MB, 256MB, 512MB PC133 512MB A10/AP SM3208LDT-7
2001 - SS2625Q-6

Abstract: 6T36A
Text: DQc 3 78 DQb VDDQ 4 77 VDDQ VSSQ 5 76 VSSQ DQc 6 75 DQb , 2 3 4 5 6 7 A VDDQ A A A A A VDDQ B NC CE2 A , notice. Page 5 of 30 72Mbit Pipelined BSRAM w/ NoBL Architecture 2Mx36 Preliminary Data Sheet , ) Input Leakage Current - - ± 5 µA IO(L) Output Leakage Current - - ± 5 µA , devices. 3. VDDQ = 3.3V ± 5 %. 4. VDDQ = 2.5V ± 5 %. Enhanced Memory Systems Inc., 1850 Ramtron Dr


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PDF 72Mbit 2Mx36 SS2625 72-Mbit 119-ball SS2625B-10 SS2625Q1-6 SS2625Q-6 6T36A
1999 - 6408D

Abstract: U0-U15 6408DT
Text: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 , CK0 CK1 CK2 CK3 5 SDRAM 5 SDRAM 4 SDRAM+3.3 pf 4 SDRAM+3.3 pf DQMB1 DQ(15:8) U1 U10 DQMB5 DQ(47 , to change without notice. Revision 1.2 Page 5 of 10 Low latency PC-133 HSDRAM 64MB, 128MB , RT = 50 ohm Z0 = 50 ohm Output CLOAD = 50pF tHOLD AC Output Load Circuit 3. 4. 5 . The , 4.6 ns ns ns CLK ns ns ns ns CLK 4 5 Refresh Parameters tREF tSREX Refresh Period Self


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PDF A10/AP PC-133 128MB SM6408DT-7 SM12808DT-7 SM12809DT-7 168-pin 6408D U0-U15 6408DT
1998 - Not Available

Abstract: No abstract text available
Text: 100 10 5 Units MHz ns ns · Programmable Burst Length: 1,2,4,8,full-page · Programmable Wrap , CAS RAS CS A11 (BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 , A11 (BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 , RAS CS A11(BS) A10 A0 A1 A2 A3 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 , information contained herein is subject to change without notice. Revised 02/12/98 Page 5 of 106


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PDF 0316409C 0316169C 0316809C 1Mx16 16Mbit -12ns 545-DRAM;
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