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Part Manufacturer Description Datasheet Download Buy Part
LTC6910-3CST8#PBF Linear Technology LTC6910 - Digitally Controlled Programmable Gain Amplifiers in SOT-23; Package: SOT; Pins: 8; Temperature: Commercial
LTC4242CG Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
LTC4242CUHF#PBF Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C
LTC4242CG#TR Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
LTC4242CUHF#TRPBF Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C
LTC4242CUHF Linear Technology LTC4242 - Dual Slot Hot Swap Controller for PCI Express; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C

SLOT PGA 370 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract:
Text: /Suppress SC 242, SC 330, and 370 Pin PGA Probe Adapters Note: Agents and transaction-type filter , Adapter Target System Figure 5. Installation View of E2492E 370 Pin PGA Probe Adapter Dimensions , Temperature: Operating Nonoperating Altitude: Operating Nonoperating Figure 8. E2492E 370 Pin PGA Probe , Adapter or E2492E 370 Pin PGA Probe Adapter Mainframes (required): 16700A or 16702A Logic Analysis , . Figure 3. Installed View of E2492B SC 242 ( Slot 1) Probe Adapter 3 Multiple processors shown for


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PDF E2487C E2492B/C/E 6700A 6702A 6700A E2492B E2487C E2492B
NS16C550A

Abstract:
Text: Home | Products | Support | News | Contact Info. | Help | Online Store | Employment Back GCA64-TN Chipset VIA 694T/686B CPU Socket Socket 370 -based Intel ® CPU Supported Intel ® Pentium® III processors w FC -PGA2 packaging 1.13Ghz-1.26Ghz/133Mhz Intel ® Pentium® III processors w FC - PGA packaging 533EB-1Ghz/133Mhz Intel ® Pentium® III processors w FC - PGA , temperature, voltage, and fan speed Expansion Slots 1x AGP slot , 4x PCI slots, 1 PCI/ISA slot BIOS Award


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PDF GCA64-TN 694T/686B 370-based 13Ghz-1 26Ghz/133Mhz 533EB-1Ghz/133Mhz 500E-850E/100Mhz 800MHz-950MHz 566MHz-700MHz PC133 NS16C550A SLOT PGA 370 pentium 4 memory management pentium memory management db25 socket specifications
2008 - 3.5mm stereo switched stereo jack 7 pin

Abstract:
Text: DESCRIPTION PROCESSOR Socket FSB 370 -pin PGA ZIF for Intel Celeron and Pentium III processors in , cache via GPA module in the AGP slot Stored in main memory (holds 2D and 3D data) Endura SC815E Specifications FEATURE FUNCTION DESCRIPTION PROCESSOR Socket FSB 370 -pin PGA ZIF for Intel Celeron and , upgrading to a high performance AGP graphics card in the 4X AGP slot . Available in different build , Cache Optional display cache via GPA module in the AGP slot Stored in main memory (holds 2D and 3D data


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PDF SC815E SCL03-0-0 SC815E SCFPL03-0-0 SCL03-0-0, SCFPL03-0-0, 81XIOSHLD 3.5mm stereo switched stereo jack 7 pin stereo 3.5mm socket 2 pin 3.5mm Stereo Chassis Socket 3.5mm mono Socket SLOT PGA 370 3.5mm Stereo headphone Socket DVI PCB design dfp to dvi adapter
2006 - SLOT PGA 370

Abstract:
Text: devices PCI Expansion slot for SCSI module CPU 370 -pin PGA socket for Intel® Celeron and , EPC-2325 PCI/ISA Single Board Computer FEATURE SUMMARY 370 -pin PGA socket for Intel® Celeron and Pentium III processors in FC-PGA and FC-PGA2 packages Intel® 815 GMCH and C-ICH chipset Up to , PhoenixBIOS* Expansion slot for SCSI module PCI/ISA PICMG 1.0 R2.0 compliant Peripheral connectivity , . An expansion slot provides an interface for an optional LVD SCSI add-on daughter card. This can be


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PDF EPC-2325 370-pin 512MB -2325/EPC EPC2325S-126-0 866MHz EPC2325-866-0 EPC-2325 SLOT PGA 370 MC146818B pcI diagnostic card codes RadiSys vga D-sub connector 82562ET EPC2325S phoenixbios
2001 - SLOT PGA 370

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22CPTR TLV320AIC22C, SLOT PGA 370 TLV320AIC22 voip codec
ICKS 45

Abstract:
Text: universal universal universal universal Slot 2 Slot 2 PGA socket PGA socket PGA socket universal universal , . no. ICK PGA 2 0 x 2 0 x 8 K WLF . 5 0 x 5 0 with fixing clam p for socket 7 and socket 370 , B B B 41 37 36 41 Pin heatsinks fo r 1C Heatsinks for BGA Heatsinks for PGA SM D-heatsinks , suitable fo r processor type ICK PGA 2 0 x 2 0 x 1 2 K B 14 ICK PGA 21 x 21 ICK PGA 22 x 22 ICK PGA , for BGA Heatsinks for PGA SM D-heatsinks ^ ^ ^ ^ B 20 - 24 B 1 6 - 19 B 1 0 -1 5 B 38 - 40


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PDF
Not Available

Abstract:
Text: # 1381 Extraction Tools for PGA Sockets. 75 1710 Extraction Tools for PGA Sockets , ®. 102 2822 Extraction Tools for PGA Sockets , ). 122 CIS Standard Molded PGA Socket (1 oz. ave. insertion force). 32 CS Standard Molded PGA Socket (2.5 oz. ave. insertion force


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2001 - TLV320AIC22

Abstract:
Text: Handset Output HSOUTM 150 PGA ­36 dB to 12 dB DAC HSINP HSIN DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Handset Input HSINM HSIN HDIN MCIN , Serial Interface HDINP PGA ­36 dB to 12 dB 1.5-dB Steps DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) 4-Bit DAC , NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB) is done after the analog-to-digital conversion


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PDF TLV320AIC22C SPAS041B 16-Bit 16-kHz 77-dB TLV320AIC22 TLV320AIC22C TLV320AIC22CPT TLV320AIC22CPTR
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22
2001 - RJ11 headset

Abstract:
Text: Handset Output HSOUTM 150 PGA ­36 dB to 12 dB DAC HSINP HSIN DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Handset Input HSINM HSIN HDIN MCIN , Serial Interface HDINP PGA ­36 dB to 12 dB 1.5-dB Steps DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) 4-Bit DAC , NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB) is done after the analog-to-digital conversion


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PDF TLV320AIC22C SPAS041B 16-Bit 16-kHz 77-dB RJ11 headset TLV320AIC22 S-PQFP-G48 TLV320AIC22C TLV320AIC22CPT
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22
2001 - TLV320AIC22

Abstract:
Text: HSOUTP Handset Output HSOUTM 150 Ω PGA –36 dB to 12 dB DAC HSINP HSIN DIN DOUT BCLK FSYNC M/S MCLK PGA –36 dB to 12 dB 1.5-dB Steps (see Note A) Handset Input HSINM HSIN , „¦ Codec 2 Serial Interface HDINP PGA –36 dB to 12 dB 1.5-dB Steps DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA –36 dB to 12 dB 1.5-dB Steps (see Note , ID Amplifier Input NOTES: A. The attenuation on the ADC PGA (0 dB to –36 dB) is done after the


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PDF TLV320AIC22C SPAS041B 16-Bit 16-kHz TLV320AIC22
2001 - TLV320AIC22

Abstract:
Text: Handset Output HSOUTM 150 PGA ­36 dB to 12 dB DAC HSINP HSIN DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Handset Input HSINM HSIN HDIN MCIN , Serial Interface HDINP PGA ­36 dB to 12 dB 1.5-dB Steps DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) 4-Bit DAC , NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB) is done after the analog-to-digital conversion


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PDF TLV320AIC22C SPAS041B 16-Bit 16-kHz 77-dB TLV320AIC22 S-PQFP-G48 TLV320AIC22C TLV320AIC22CPT
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP Speaker Output SPOUTM 8 MCINP MCIN MCINM ADC PGA ­36 dB to 12 dB , Caller ID Amplifier Input CIIN CIINM NOTES: A. The attenuation on the ADC PGA (0 dB to ­36 dB


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PDF TLV320AIC22C SPAS041B 16-Bit 77-dB 78-dB 16-kHz TLV320AIC22
2001 - TLV320AIC22

Abstract:
Text: functional block diagram Codec 1 DAC PGA ­36 dB to 12 dB HSOUTP Handset Output HSOUTM 150 HSINP HSIN HSINM , HDOUTM 150 HDINP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 dB to 12 dB 1.5-dB Steps (see Note A) Serial Interface Codec 2 DAC PGA ­36 dB to 12 dB 1.5-dB Steps HSIN Headset Input HDIN HDINM Preamp , the ADC PGA (0 dB to ­36 dB) is done after the analog-to-digital conversion. This attenuation cannot prevent clipping. To prevent clipping, both the preamp gain and the PGA should be lowered to the required


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PDF TLV320AIC22C SPAS041A TLV320AIC22
2000 - TLV320AIC22

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB
2000 - TLV320AIC22

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB
2000 - voip codec chip

Abstract:
Text: diagram CODEC 1 HSOUTP Handset Output HSOUTM 150 PGA ­36 to 12 dB DAC HSINP HSIN ADC DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB 1.5 dB Step (see Note 2) Serial Interface , Headset Output HDOUTM 150 CODEC 2 HDINP PGA ­36 to 12 dB 1.5 dB Step DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4 , . The attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB voip codec chip TLV320 I2C code for TLV320 control codec voip TLV320AIC22 TMS320C54X TLV320AIC22PT Texas Instruments TLV320 RJ11 headset VOIP RJ11 headset
2000 - TLV320AIC22

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB
2000 - TLV320

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB TLV320
2000 - TLV320AIC22

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB TLV320AIC22PT TLV320AIC22PTR
2000 - I2C code for TLV320 control

Abstract:
Text: diagram CODEC 1 HSOUTP Handset Output HSOUTM 150 PGA ­36 to 12 dB DAC HSINP HSIN ADC DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB 1.5 dB Step (see Note 2) Serial Interface , Headset Output HDOUTM 150 CODEC 2 HDINP PGA ­36 to 12 dB 1.5 dB Step DAC Headset Input HDINM HDIN Preamp (23 dB/14 dB/0 dB/Mute) HSIN PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4 , . The attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB I2C code for TLV320 control Texas Instruments TLV320 voip codec TLV320AIC22 RJ11 headset VOIP TLV320AIC22PT TLV320 TMS320C6X K300136 TMS320C54X
2000 - TLV320AIC22

Abstract:
Text: DAC PGA ­36 to 12 dB Handset Output HSOUTM 150 HSINP HSIN HSINM Handset Input HSIN ADC HDIN MCIN LNIN CIIN Preamp (23 dB/14 dB/ 0 dB/Mute) HDOUTP DIN DOUT BCLK FSYNC M/S MCLK PGA ­36 to 12 dB , DAC PGA ­36 to 12 dB 1.5 dB Step HSIN HDIN HDINM Preamp (23 dB/14 dB/0 dB/Mute) SPOUTP ADC PGA ­36 to 12 dB 1.5 dB Step (see Note 2) 4-Bit DAC LCD OUT HDIN MCIN LNIN CIIN MCIN , attenuation on the ADC PGA (12 dB to ­36 dB) is done after the ADC. This attenuation cannot prevent clipping


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PDF TLV320AIC22 SLAS281B 16-Bit 77-dB 78-dB 80-dB
Supplyframe Tracking Pixel