The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
ISL5827INZ Intersil Corporation Dual 12-bit, +3.3V, 260MSPS, High Speed D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5728INZ Intersil Corporation 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5728INZ-T Intersil Corporation 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5660/6IAZ-T Intersil Corporation 8-Bit, 125/60MSPS, High Speed D/A Converter; SOIC28, TSSOP28; Temp Range: -40° to 85°C
HI5741BIBZ-T Intersil Corporation 14-Bit, 100 MSPS, High Speed D/A Converter; SOIC28; Temp Range: -40° to 85°C
HI5760/6IBZ Intersil Corporation 10-Bit, 125/60MSPS, High Speed D/A Converter; SOIC28, TSSOP28; Temp Range: -40° to 85°C

RGMII to SGMII Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2011 - 88E1512

Abstract: Marvell 88E1512 marvell rgmii layout Marvell Alaska 88E1512 marvell fiber
Text: portion of the 1000BASE-T, 100BASE-TX, and 10BASE-T standards. The device supports RGMII (Reduced pin count GMII for direct connection) to Copper/Fiber/ SGMII with Auto-Media Detect, RGMII to Copper, RGMII to SGMII /Fiber, and SGMII to Copper. The device also integrates MDI interface termination resistors , switching voltage regulator to generate all required voltages and can run off a single 3.3V supply; the , processing to perform equalization, echo and crosstalk cancellation, data recovery, and error correction at a


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PDF 88E1512 88E1512 1000BASE-T, 100BASE-TX, 10BASE-T 88E1512-001 Marvell 88E1512 marvell rgmii layout Marvell Alaska 88E1512 marvell fiber
2011 - 88e1512

Abstract: Marvell 88E1512 ,Marvell PHY 88E1512
Text: portion of the 1000BASE-T, 100BASE-TX, and 10BASE-T standards. The device supports RGMII (Reduced pin count GMII for direct connection) to Copper/Fiber/ SGMII with Auto-Media Detect, RGMII to Copper, RGMII to SGMII /Fiber, and SGMII to Copper. The device also integrates MDI interface termination resistors , switching voltage regulator to generate all required voltages and can run off a single 3.3V supply; the , processing to perform equalization, echo and crosstalk cancellation, data recovery, and error correction at a


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PDF 88E1512 88E1512 1000BASE-T, 100BASE-TX, 10BASE-T 88E1512-001 Marvell 88E1512 ,Marvell PHY 88E1512
2009 - xgi z9s

Abstract: RGMII to SGMII CSB1880 USB-B connector 16-PIN JTAG HEADER CSB1801 MPC8536RDK 1.8v sGMII phy SII3512 CSB1801 uATX Carrier Board
Text: Network PCI PCI PCI Express® Express Express 1 2 0 Dual RGMII to SGMII / Copper PHY 32 , ) · Three PCI Express ports configurable as one x8, two x4 or one x4 and two x2 · Dual RGMII to copper/ SGMII (autoselect) PHY · Three 480 MB USB 2.0 ULPI PHYS · Two 4-wire TTL serial ports and one , integration in the MPC8536E processor is designed to help lower system costs, improve performance and , , fan control and thermal monitoring · 0ºC to +70ºC operation with supplied heatsink · Low power


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PDF MPC8536E MPC8536RDK) CSB1801 CSB1880 MPC8536E MPC8536RDKCPFS xgi z9s RGMII to SGMII USB-B connector 16-PIN JTAG HEADER MPC8536RDK 1.8v sGMII phy SII3512 CSB1801 uATX Carrier Board
2008 - 88E6185

Abstract: marvell 88E6185 Tsi578 88E1145 marvell 88e1145 88E1111 88E1111 PHY registers map Marvell PHY 88E1111 Datasheet tsi578 hardware manual 88E1111 RGMII
Text: performs RGMII to SGMII conversion. A 10-port Marvell 88E6185 SGMII Ethernet switch then switches between , serial RapidIO switch. For the control plane, each MSC8144 RGMII Gigabyte Ethernet port is linked to the , the following: ­ x4 serial RapidIO interface routed to a serial RapidIO switch ­ RGMII interface , of 1000Base-X to ports 0 and 1 of the backplane ­ 1 lane of SGMII to the front panel expansion , Code RGMII GigE DSP to switch SerDes from switch to backplane/frontplane x1/x4 serial RapidIO


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PDF MSC8144AMC-S MSC8144AMCSUM EL516 TSI578. MSC8144AMC-S 88E6185 marvell 88E6185 Tsi578 88E1145 marvell 88e1145 88E1111 88E1111 PHY registers map Marvell PHY 88E1111 Datasheet tsi578 hardware manual 88E1111 RGMII
2004 - MV-S100649-00

Abstract: Marvell 88e1111 register map Marvell PHY 88E1111 Marvell PHY 88E1111 application note 88E1111 88E1111 PHY registers map marvel phy 88e1111 reference design Marvell 88E1111 application note Marvell 88E1111 88E1111 full
Text: (Effective SGMII MAC) 88E1111 Device Gigabit Ethernet MAC MAC Interface Options - GMII - RGMII 3-Speed SFP Serial Interface - 4-pin SGMIII 88E1111 RGMII /GMII MAC to SGMII MAC Conversion , .61 GMII/MII to SGMII and RGMII to SGMII Mode , Interface ( SGMII ), the Ten-Bit Interface (TBI), and Reduced TBI (RTBI) for direct connection to a MAC , Options - GMII/MII - TBI - RGMII - RTBI - SGMII - Serial Interface RJ45 Media Types: - 10BASE


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PDF 88E1111 MV-S100649-00, 7vu31zzfnua-e4681dge MV-S100649-00 Marvell 88e1111 register map Marvell PHY 88E1111 Marvell PHY 88E1111 application note 88E1111 PHY registers map marvel phy 88e1111 reference design Marvell 88E1111 application note Marvell 88E1111 88E1111 full
2012 - RGMII to SGMII PHY

Abstract: MAX24287 switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii 1000BASE-X fpga ethernet sgmii fpga rgmii
Text: Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component with an SGMII or 1000BASE , for 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet , Wire-Speed Ethernet Interface Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs , MDIO and SGMII PCS Supports 10/100 MII or RGMII Operation with SGMII Running at the Same , MAX 24287 TD TCLK 625 MHz (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII to SGMII PHY switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii fpga ethernet sgmii fpga rgmii
2008 - hifn 8450

Abstract: 1.5V RGMII hsbga 324 HSBGA hifn encryption express sgmii sfp tcam ip cores hifn lzs AN0145 IBM PCI Express serdes architecture
Text: , that gluelessly connect to standard RGMII /RTBI/ SGMII or SERDES Interfaces on both the Host and Network , Only), and RGMII / SGMII (Host/Network) Interfaces can also be run in 10/100 speeds for Fast Ethernet , SerDes RGMII RTBI/ SGMII SerDes RGMII RTBI/ SGMII SFP SerDes RGMII RTBI/ SGMI/ GMIII/ TBI SerDes , SGMII interfaces can be configured to run at 10/100 speeds for applications only requiring 10/100 FE , 2.4 Supports Multiple Host Interfaces · Four standard RGMII /RTBI/ SGMII /SERDES interfaces (The


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PDF DS-0131-06, DS-0131-06 hifn 8450 1.5V RGMII hsbga 324 HSBGA hifn encryption express sgmii sfp tcam ip cores hifn lzs AN0145 IBM PCI Express serdes architecture
2010 - AR8033

Abstract: AR8031 AR8035 AR-8031 atheros ethernet switch AR8030 Atheros ar8035 RGMII to SGMII ATHEROS AR80 AR8031-11-29-10
Text: PHY. It supports both RGMII and SGMII interfaces to the MAC. The AR8031 provides a low-power, low BOM , AR8031 Ultra low-power 10/100/1000 RGMII / SGMII Gigabit Ethernet Transceiver Technology Overview , consumers and businesses. Solution Highlights AR8031 Product Overview · SGMII and RGMII MAC , RGMII / SGMII RGMII / SGMII TRD[0:3] Hybrid Circuit PGA AGC PMA The AR8031 also supports , on both the MAC interfaces ( RGMII / SGMII ) and the line side. ADC Trellis Decoder Timing and


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PDF AR8031 AR8031-11-29-10 AR8033 AR8031 AR8035 AR-8031 atheros ethernet switch AR8030 Atheros ar8035 RGMII to SGMII ATHEROS AR80 AR8031-11-29-10
2012 - MAX24287

Abstract: RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
Text: processor with an RGMII or GMII interface to a switch device with an SGMII interface or to a 1000BASE , 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch , and Duplex Mode Negotiation Between MDIO and SGMII PCS Supports 10/100 MII or RGMII , Applications Any System with a Need to Interface a Component with a Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component with an SGMII or 1000BASE-X Interface Switches and Routers Telecom


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
2009 - ML605 UCF FILE

Abstract: iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
Text: illustrated in Figure 1 and Figure 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a , v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces, as well as GMII/MII at 2.5V only , RGMII SGMII PCS PMA 1000BASE-X PMD Figure 1: Typical Ethernet Architecture Figure 1 displays , (UG368). RGMII The Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII achieves a 50 , Gb/s. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII/MII. SGMII converts the


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PDF DS710 ML605 UCF FILE iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
2011 - MAX24287

Abstract: RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
Text: 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch , Interface a Component with a Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component , Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs Serial Interface , MDIO and SGMII PCS Supports 10/100 MII or RGMII Operation with SGMII Running at the Same Rate , . 35 6.8 6.8.1 6.8.2 6.8.3 6.8.4 6.8.5 GMII, RGMII and MII Serial to Parallel


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PDF MAX24287 MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
2007 - sgmii sfp virtex

Abstract: UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl DS307 1000BASE-X RGMII SGMII
Text: Figures 1 and 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet , FIFO I/F Ethernet MAC PCS GMII/MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Reduced-GMII ( RGMII ) is an alternative to the GMII/MII. RGMII achieves a 45 percent reduction in the pin count , PCB designers. RGMII can carry Ethernet traffic at 10 Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to the GMII/MII. SGMII converts the parallel interface of the


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PDF DS307 1000BASE-X sgmii sfp virtex UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl RGMII SGMII
2012 - RGMII-1000

Abstract: MAX24287 switch SGMII MII GMII sgmii specification ieee ENG-46158
Text: Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component with an SGMII or 1000BASE , an RGMII or GMII interface to a switch device with an SGMII interface or to a 1000BASE-X optical , SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch ICs , Wire-Speed Ethernet Interface Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs , MDIO and SGMII PCS Supports 10/100 MII or RGMII Operation with SGMII Running at the Same


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII sgmii specification ieee ENG-46158
2006 - vhdl code for mac interface

Abstract: sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
Text: Figures 1 and 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet , FIFO I/F Ethernet MAC PCS GMII/MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII achieves a 50-percent reduction in the pin count , PCB designers. RGMII can carry Ethernet traffic at 10 Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII/MII. SGMII converts the parallel interface of the


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PDF DS550 Virtex-51 vhdl code for mac interface sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
2005 - bcm5488

Abstract: rgmii specification rgmii specification ieee sgmii specification ieee sgmii RGMII switch RGMII to MII RGMII SGMII
Text: , SGMII , and SerDes MAC interface options · 1-Gbps lineside SerDes with RGMII MAC interface option · , pin requirements with RGMII (over 50%), SGMII (over 75%), and SerDes (over 80%) · Clock timing can be adjusted to eliminate board trace delays required by the RGMII specification · Lowers MAC/switch , supports the RGMII , SGMII , and SerDes MAC interfaces. The RGMII , SGMII , and serial SerDes interfaces are , adjusted to eliminate the board trace delays required by the RGMII specification. These reduced-pin-count


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PDF BCM5488 10/100/1000BASE-T 10BASE-T/100BASE-TX/1000BASE-T 13-micron BCM5488 5488-PB00-R rgmii specification rgmii specification ieee sgmii specification ieee sgmii RGMII switch RGMII to MII RGMII SGMII
2008 - RGMII Layout Guide

Abstract: No abstract text available
Text: of gigabit Ethernet interfaces, that gluelessly connect to standard RGMII /RTBI/ SGMII or SerDes , conversion. The 9150 GMII (Host Only), and RGMII / SGMII (Host/Network) Interfaces can also be run in 10/100 , 1.0V 1.8V 2.5V 3.3V RGMII SGMII RTBI SerDes Osc. GMII RGMII SGMII TBI RTBI SerDes , , GMII, RGMII , SGMII and SerDes. The Network interface supports RTBI, RGMII , SGMII and SerDes interface formats. The GMII, RGMII , SGMII operate in 10/100/1000Gb modes while the SerDes, TBI, and RTBI operate in


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PDF DS-0142-C, DS-0142-C RGMII Layout Guide
2010 - 88E6182

Abstract: marvell 88E61 MSC825x marvell 88E1111 register RGMII RGMII to SGMII PHY RGMII switch RGMII phy RGMII to SGMII 88e1111 application code 88E1111
Text: -3/ RGMII 1,2 MSC8156 2.5 V 2-digit Display SGMII Switch SerDes2 SRIO/ PCIe/ SGMII TDM0 , Gigabit Ethernet RGMII RGMII PHY-2 PHY-1 SGMII Switch RJ45 RJ45 12V 2 EEPROM , · The DSP RGMII (at ports GE1 and GE2) connects to two single Marvell® 88E1111 GETH PHYs for regular board configuration · A Marvell 10-port SGMII switch 88E6182 links the MSC8156 SGMII lines to , or to the SGMII the switch ® · Two Dallas E1/T1 framers connect to the four DSP TDM ports · P1


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PDF MSC8156 MSC815x MSC825x MSC8156ADS MSC8156ADS) MSC8156, MSC8154, 88E6182 marvell 88E61 marvell 88E1111 register RGMII RGMII to SGMII PHY RGMII switch RGMII phy RGMII to SGMII 88e1111 application code 88E1111
2006 - RGMII constraints

Abstract: 1000base-x xilinx xilinx virtex 5 mac 1.3 V583 RGMII to SGMII fpga ethernet sgmii DS307 1000BASE-X Ethernet-MAC using vhdl ETHERNET-MAC
Text: Figures 1 and 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet , FIFO I/F Ethernet MAC PCS GMII/MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Reduced-GMII ( RGMII ) is an alternative to the GMII/MII. RGMII achieves a 45 percent reduction in the pin count , PCB designers. RGMII can carry Ethernet traffic at 10 Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to the GMII/MII. SGMII converts the parallel interface of the


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PDF DS307 1000BASE-X RGMII constraints 1000base-x xilinx xilinx virtex 5 mac 1.3 V583 RGMII to SGMII fpga ethernet sgmii Ethernet-MAC using vhdl ETHERNET-MAC
2004 - vhdl code for ethernet mac spartan 3

Abstract: application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII 1000BASE-X MDIO clause 22 clause 22 phy registers DS297
Text: , these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet port. The , Ethernet 1000BASE-X PCS/PMA or SGMII core or other custom logic - IOBs to provide an external GMII/MII - A shim to provide an external RGMII · Configured and monitored through an optional independent , / RGMII ) · Ethernet Tri-Speed BASE-T Port ( SGMII ) Note: The TEMAC core can be used in a 1000BASE-X port configuration by connecting the PHY side of the core to the Ethernet 1000BASE-X PCS/PMA or SGMII core; however


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PDF DS297 1000BASE-X vhdl code for ethernet mac spartan 3 application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII MDIO clause 22 clause 22 phy registers
2007 - BCM5482S

Abstract: bcm5482 RGMII SGMII sgmii specification ieee RGMII to SGMII sgmii mode sfp RGMII constraints 1000BASE-X sfp 1000BASE-X sfp sgmii 1000BASE-X
Text: required to meet EMI radiation specifications. The BCM5482S supports the RGMII , SGMII , and SerDes MAC interfaces. The RGMII , SGMII , and serial SerDes interfaces are reduced-pin-count (12, 6, and 4, respectively, versus 25) versions of the GMII. The RGMII clock timing can be adjusted to eliminate the board , integrated 10BASE-T/100BASE-TX/1000BASE-T Gigabit Ethernet transceiver · RGMII , SGMII , and SerDes MAC interface options · SGMII to SGMII support for SFP modules · 10/100/1000BASE-T and 1000BASE


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PDF BCM5482S 10/100/1000BASE-T 10BASE-T/100BASE-TX/1000BASE-T 1000BASE-X/100BASE-FX 1000BASE-X 100BASE-FX BCM5482S 5482S-PB00-R bcm5482 RGMII SGMII sgmii specification ieee RGMII to SGMII sgmii mode sfp RGMII constraints 1000BASE-X sfp 1000BASE-X sfp sgmii
2007 - MPC8377

Abstract: mpc8378 MPC8379 sgmii RGMII to SGMII PHY MPC837x-MDS-PB sAta rs232 MPC8377E-MDS-PB ethernet phy sgmii MPC837x
Text: /PHY 2-10/100/1000 ( RGMII , RTBI, RMII, MII) 2-10/100/1000 ( SGMII , RGMII , RTBI, RMII, MII , Ethernet Dual 10/100/1000 Gigabit Ethernet transceivers supporting RGMII , RTBI, MII and SGMII · USB , platform enables designers to bring up silicon, develop new software applications and do performance , Engine. The MPC8377 2 x PCI Express®* SATA PCI USB 2 x SGMII * also supports x2 PCI Express® and 2 SATA controllers, while the MPC8378 supports x2 PCI Express and 2 SGMII , and the MPC8379


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PDF MPC837x MPC837x-MDS-PB MPC8377E-MDS-PB MPC8378E-MDS-PB MPC8379E-MDS-PB MPC8377 mpc8378 MPC8379 sgmii RGMII to SGMII PHY sAta rs232 MPC8377E-MDS-PB ethernet phy sgmii
2006 - sgmii sfp virtex

Abstract: xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
Text: , RGMII , or SGMII to provide a tri-speed Ethernet port. The Ethernet MAC has built-in 1000BASE-X PCS/PMA , also used to delay the transmitted clock in RGMII V2.0. · For 1000BASE-X PCS/PMA or SGMII , this , Supports MII, GMII, RGMII v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces Supported HDL , /MII RGMII SGMII (RocketIO) PMD PMA 1000BASE-X (RocketIO) Figure 1: Typical Ethernet , Mbps, 100 Mbps, and 1 Gbps. RGMII The Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII


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PDF DS550 sgmii sfp virtex xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
2006 - BCM5466R

Abstract: sgmii specification ieee 1gbps serdes rgmii specification 1000BASE gigabit ethernet transceiver RGMII SGMII BCM5466
Text: full-duplex. RGMII , SGMII , and SerDes MAC interface options · Low-power, quad-port integration , for routing high-density solutions. - Reduces I/O pin requirements with RGMII (over 50%), SGMII , required by the RGMII specification. - Lowers MAC/switch costs by reducing the number of pins required to , supports the RGMII , SGMII , and SerDes MAC interfaces. The RGMII , SGMII , and serial SerDes interfaces are , adjusted to eliminate the board trace delays required by the RGMII specification. These reduced-pin-count


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PDF BCM5466R 10/100/1000BASE-T 5466R-PB02-R BCM5466R sgmii specification ieee 1gbps serdes rgmii specification 1000BASE gigabit ethernet transceiver RGMII SGMII BCM5466
2006 - Not Available

Abstract: No abstract text available
Text: required by the RGMII specification. - Lowers MAC/switch costs by reducing the number of pins required to interface to the PHY. Gigabit Ethernet transceivers • RGMII , SGMII , and SerDes MAC interface options , for routing high density solutions. - Reduced I/O pin requirements with RGMII (over 50%), SGMII , RGMII , SGMII , and SerDes MAC interfaces. The RGMII , SGMII , and Serial SerDes are reduced pin count (12, 6, and 4, respectively, versus 25) versions of the GMII. The RGMII clock timing can be adjusted to


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PDF BCM5464R 10/100/1000BASE-T 10BASE-T/100BASE-TX/1000BASE-T BCM5464R 5464R-PB01-R
2004 - sgmii specification ieee

Abstract: BCM5466R rgmii specification ieee bcm546 1gbps serdes RGMII SGMII rgmii specification switch SGMII MII GMII
Text: design constraints required to meet EMI radiation specifications. The BCM5466R supports the RGMII , SGMII , and SerDes MAC interfaces. The RGMII , SGMII , and serial SerDes inteerfaces are reduced-pin-count (12, 6, and 4, respectively, versus 25) versions of the GMII. The RGMII clock timing can be adjusted to , integrated 10BASE-T/100BASE-TX/1000BASE-T Gigabit Ethernet transceivers · RGMII , SGMII , and SerDes MAC , (over 50%), SGMII (over 75%), and SerDes (over 80%). · Clock timing can be adjusted to eliminate board


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PDF BCM5466R 10/100/1000BASE-T 10BASE-T/100BASE-TX/1000BASE-T BCM5466R 5466R-PB00-R sgmii specification ieee rgmii specification ieee bcm546 1gbps serdes RGMII SGMII rgmii specification switch SGMII MII GMII
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