The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
DP83867ERGZR Texas Instruments Extended temperature gigabit Ethernet PHY with SGMII 48-VQFN -40 to 105
DP83867ERGZT Texas Instruments Extended temperature gigabit Ethernet PHY with SGMII 48-VQFN -40 to 105
ISL5827INZ Intersil Corporation Dual 12-bit, +3.3V, 260MSPS, High Speed D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5728INZ Intersil Corporation 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5728INZ-T Intersil Corporation 10-Bit, 125/60MSPS, Dual High Speed CMOS D/A Converter; LQFP48; Temp Range: -40° to 85°C
HI5660/6IAZ-T Intersil Corporation 8-Bit, 125/60MSPS, High Speed D/A Converter; SOIC28, TSSOP28; Temp Range: -40° to 85°C

RGMII to SGMII PHY Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - RGMII to SGMII PHY

Abstract: MAX24287 switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii 1000BASE-X fpga ethernet sgmii fpga rgmii
Text: Wire-Speed Ethernet Interface Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs , Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component with an SGMII or 1000BASE , MAX 24287 TD TCLK 625 MHz (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII , -X SFP optical modules Connects processors with parallel MII interfaces to PHY or switch ICs with SGMII , for 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII to SGMII PHY switch SGMII MII GMII RGMII to SGMII sgmii sgmii mode sfp 1000BASE-X sfp sgmii fpga ethernet sgmii fpga rgmii
2008 - hifn 8450

Abstract: 1.5V RGMII hsbga 324 HSBGA hifn encryption express sgmii sfp tcam ip cores hifn lzs AN0145 IBM PCI Express serdes architecture
Text: , that gluelessly connect to standard RGMII /RTBI/ SGMII or SERDES Interfaces on both the Host and Network , ) . . . . . . . . . . . . 38 Table 6-6. 4450 RGMII /RTBI MAC/ PHY modes Host pin mappings . . . . . . . , . . 42 Table 6-8. 4450 RGMII /RTBI Host pin descriptions - PHY mode . . . . . . . . . . . . . . . 43 Table 6-9. 4450 RGMII /RTBI MAC/ PHY modes Network pin mappings . . . . . . . . . . . 43 Table 6-10. 4450 , Network pin descriptions - PHY mode. . . . . . . . . . . . 47 Table 6-12. 4450 SERDES and SGMII MAC/ PHY


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PDF DS-0131-06, DS-0131-06 hifn 8450 1.5V RGMII hsbga 324 HSBGA hifn encryption express sgmii sfp tcam ip cores hifn lzs AN0145 IBM PCI Express serdes architecture
2008 - RGMII Layout Guide

Abstract: No abstract text available
Text: of gigabit Ethernet interfaces, that gluelessly connect to standard RGMII /RTBI/ SGMII or SerDes , mode (Host Only) . . . . . . . . . . . . 40 Table 6-6. 9150 RGMII /RTBI MAC/ PHY modes Host pin mappings , . . . . . . . . . . 44 Table 6-8. 9150 RGMII /RTBI Host pin descriptions - PHY mode . . . . . . . . . . . . . . . 45 Table 6-9. 9150 RGMII /RTBI MAC/ PHY modes Network pin mappings . . . . . . . . . . , Table 6-11. 9150 RGMII /RTBI Network pin descriptions - PHY mode . . . . . . . . . . . . 49 Table 6-12


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PDF DS-0142-C, DS-0142-C RGMII Layout Guide
2012 - MAX24287

Abstract: RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
Text: (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII Component RXD[7:0] CDR , -X SFP optical modules Connects processors with parallel MII interfaces to PHY or switch ICs with SGMII , SGMII transmit signal to a neighboring 1000BASE-X optical module (SFP, etc.) or PHY with SGMII interface , processor with an RGMII or GMII interface to a switch device with an SGMII interface or to a 1000BASE , 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII 1000base SX transmitter sc ENG-46158 TF401
2011 - MAX24287

Abstract: RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
Text: Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs Serial Interface , TD SGMII PHY TCLK 625 MHz (Optional) b) Connect Parallel MII Component to SGMII Component , interfaces to PHY or switch ICs with SGMII interfaces Interface conversion is transparent to MAC layer and , 1.25Gbps SGMII or 1000BASE-X operation. In SGMII mode, the device interfaces directly to Ethernet switch , Interface a Component with a Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component


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PDF MAX24287 MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-100 max24287etk sgmii switch RGMII-1000 125Gb 1000BASE-X sfp 369B switch SGMII MII GMII MII100
2004 - vhdl code for ethernet mac spartan 3

Abstract: application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII 1000BASE-X MDIO clause 22 clause 22 phy registers DS297
Text: configuration by connecting the PHY side of the core to the Ethernet 1000BASE-X PCS/PMA or SGMII core; however , designers). The TEMAC core can be extended to include SGMII functionality by internally connecting its PHY , , these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet port. The , be connected to Slices LUTs FFs DCM BUFG - An embedded PHY core, such as the LogiCORE Ethernet 1000BASE-X PCS/PMA or SGMII core or other custom logic - IOBs to provide an external GMII/MII -


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PDF DS297 1000BASE-X vhdl code for ethernet mac spartan 3 application TEMAC TEMAC verilog code for mdio protocol RGMII RGMII SGMII MDIO clause 22 clause 22 phy registers
2010 - AR8033

Abstract: AR8031 AR8035 AR-8031 atheros ethernet switch AR8030 Atheros ar8035 RGMII to SGMII ATHEROS AR80 AR8031-11-29-10
Text: PHY . It supports both RGMII and SGMII interfaces to the MAC. The AR8031 provides a low-power, low BOM , AR8031 Ultra low-power 10/100/1000 RGMII / SGMII Gigabit Ethernet Transceiver Technology Overview , consumers and businesses. Solution Highlights AR8031 Product Overview · SGMII and RGMII MAC , RGMII / SGMII RGMII / SGMII TRD[0:3] Hybrid Circuit PGA AGC PMA The AR8031 also supports , on both the MAC interfaces ( RGMII / SGMII ) and the line side. ADC Trellis Decoder Timing and


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PDF AR8031 AR8031-11-29-10 AR8033 AR8031 AR8035 AR-8031 atheros ethernet switch AR8030 Atheros ar8035 RGMII to SGMII ATHEROS AR80 AR8031-11-29-10
2015 - 88E6097

Abstract: 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
Text: -88E6071-1 1K 64 9mm x 9mm 64-QFN Yes: 1 PHY Port Yes 7 5 PHYs 2 RMII (or 1 MII/ RGMII , PHYs GMII/ RGMII / SGMII 64 d Au 1.0W 6 2K DB-88E6085-1 rt Pa ard Bo s on er , Family Automotive Grade *Parts available in temperature range -25C to 85C. MARVELL PRODUCT , *Parts available in temperature range -25C to 85C. MARVELL PRODUCT SELECTOR GUIDE | February 2015 , * PXA270 Family *Parts available in temperature range -25C to 85C. MARVELL PRODUCT SELECTOR GUIDE


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PDF CH-1163 88E6097 88E6020 88E1119 88E6071 Marvell 88E1512 88AP270M 88W8897 Marvell PHY 88E6352 88PG867 MV64460
2009 - VSC3441

Abstract: VSC8658 VSC8240 VSC8664 VSC3406 VSC7407 vsc8479-01 VSC7986 VSC7346 VSC7401
Text: and VScopeTM 10/100/1000BASE-T PHY with RGMII and GMII MAC Interface VSC8224 Quad Port 10/100/1000BASE-T and 1000BASE-X PHY with RGMII and RTBI MAC Interfaces VSC8234 Quad Port 10/100/1000BASE-T PHY with SGMII and SerDes MAC Interfaces VSC8244 Quad Port 10/100/1000BASE-T PHY with RGMII , -T PHY , 1000BASE-X, and 100BASEFX PHY with SGMII , SerDes, GMII, MII, TBI, RGMII /RTBI VSC8221 Single , -T PHY with SGMII MAC Interface VSC8538 Octal Port 10/100/1000BASE-T PHY with SGMII MAC Interface


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PDF VSC3406 VSC7104 VSC7108 VSC8228 VSC8240 VSC8242 10/100/1000BASE-T VSC8224 1000BASE-X VSC3441 VSC8658 VSC8240 VSC8664 VSC3406 VSC7407 vsc8479-01 VSC7986 VSC7346 VSC7401
2006 - vhdl code for mac interface

Abstract: sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
Text: Figures 1 and 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet , FIFO I/F Ethernet MAC PCS GMII/MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII achieves a 50-percent reduction in the pin count , PCB designers. RGMII can carry Ethernet traffic at 10 Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII/MII. SGMII converts the parallel interface of the


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PDF DS550 Virtex-51 vhdl code for mac interface sfp design virtex-5 ETHERNET-MAC verilog code for ethernet FPGA Virtex 6 vhdl code for phy interface RGMII phy Xilinx gmii sfp fpga ethernet sgmii 1000BASE-X fpga rgmii
2009 - ML605 UCF FILE

Abstract: iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
Text: illustrated in Figure 1 and Figure 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a , v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces, as well as GMII/MII at 2.5V only , RGMII SGMII PCS PMA 1000BASE-X PMD Figure 1: Typical Ethernet Architecture Figure 1 displays , (UG368). RGMII The Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII achieves a 50 , Gb/s. SGMII The Serial-GMII ( SGMII ) interface is an alternative to GMII/MII. SGMII converts the


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PDF DS710 ML605 UCF FILE iodelay virtex-6 ML605 user guide switch SGMII MII GMII RAMB36s example ml605 ethernet fpga rgmii 1000base-x xilinx 1000BASE-X sfp sgmii RGMII to SGMII
2012 - Not Available

Abstract: No abstract text available
Text: rgmii_in_to_the_triple_speed_ethernet_0 I RGMII receive data bus. Connect this bus to the on-board PHY chip. rx_control_to_the_triple_speed_ethernet_0 I RGMII receive control output signal. Connect this signal to the on-board PHY chip. rgmii_out_from_the_triple_speed_ethernet_0 I RGMII transmit data bus. Connect this bus to the on-board PHY chip. tx_control_from_the_triple_speed_ethernet_0 I RGMII transmit control output signal. Connect this signal to the on-board PHY chip , rxp_to_the_triple_speed_ethernet_0 I SGMII receive data bus. Connect this bus to the on-board PHY chip


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PDF AN-647-1 88E1111
2012 - RGMII-1000

Abstract: MAX24287 switch SGMII MII GMII sgmii specification ieee ENG-46158
Text: Wire-Speed Ethernet Interface Conversion Can Interface Directly to SFP Modules and SGMII PHY and Switch ICs , Parallel MII Interface (GMII, RGMII , TBI RTBI, 10/100 MII) to a Component with an SGMII or 1000BASE , (Optional) SGMII PHY b) Connect Parallel MII Component to SGMII Component RXD[7:0] CDR , processors with parallel MII interfaces to PHY or switch ICs with SGMII interfaces Interface conversion is , SGMII PCS Configurable for 10/100 MII DTE or DCE Modes (i.e., connects to PHY or MAC) Synchronous


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PDF MAX24287 25Gbps 1000BASE-X 1000BASE-T RGMII-1000 switch SGMII MII GMII sgmii specification ieee ENG-46158
2007 - sgmii sfp virtex

Abstract: UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl DS307 1000BASE-X RGMII SGMII
Text: Figures 1 and 2, these can be connected using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet , FIFO I/F Ethernet MAC PCS GMII/MII RGMII SGMII (RocketIO) PMD PMA 1000BASE , Reduced-GMII ( RGMII ) is an alternative to the GMII/MII. RGMII achieves a 45 percent reduction in the pin count , PCB designers. RGMII can carry Ethernet traffic at 10 Mbps, 100 Mbps, and 1 Gbps. SGMII The Serial-GMII ( SGMII ) interface is an alternative to the GMII/MII. SGMII converts the parallel interface of the


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PDF DS307 1000BASE-X sgmii sfp virtex UCF virtex-4 1000base-x xilinx 1000BASE-X sfp sgmii sgmii mode sfp fpga ethernet sgmii xilinx tcp vhdl RGMII SGMII
2011 - freescale p2040

Abstract: RGMII to SGMII PHY e500mc VITESSE VSC8641 P2041RDB symmetricom sgmii sata to sd sgmii switch
Text: Supports five 10/100/1000 ports with no add-in cards · dTSEC1-dTSEC3 as SGMII to PHY : Vitesse VSC8221 · dTSEC4-dTSEC5 as RGMII to PHY : Vitesse VSC8641 · 10 GE can be supported with Freescale's optional XAUI-RISER , supports three SGMII ports and two RGMII ports, a 2-lane PCI Express slot, and two SATA ports (one , ) 128 MB NOR Flash x2 Lanes C, D Lane G DeMux SGMII #1 SGMII #2 Lanes E, F, H PHY PHY RJ-45 RJ-45 PCI Express® x4 Slot 1 PHY RJ-45 USB Conn Type A DB9 x2 x2 RS232 Serial SerDes SGMII #3 Lane C,D


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PDF P2041 P2040 P2041RDB P2040. VSC8221 VSC8641 P2041RDBFS freescale p2040 RGMII to SGMII PHY e500mc VITESSE VSC8641 symmetricom sgmii sata to sd sgmii switch
Marvell 88E1512

Abstract: 88E6352 88E6176 Marvell 88E1510 88E6172 88E6071 88E6020 88E6161 88E6097 88w8782
Text: Switch 11 8 FE PHYs GMII/ RGMII / SGMII 8 FE PHYs GMII/ RGMII / SGMII 4 FE PHYs 1 GE PHY 1 Serdes 1 , MII/ RGMII ) 8 PHYs 2 MII 0.5W DB1-88E6071-1 1K 64 3mm x 3mm 64-QFN Yes: 1 PHY , Ethernet Switch 6 4 FE PHYs GMII/ RGMII / SGMII r we Po X -F e yp eT e Siz p 1.0W 1.0W , temperature range -25C to 85C. 800MHz 7 chip selects 7 chip selects 7 chip selects 7 chip selects 7 chip , -B1-BGK2C624-TS02 88AP310-B1-BGK2C806-TN02 *Parts available in temperature range -25C to 85C. 624MHz 8 chip selects


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2009 - ENG-46158

Abstract: clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii 1000BASE-X
Text: 802.3 Clause 36. For SGMII this link is connected to an external Ethernet PHY device that supports , Freescale Semiconductor Implementing SGMII Interfaces are then transferred by the PHY to the PQIII , control information sent to the MAC from the PHY . Figure 5. Phy to MAC (PQIII) SGMII Information , shown in Figure 6. Figure 6. MAC (PQIII) to Phy SGMII Information Transfer Upon completion of the , SGMII and based on a MAC to PHY information exchange, 1000BaseX is based on a MAC to MAC communication


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PDF AN3869 ENG-46158 clause 37 AN3869 IEEE 802.3 Clause 27 eTSEC GMII Initial "IEEE 802.3" "Clause 27" RGMII to SGMII PHY sgmii specification ieee sgmii 1000BASE-X
2004 - xilinx tcp vhdl

Abstract: TEMAC 1000BASE-X application TEMAC DS297 fpga ethernet sgmii IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL MDIO communication protocol UCF virtex4
Text: the TEMAC core. The PHY side of the core is connected to internally integrated SGMII logic using the , designers). The TEMAC core can be extended to include SGMII functionality by internally connecting its PHY , using GMII/MII, RGMII , or SGMII to provide a tri-speed Ethernet port. The 1000BASE-X architecture , been connected to external BASE-T PHY devices using both GMII and RGMII interfaces, as illustrated in , Optional MDIO interface to managed objects in PHY layers (MII Management) · Optional Address Filter with


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PDF DS297 xilinx tcp vhdl TEMAC 1000BASE-X application TEMAC fpga ethernet sgmii IMPLEMENTATION OF IEEE 802.3 MAC TRANSMITTER USING VHDL MDIO communication protocol UCF virtex4
2006 - sgmii sfp virtex

Abstract: xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
Text: , RGMII , or SGMII to provide a tri-speed Ethernet port. The Ethernet MAC has built-in 1000BASE-X PCS/PMA , also used to delay the transmitted clock in RGMII V2.0. · For 1000BASE-X PCS/PMA or SGMII , this , Supports MII, GMII, RGMII v1.3, RGMII v2.0, SGMII , and 1000BASE-X PCS/PMA interfaces Supported HDL , /MII RGMII SGMII (RocketIO) PMD PMA 1000BASE-X (RocketIO) Figure 1: Typical Ethernet , Mbps, 100 Mbps, and 1 Gbps. RGMII The Reduced-GMII ( RGMII ) is an alternative to GMII/MII. RGMII


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PDF DS550 sgmii sfp virtex xilinx virtex 5 mac 1.3 fpga rgmii RGMII to MII fpga ethernet sgmii iodelay Virtex-5 LXT Ethernet GTX 460 switch SGMII MII GMII GTP ethernet
VSC8211

Abstract: RGMII to SGMII PHY SGMII L10M rgmii specification gmii layout 1000BASE-X sfp sgmii 1000BASE-SX SFP/RGMII to SGMII 100BASE-FX
Text: 1000BASE-X PHY with SGMII , SerDes, GMII, MII, TBI, RGMII / RTBI MAC Interfaces GENERAL DESCRIPTION: The , ETHERNET PRODUCTS VSC8211 Single Port 10/100/1000BASE-T PHY and 1000BASE-X PHY with SGMII , SerDes, GMII, MII, TBI, RGMII / RTBI MAC Interfaces 3.3v 10/100/1000 Mbps Ethernet MAC 1.2v Cat , RGMII and RTBI v 1.3 & v 2.0 (2.5V & 3.3V) Connects to Virtually any MAC or Optical Module and can be Used to Design Copper GBIC/SFP Modules and 100BASE-FX Modules User-programmable RGMII Timing


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PDF VSC8211 10/100/1000BASE-T 1000BASE-X 10/100/1000BASE-T RJ-45 1000BASE-LX 1000BASE-SX 700mW VSC8211 RGMII to SGMII PHY SGMII L10M rgmii specification gmii layout 1000BASE-X sfp sgmii 1000BASE-SX SFP/RGMII to SGMII 100BASE-FX
2010 - 88E6182

Abstract: marvell 88E61 MSC825x marvell 88E1111 register RGMII RGMII to SGMII PHY RGMII switch RGMII phy RGMII to SGMII 88e1111 application code 88E1111
Text: Gigabit Ethernet RGMII RGMII PHY -2 PHY -1 SGMII Switch RJ45 RJ45 12V 2 EEPROM , controllers, MII controller to program RGMII PHY , SPI controller, boot sequencer configures ADS peripherals , -3/ RGMII 1,2 MSC8156 2.5 V 2-digit Display SGMII Switch SerDes2 SRIO/ PCIe/ SGMII TDM0 , · The DSP RGMII (at ports GE1 and GE2) connects to two single Marvell® 88E1111 GETH PHYs for regular board configuration · A Marvell 10-port SGMII switch 88E6182 links the MSC8156 SGMII lines to


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PDF MSC8156 MSC815x MSC825x MSC8156ADS MSC8156ADS) MSC8156, MSC8154, 88E6182 marvell 88E61 marvell 88E1111 register RGMII RGMII to SGMII PHY RGMII switch RGMII phy RGMII to SGMII 88e1111 application code 88E1111
2011 - P1010-RDB

Abstract: No abstract text available
Text: €¢ eTSEC 1 connected to RGMII PHY • eTSEC 2 and 3 connected to SGMII PHY Flex CAN For more , GB) x32 bits P1014:16 bits DUAL SLIC Relay Reset CPLD POR Config RGMII SGMII PHY RJ-45 SGMII PHY RJ-45 RGMII PHY RJ-45 Header DAC VCXO The P1010 processor , SGMII or RGMII PHYs, as well as a single-port USB and associated PHY . Along with the hardware , connectors for field bus interface USB 2.0 • One USB 2.0 port connected via UTMI PHY to mini AB


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PDF P1010/P1014 P1010RDB P1010 P1014 P1010RDBFS P1010-RDB
2009 - example ml605

Abstract: Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 Xilinx spartan Marvell PHY 88E1111 Xilinx ML605 microblaze locallink 88E1111 RGMII config Marvell PHY 88E1111 ml505 LocalLink 88E1111 GMII config XAPP691
Text: to the PHY . GMII/MII, RGMII , SGMII and 1000BASE-X PCS/PMA interfaces are used in this example. Also , RGMII connectivity to Ethernet PHY : Jumper between pins 1 and 2 For SGMII connectivity to Ethernet PHY , BASE-T PHY ), system_rgmii.xmp ( RGMII connectivity to BASE-T PHY ), or system_sgmii.xmp ( SGMII , Subsystem Pattern Generator EMAC0 (GMII/MII, RGMII , or SGMII ) Tx PHY Rx LocalLink Swap , logic for the physical interfaces. The GMII/MII, RGMII , or SGMII interface is connected to an external


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PDF XAPP1144 ML605 example ml605 Marvell PHY 88E1111 Xilinx Marvell PHY 88E1111 Xilinx spartan Marvell PHY 88E1111 Xilinx ML605 microblaze locallink 88E1111 RGMII config Marvell PHY 88E1111 ml505 LocalLink 88E1111 GMII config XAPP691
2011 - VSC8572

Abstract: No abstract text available
Text: VSC8572 PRODUCT BRIEF Dual Port Dual Media RGMII / SGMII GbE PHY with IEEE 1588 Vitesse’s new , Gigabit PHY transceiver designed to simplify the support of fully traceable timing across Gigabit , two dual media copper/fiber ports with RGMII and SGMII MAC interfaces. Recovered clock outputs and an , supports ring resiliency, a feature that enables PHY ports to switch between master and slave timing , €¢ Integrated temperature monitoring and LED brightness control • Supports RGMII v1.3/2.0, SGMII v1


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PDF VSC8572 1588v2 VSC8572
2010 - RGMII phy

Abstract: uboot p1020 P1020RDB rj11 to db9 mini PCI express pcb P1020 p1020 freescale 1588 PHY RJ11 pcb connector Rgmii RJ45
Text: capable ports via an SGMII PHY , leading-edge external components to help an RGMII PHY and an , switch connected to eTSEC1 · One SGMII PHY connected to eTSEC2 · One RGMII PHY connected to eTSEC3 , PCI Express® 1.0a controllers, up to two SGMII SerDes interfaces, 32-bit DDR2/3 with ECC, SPI , RGMII PHY DUART RGMII RGMII RJ45 RJ45 eTSEC SPI PCI Express® eTSEC RJ45 PCI , Not Connected RJ11 TDM SGMII PHY RJ45 DAC VCXO Dual SLIC PCI Express RJ11


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PDF P1020/P1011 P1020RDB P1020 P1020RDBFS RGMII phy uboot p1020 rj11 to db9 mini PCI express pcb p1020 freescale 1588 PHY RJ11 pcb connector Rgmii RJ45
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