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RC4640 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2001 - IDT79RC4640

Abstract: RC3041 RC4640 RC4650
Text: policy To keep the RC4640's high-performance pipeline full and operating efficiently, the RC4640 , development of RC4640-based systems, allowing a wide variety of customers access to the processor , The RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE , physical address space (kseg1) Unmapped, 0.5GB Table 3 shows the CP0 registers of the RC4640. Number , , although some changes have been implemented. Table 4 is an overview of the caches found on the RC4640. 2


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PDF IDT79RC4640TM 64-bit 3200MB/sec RC4000 125MHz, 32-bit IDT79R4640 133MHz IDT79RV4640 IDT79RC4640 RC3041 RC4640 RC4650
1999 - Not Available

Abstract: No abstract text available
Text: RC4640's high-performance pipeline full and operating efficiently, the RC4640 incorporates on-chip , Mul-Add/sec. An array of tools facilitates rapid development of RC4640-based systems, allowing a wide , RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE Standard , the RC4640. 1XPEHU 1DPH 0 1 2 3 4-7, 10, 2025, 29, 31 8 9 11 12 13 14 15 16 17 IBase IBound DBase , been implemented. Table 4 is an overview of the caches found on the RC4640. Miss restart after


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PDF 64-bit IDT79RC4640TM 100MHz, 133MHz, 150MHz, 180MHz, 200MHz
1998 - MAB100

Abstract: maa 550
Text: of RC4640-based systems, tion. The register file consists of two read ports and one write port and , , allowing this high-performance to be achieved with simple programming. The RC4640's floating-point , Operation "#$ Table 3 shows the CP0 registers of the RC4640. %& $&' ABS 1 , ! To keep the RC4640's high-performance pipeline full and operating efficiently, the , RC4640. 0x80000000 0x7FFFFFF User virtual address space (useg) Mapped, 2.0GB 0x00000000


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PDF 64-bit 100MHz, 150MHz, 180MHz, 200MHz 32-bit MAB100 maa 550
1999 - Not Available

Abstract: No abstract text available
Text: tools facilitates rapid development of RC4640-based systems, tion. The register file consists of two , high-performance to be achieved with simple programming. The RC4640's floating-point execution units perform , Table 3 shows the CP0 registers of the RC4640. The floating-point register file is made up of , physical address space (kseg0) Unmapped, 0.5GB To keep the RC4640's high-performance pipeline full and , of the caches found on the RC4640. 0x80000000 0x7FFFFFF User virtual address space (useg


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PDF 64-bit 100MHz, 150MHz, 180MHz, 200MHz 32-bit
2008 - IDT79RC4640

Abstract: RC3041 RC4640 RC4650 79rv4640 79r4640
Text: rapid development of RC4640-based systems, allowing a wide variety of customers access to the processor , RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE Standard , registers of the RC4640. Number Name Uncached kernel physical address space (kseg1) Unmapped, 0.5GB , word Parity per-word per-byte Cache locking To keep the RC4640's high-performance , is an overview of the caches found on the RC4640. 2-way set associative 2-way set associative


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PDF IDT79RC4640TM 64-bit 3200MB/sec RC4000 125MHz, 32-bit 79R4640 133MHz 79RV4640 IDT79RC4640 RC3041 RC4640 RC4650
2000 - IDT79RC4640

Abstract: RC3041 RC4640 RC4650
Text: of tools facilitates rapid development of RC4640-based systems, allowing a wide variety of , . )ORDWLQJ03RLQW#8QLWV The RC4640's floating-point execution units perform single precision arithmetic, as , physical address space (kseg1) Unmapped, 0.5GB Table 3 shows the CP0 registers of the RC4640. 1XPEHU , . writeback /writethru To keep the RC4640's high-performance pipeline full and operating efficiently, the , RC4640. Line transfer order read sub-block order read sub-block order write sequential


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PDF IDT79RC4640TM 64-bit 100MHz, 133MHz, 150MHz, 180MHz, 200MHz IDT79RC4640 RC3041 RC4640 RC4650
2001 - MIPS R4000

Abstract: No abstract text available
Text: policy To keep the RC4640's high-performance pipeline full and operating efficiently, the RC4640 , of tools facilitates rapid development of RC4640-based systems, allowing a wide variety of , The RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE , physical address space (kseg1) Unmapped, 0.5GB Table 3 shows the CP0 registers of the RC4640. Number , , although some changes have been implemented. Table 4 is an overview of the caches found on the RC4640. 2


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PDF IDT79RC4640TM 64-bit 3200MB/sec RC4000 125MHz, 32-bit IDT79R4640 133MHz IDT79RV4640 MIPS R4000
1999 - Not Available

Abstract: No abstract text available
Text: development of RC4640-based is fully bypassed to minimize operation latency in the pipeline. systems, allowing , bit DMULT, DMULTU any DIV, DIVU DDIV, DDIVU any any The RC4640's floating-point execution , shows the CP0 registers of the RC4640. " The floating-point register file is made up , decoding interrupts from general purpose exceptions. ! ! To keep the RC4640's high-performance , an overview of the caches found on the RC4640. User virtual address space (useg) Mapped, 2.0GB


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PDF 64-bit 100MHz, 150MHz, 180MHz, 200MHz 267MHz 32-bit
1998 - RC4650

Abstract: RC4640 MQUAD 79S440 79S465 79S467
Text: the RC4640. Selecting between the two CPU options is accomplished through hardware jumpers. However , performance of either the RC4650 or the RC4640. The S440 supports 32-bit system interface for the RC4640 and , Evaluation & Reference Boards Integrated Device Technology IDT 79S440 RC4640 /50 Daughter Card Features x RC4650/ RC4640 highly integrated RISController CPU support x RC4640 clock generation circuitry x 3.3V and 5V operation x 32-bit system interface support for RC4640 x


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PDF 79S440 RC4640/50 RC4650/RC4640 RC4640 32-bit RC4640 64-bit RC4650 79S465 IDT79S440 RC4650 MQUAD 79S440 79S467
IDT79RC4640

Abstract: RC3041 RC4640 RC4650
Text: development of RC4640-based systems, allowing a wide variety of customers access to the processor , RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE Standard , periodic interrupt. Table 3 shows the CPO registers of the RC4640. Number Name Function 18 IWatch , avoid decoding interrupts from general purpose exceptions. Cache Memory To keep the RC4640's , . Table 4 is an overview of the caches found on the RC4640. Instruction Cache The RC4640 incorporates a


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PDF 64-bit IDT79RC4640T 100MHz, 133MHz, 150MHz, 180MHz, 200MHz IDT79RC4640 RC3041 RC4640 RC4650
Not Available

Abstract: No abstract text available
Text: RC4640-based systems, allowing a wide variety of customers access to the processor's high-performance , . Floating-Point Units The RC4640†™s floating-point execution units perform single preci­ sion arithmetic, as , the CPO registers of the RC4640. In s tru c tio n L a te n c y ABS 1 N u m b er MOV , (ksegO) To keep the RC4640's high-performance pipeline full and oper­ Unmapped, 0.5GB ating , the RC4640. 0x00000000 Instruction Cache Figure 1: Mode Virtual Addressing (32-bit mode


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PDF 4640T 64-bit 100MHz, 150MHz, 180MHz, 200MHz 32-bit
1999 - RC4640

Abstract: RC4650 RC64474 RC64475 RC64575 TN-46 RISCore4000 RC64574
Text: supported on the RC4640. The JTAG pins should not be exercised if the RC4640 is fitted. The table below , , but it can be selected at boot time. This feature is not supported on the RC4640. VHXVV, HUDZWIR6 , by the RC4640. This optional exception vector is enabled through the CP0 Cause Register bit 23 , & The RC64474 and the RC64574 do not include the "CAlg Register" that is implemented on the RC4640. The , attribute of every memory region on the RC4640. This mechanism is accomplished by using the TLB on the


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PDF RC4640/RC64474/RC64574 TN-46 64-bit RC4640, RC64474 RC64574 32-bit RC4650, RC64475 RC64575 RC4640 RC4650 TN-46 RISCore4000
1999 - RC4640

Abstract: RC4650 RC64474 RC64475 RC64575 TN-46
Text: is not supported on the RC4640. The JTAG pins should not be exercised if the RC4640 is fitted. The , compatibility with the RC4640 , but it can be selected at boot time. This feature is not supported on the RC4640. , the RC4640. This optional exception vector is enabled through the CP0 Cause Register bit 23 (Cause.IV , RC64474 and the RC64574 do not include the "CAlg Register" that is implemented on the RC4640. The CAlg , every memory region on the RC4640. This mechanism is accomplished by using the TLB on the RC64474 and


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PDF RC4640/RC64474/RC64574 TN-46 64-bit RC4640, RC64474 RC64574 32-bit RC4650, RC64475 RC64575 RC4640 RC4650 TN-46
1999 - Not Available

Abstract: No abstract text available
Text: facilitates rapid development of RC4640-based systems, allowing a wide variety of customers access to the , rounding modes. The RC4640's floating-point execution units perform single precision arithmetic , periodic interrupt. Table 3 shows the CP0 registers of the RC4640. 0 1 2 3 IBase IBound DBase , first word per-byte set A ! ! To keep the RC4640's high-performance pipeline full and operating , found on the RC4640. Miss restart after transfer of Parity Cache locking entire line per-word set


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PDF 64-bit IDT79RC4640TM 100MHz, 133MHz, 150MHz, 180MHz, 200MHz
MAB100

Abstract: RC306 DT-408 MAA550
Text: RC4640's high-performance pipeline full and oper ating efficiently, the RC4640 incorporates on-chip , facilitates rapid development of RC4640-based systems, is fully bypassed to minimize operation latency in the , RC4640's floating-point execution units perform single preci sion arithmetic, as specified in IEEE Standard , registers of the RC4640. Number 0 1 2 3 4-7,10, 2025, 29, 31 8 9 11 Name IBase IBound DBase DBound - , been implemented. Table 6 is an overview of the caches found on the RC4640. 0x80000000 0X7FFFFFF


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PDF 64-bit IDT79RC46401 100MHz, 150MHz, 180MHz, 200MHz 32-bit MAB100 RC306 DT-408 MAA550
1999 - RC40

Abstract: RC4640 IDT79RC4640 RC3041 RC4650
Text: RC4640-based systems, allowing a wide variety of customers access to the processor's high-performance , WQLR3JQLWDRO) DIV, DIVU The RC4640's floating-point execution units perform single precision arithmetic , Table 3 shows the CP0 registers of the RC4640. Kernel virtual address space (kseg2) Unmapped, 1.0 , HKFD& \ URPH0 HKFD& \ URPH0 HKFD& To keep the RC4640's high-performance pipeline full and , of the caches found on the RC4640. 8KB Organization The RC4640 also adds the capability to


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PDF IDT79RC4640TM 64-bit 100MHz, 133MHz, 150MHz, 180MHz, 200MHz RC40 RC4640 IDT79RC4640 RC3041 RC4650
2001 - Not Available

Abstract: No abstract text available
Text: of tools facilitates rapid development of RC4640-based systems, allowing a wide variety of customers , RC4640's floating-point execution units perform single precision arithmetic, as specified in IEEE Standard , . Table 3 shows the CP0 registers of the RC4640. Number 0 1 2 3 Name IBase IBound DBase DBound Function , exceptions. Cache Memory To keep the RC4640's high-performance pipeline full and operating efficiently, the , RC4640. Instruction Cache The RC4640 incorporates a two-way set associative on-chip instruction cache


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PDF 64-bit 100MHz, 133MHz, 150MHz, 180MHz, 200MHz 267MHz
1998 - diode 1nu

Abstract: 53c810 P-4032 mini project on risc architecture sun sparc pinout BSP386 RC4640 RC64474 53C81
Text: Evaluation & Reference Boards Algorithmics P-4032 algori thmics RC4640 Single Board Computer Features x Description IDT RC4640 and RC64474 processors offering 100MHz+ 64-bit power , available x CPU: IDT RC4640 and RC64474 at 50-67MHz interface speed. Various configurations are , general-purpose parallel I/O x Windows CE support CPUs Supported RC4640 , RC64474 Host Platforms , 1995/96 in response to increasing customer interest in the low-cost RC4640 variants of the MIPS CPU


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PDF P-4032 RC4640 RC64474 100MHz+ 64-bit 32-bit P-4032 53C810 P-4032. diode 1nu mini project on risc architecture sun sparc pinout BSP386 53C81
1998 - 85C30

Abstract: crt terminal interface block diagram RC64475 RC5000 RC4650 RC4640 79S500 79S467 sram 2Mbyte 79S440
Text: and software environment. It is also intended for evaluation and development with the RC4640 , RC4650 , RC4650, the 79S440 and 79S467 are needed for the RC4640 , the 79S500 is needed for the RC5000, the , from a 64-bit system interface to a 32-bit interface to support the RC4640 , RC4650, RC64474 and , plugged-in. CPUs Supported RC4700, RC4640 (w/79S440 and 79S467), RC4650 (w/79S440), RC5000 (w/79S500


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PDF 79S465 64-Bit 12-pin DP83932 79S465 RC4700, RC4640 w/79S440 79S467) RC4650 85C30 crt terminal interface block diagram RC64475 RC5000 RC4650 RC4640 79S500 79S467 sram 2Mbyte 79S440
1999 - gt-64111-P-1

Abstract: GT-64111 GT64111P1 mips r4000 pin diagram NEC VR4300 diode sy 526 VR4300 RC4650 RC4640 gt-64011-p
Text: GT-64111 Product Preview Revision 1.1 FEB 4, 1999 System Controller for RC4640 , RM523X and , Support the following 32-bit bus CPUs: - IDT RC4640 and RC4650 (in 32-bit mode) - QED RM523X - NEC , -64111 System Controller for RC4640 , RM523X and VR4300 CPUs 2 Revision 1.0 GT-64111 System Controller for RC4640 , RM523X and VR4300 CPUs Table of Contents 1. OVERVIEW , Revision 1.0 35 35 35 36 36 36 39 39 39 40 43 GT-64111 System Controller for RC4640


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PDF GT-64111 RC4640, RM523X VR4300 32-bit RC4640 RC4650 RM523X VR4300 gt-64111-P-1 GT-64111 GT64111P1 mips r4000 pin diagram NEC VR4300 diode sy 526 RC4650 gt-64011-p
1999 - GT64115

Abstract: GT-64111 NEC VR4300
Text: GT-64115 Galileo System Controller for RC4640 , RM523X, and VR4300 CPUs Datasheet Revision , Support the following 32-bit bus CPUs: - IDT RC4640 and RC4650 (in 32-bit mode). - QED RM523X. - NEC , Controller for RC4640 , RM523X, and VR4300 CPUs · 32-bit high-performance PCI 2.1 compliant interface: - , -64115 System Controller for RC4640 , RM523X, and VR4300 CPUs TABLE OF CONTENTS 1. Overview , . . . . . . . . . . . . . . . . 2­2 RC4640 /RM523X to VR4300 Pins Multiplex Table . . . . . . . . . .


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PDF GT-64115 RC4640, RM523X, VR4300 32-bit RC4640 RC4650 RM523X. VR4300. GT64115 GT-64111 NEC VR4300
1999 - Not Available

Abstract: No abstract text available
Text: RC4640 /RC4650 Device Errata Notes Supplemental Information This Device Errata affects all revisions of RC4640 /RC4650 silicon Revision History July 7 1999: First version of errata for RC4640 /RC4650 Descriptions and Workarounds Item #1 - NMI behaviour Issue: If a non-maskable interrupt (NMI*) occurs while the CPU is processing an exception, the NMI detection logic will fail if the pipeline cancelling logic and the NMI edge detection logic occur in the same Pipeline Clock (internal clock) cycle. The NMI


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PDF RC4640/RC4650 RC4640/RC4650
2000 - GT-64115

Abstract: pajero GT64115 RC4640 RC4650 VR4300 GT-64111 NEC VR4300
Text: GT­64115 Galileo System Controller for RC4640 , RM523X, and VR4300 CPUs Datasheet , applications. · Support the following 32-bit bus CPUs: - IDT RC4640 and RC4650 (in 32-bit mode). - QED , support@galileoT.com GT­64115 System Controller for RC4640 , RM523X, and VR4300 CPUs · 32-bit high-performance , or applications. 2 Revision 1.11 GT­64115 System Controller for RC4640 , RM523X, and VR4300 , . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 RC4640 /RM523X to


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PDF RC4640, RM523X, VR4300 32-bit RC4640 RC4650 RM523X. VR4300. 75MHz GT-64115 pajero GT64115 RC4650 GT-64111 NEC VR4300
1998 - 53C810

Abstract: AP605 i486 PC MOTHERBOARD CIRCUIT diagram ht6542b 85C30 schematic CMA110 HT6542 Artesyn Technologies, Inc heurikon AMD PCMCIA Flash Memory Card
Text: and Power QUAD foot prints as well as the PQPF foot prints of the RC4640. Selecting between the two , RC4640. The S440 supports 32-bit system interface for the RC4640 and 64-bit system interface for the , Evaluation & Reference Boards Algorithmics P-4032 algori thmics RC4640 Single Board Computer Features x Description IDT RC4640 and RC64474 processors offering 100MHz+ 64-bit power with a 32 , available x CPU: IDT RC4640 and RC64474 at 50-67MHz interface speed. Various configurations are


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PDF P-4032 RC4640 RC64474 100MHz+ 64-bit 32-bit P-4032 53C810 ISO9001 AP605 i486 PC MOTHERBOARD CIRCUIT diagram ht6542b 85C30 schematic CMA110 HT6542 Artesyn Technologies, Inc heurikon AMD PCMCIA Flash Memory Card
1998 - 64-Bit Microprocessors

Abstract: 8210 microprocessor RC4640 RC4650 RC5000 RC64474 RC64475 RISCore4000
Text: 's existing 64-bit RC4640TM and RC4650TM processors. This enables customers to upgrade their current systems , RISCore4000 family include the RC4700TM, RC4640 and the RC4650. The RC64474 uses a 32-bit external system , . The majority of available tools in the program for the RC4700 and RC4640 /50 processors will support , between the company's RC4640 /50 64-bit processors and its high-end RC5000TM microprocessor. Offering a , ) and CD-ROM by calling 800/345-7015. ### RC4640 , RC4650, RC4700, RC5000, RC64474, RC64475, Advantage


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PDF 64-BIT 1998--IDT RC64474TM RC64475TM. RC64474/475 RC4640, RC4650, RC4700, 64-Bit Microprocessors 8210 microprocessor RC4640 RC4650 RC5000 RC64474 RC64475 RISCore4000
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