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Q15/A-1 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - M27C800

Abstract: PLCC44 Q15A FDIP42W
Text: systems requiring large data or program storage. It is organised as either 1 Mbit words of 8 bit or 512K , erasure is not required, the M27C800 is offered in both PLCC44 and SO44 packages. 44 42 1 1 FDIP42W (F) SO44 (M) PLCC44 (K) Logic Diagram VCC 19 Q15A­ 1 A0-A18 15 Q0-Q14 E , www.st.com 1 /3 M27C800 DIP Pin Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 SO Pin Connections 1 42 2 41 40 3 4 39 5 38 37 6 7 36


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PDF M27C800 512Kb 26sec. 0020h 00B2h M27C800 A0-A18 FDIP42W PLCC44 Q15A FDIP42W
M27C160

Abstract: PDIP42 Q15A
Text: systems requiring large data or program storage and is organised as either 2 Mbit words of 8 bit or 1 , required, the M27C160 is offered in PDIP42 and SO44. 44 42 1 1 FDIP42W (F) SO44 (M) 42 1 PDIP42 (B) Logic Diagram VCC 20 Q15A­ 1 A0-A19 15 Q0-Q14 E M27C160 G , 1 /2 M27C160 DIP Pin Connections Signal Names A0-A19 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 42 2 41 3 40 4 39 5 38 6 37 7 36 8


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PDF M27C160 x8/x16) 50sec. 0020h 00B1h M27C160 AI00740 AI01264 PDIP42 Q15A
1998 - M27C800

Abstract: M27V800 M27W800 Q15A
Text: CD-ROM or at www.st.com 44 42 1 1 FDIP42W (F) SO44 (M) Logic Diagram VCC 19 Q15A­ 1 A0-A18 15 Q0-Q14 E M27V800 G BYTEVPP VSS AI01851 1 /2 M27V800 DIP , Q1 Q9 Q2 Q10 Q3 Q11 1 42 2 41 3 40 4 39 5 38 6 37 7 36 35 8 9 34 10 33 , A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A- 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A­ 1 Data Output / Address Input


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PDF M27V800 110ns 26sec. M27C800 0020h 00B2h M27V800 M27W800 M27C800 M27W800 Q15A
1999 - M27C320

Abstract: Q15A
Text: s 44 1 SO44 (M) TSOP48 (N) 12 x 20 mm PROGRAMMING VOLTAGE: 12V ± 0.25V s , Code 0020h Figure 1 . Logic Diagram ­ Device Code: 0032h DESCRIPTION The M27C320 is a 32 Mbit , x 20mm) and SO44 packages. VCC 21 Q15A­ 1 A0-A20 15 Q0-Q14 E M27C320 Table 1 . Signal Names A0-A20 Address Inputs Q0-Q7 Data Outputs Q15A­ 1 Data Output , Complete data available on Data-on-Disc CD-ROM or at www.st.com VSS AI02152 1 /2 M27C320 Figure


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PDF M27C320 100mA TSOP48 0020h 0032h M27C320 AI02153 AI02154 Q15A
1998 - M27W320

Abstract: Q15A
Text: Mbit Mask ROM. The M27W320 is offered in TSOP48 (12 x 20mm) and SO44 packages. 44 1 SO44 (M) TSOP48 (N) 12 x 20 mm Logic Diagram VCC 21 Q15A­ 1 A0-A20 15 Q0-Q14 E M27W320 , www.st.com 1 /2 M27W320 SO Pin Connections NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS GV PP Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 Signal Names 44 1 2 43 3 42 4 41 5 40 6 39 7 , 19 25 20 24 21 22 23 A20 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS Q15A­ 1


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PDF M27W320 x8/x16) 100ns 120ns 100sec. 0020h 0032h M27W320 120ns Q15A
1998 - M27W160

Abstract: PDIP42 Q15A
Text: 1 1 FDIP42W (F) SO44 (M) 42 1 PDIP42 (B) Logic Diagram DESCRIPTION The , storage and is organised as either 2 Mbit words of 8 bit or 1 Mbit words of 16 bit. The pin-out is , available on DATA-on-DISC CD-ROM or at www.st.com VCC 20 Q15A­ 1 A0-A19 15 Q0-Q14 E M27W160 G BYTEVPP VSS AI02373 1 /2 M27W160 DIP Pin Connections Signal Names A0-A19 A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 42 2 41


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PDF M27W160 x8/x16) 100ns 120ns 50sec. 0020h 00B1h FDIP42W PDIP42 M27W160 PDIP42 Q15A
1996 - Not Available

Abstract: No abstract text available
Text: AROUND 50sec. (PRESTO III ALGORITHM) 44 42 1 1 FDIP42W (F) SO44 (M) DESCRIPTION The , Q15A­ 1 Q0-Q14 E G BYTEVPP M27C160 VSS AI00739B B27C160/608 Complete data available on DATA-on-DISC CD-ROM or at www.st.com 1 /2 M27C160 DIP Pin Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 42 1 41 2 40 3 39 4 38 5 37 6 36 7 35 8 34 9 33 10 M27C160 32 11 , A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A- 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC Address Inputs


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PDF M27C160 50sec. FDIP42W M27C160 AI01264 100ns 120ns Q15A-1
1996 - M27V160

Abstract: 32 megabit 16 bit
Text: PROGRAMMABLE as M27C160 with IDENTICAL SIGNATURE 44 42 1 1 FDIP42W (F) SO44 (M) DESCRIPTION , power supply. Logic Diagram VCC 20 A0-A19 15 Q15A­ 1 Q0-Q14 E G BYTEVPP M27V160 VSS AI01898 B27V160/609 Complete data available on DATA-on-DISC CD-ROM or at www.st.com 1 /2 M27V160 DIP Pin Connections A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 42 1 41 2 40 3 , 23 21 22 AI01899 Signal Names A0 - A19 A19 A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A- 1


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PDF M27V160 120ns 50sec. M27V160 M27C160 FDIP42W Q15A-1 120ns 32 megabit 16 bit
M27C800

Abstract: PDIP42 PLCC44 Q15A 23q9 AI01594
Text: : 0020h ­ Device Code: 00B2h 42 42 1 1 FDIP42W (F) PDIP42 (B) 44 1 DESCRIPTION , organised as either 1 Mwords of 8 bit or 512 Kwords of 16 bit. The pin-out is compatible with the most , , PLCC44 and SO44 packages. SO44 (M) PLCC44 (K) Logic Diagram VCC 19 Q15A­ 1 A0-A18 , DATA-on-DISC CD-ROM or at www.st.com 1 /3 M27C800 DIP Pin Connections NC A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTEVPP VSS Q15A­ 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC A5 A6 A7 A17 A18 VSS


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PDF M27C800 512Kb 0020h 00B2h FDIP42W PDIP42 M27C800 PDIP42 PLCC44 Q15A 23q9 AI01594
1998 - M27C320

Abstract: Q15A
Text: Device Code: 0032h 44 1 SO44 (M) TSOP48 (N) 12 x 20 mm Logic Diagram DESCRIPTION The , offered in TSOP48 (12 x 20mm) and SO44 packages. VCC 21 Q15A­ 1 A0-A20 15 Q0-Q14 E , at www.st.com 1 /2 M27C320 SO Pin Connections NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS GV PP Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 Signal Names 44 1 2 43 3 42 4 41 5 40 6 , Q15A­ 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC AI02153 A0-A20 Address Inputs Q0-Q7 Data


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PDF M27C320 x8/x16) 100sec. 0020h 0032h TSOP48 M27C320 AI02154 100ns Q15A
1998 - M27W800

Abstract: PDIP42 PLCC44 Q15A
Text: 1 1 FDIP42W (F) PDIP42 (B) 44 1 SO44 (M) PLCC44 (K) Logic Diagram , program storage. It is organised as either 1 Mbit words of 8 bit or 512 Kbit words of 16 bit. The , . B27W800/803 Complete data available on DATA-on-DISC CD-ROM or at www.st.com VCC 19 Q15A­ 1 A0-A18 15 Q0-Q14 E M27W800 G BYTEVPP VSS AI02367 1 /3 M27W800 DIP Pin , Connections 1 42 41 2 40 3 4 39 5 38 37 6 7 36 8 35 9 34 33 10 M27W800 11 32 12 31


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PDF M27W800 x8/x16) 100ns 120ns 26sec. 0020h 00B2h FDIP42W PDIP42 PLCC44 M27W800 PDIP42 PLCC44 Q15A
M27V800

Abstract: PDIP42 PLCC44 Q15A
Text: Manufacturer Code: 0020h ­ Device Code: 00B2h 42 42 1 1 FDIP42W (F) PDIP42 (B) 44 1 , program storage. It is organised as either 1 Mbit words of 8 bit or 512 Kbit words of 16 bit. The , Diagram VCC 19 Q15A­ 1 A0-A18 15 Q0-Q14 E M27V800 G BYTEVPP VSS AI01851 B27V800/809 Complete data available on DATA-on-DISC CD-ROM or at www.st.com 1 /3 M27V800 DIP Pin , Connections 42 1 41 2 40 3 39 4 38 5 37 6 36 7 35 8 34 9 33 10 M27V800 32 11 31 12


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PDF M27V800 512Kb 100ns 0020h 00B2h FDIP42W PDIP42 M27V800 AI02379 PDIP42 PLCC44 Q15A
1999 - M27V160

Abstract: PDIP42 Q15A
Text: 30mA at 8MHz 1 1 FDIP42W (F) SO44 (M) ­ Standby Current 20µA s PROGRAMMING VOLTAGE , or 1 Mbit words of 16 bit. The pin-out is compatible with a 16 Mbit Mask ROM. The M27V160 operates , reduction of the size of the battery or an increase in the time between battery recharges. 1 PDIP42 (B) Figure 1 . Logic Diagram VCC 20 Q15A­ 1 A0-A19 15 Table 1 . Signal Names Q0-Q14 A0-A19 Address Inputs E Q0-Q7 Data Outputs G Q8-Q14 Data Outputs Q15A­ 1


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PDF M27V160 100ns FDIP42W 0020h 00B1h M27V160 PDIP42 Q15A
presto

Abstract: M27C320 Q15A
Text: Manufacturer Code 0020h ­ Device Code: 0032h 44 1 SO44 (M) TSOP48 (N) 12 x 20 mm Logic Diagram , is offered in TSOP48 (12 x 20mm) and SO44 packages. VCC 21 Q15A­ 1 A0-A20 15 Q0-Q14 , CD-ROM or at www.st.com 1 /2 M27C320 SO Pin Connections NC A18 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS GV PP Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 Signal Names 44 1 2 43 3 42 4 41 5 , BYTE VSS Q15A­ 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC AI02153 A0-A20 Address Inputs Q0-Q7


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PDF M27C320 0020h 0032h TSOP48 M27C320 AI02154 100ns 120ns presto Q15A
M27C160

Abstract: No abstract text available
Text: programming procedure. 20 I Figure 1 . Logic Diagram vc c «·- 15 Q15A- 1 Table 1 . Signal Names A0-A19 Q 0 -Q 7 Q 8-Q14 Q15A- 1 Address Inputs Data Outputs Data Outputs Data Output / Address Input Chip Enable Output Enable Byte Mode / Program Supply Supply Voltage Ground A 0 -A 1 9 BYTEVpp Ë G - C - C -^ C M27C160 C ^ > Q 0 -Q 1 4 I G BYTEVpp Vcc Vss VSS VA00739B October 1993 This is an abbreviated version of the complete document. The full document is available separately. 1 /2 1173


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PDF M27C160 150ns 100pA 10sec. M27C160 Q15A-1 VA0074-0
2002 - M27C160

Abstract: PDIP42 PLCC44 Q15A SDIP42
Text: MASK ROM REPLACEMENT 1 s LOW POWER CONSUMPTION FDIP42W (F) 1 PDIP42 (B) ­ Active , TIME: 50µs/word s ELECTRONIC SIGNATURE 42 1 ­ Manufacturer Code: 20h SDIP42 (S) ­ , data or program storage and is organised as either 2 Mbit words of 8 bit or 1 Mbit words of 16 bit , M27C160 is offered in PDIP42, SDIP42, PLCC44 and SO44 packages. 44 1 PLCC44 (K) SO44 (M) Figure 1 . Logic Diagram VCC 20 Q15A­ 1 A0-A19 15 Q0-Q14 E M27C160 G BYTEVPP VSS


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PDF M27C160 FDIP42W PDIP42 SDIP42 M27C160 PDIP42 PLCC44 Q15A SDIP42
2001 - Not Available

Abstract: No abstract text available
Text: 1 1 FDIP42W (F) PDIP42 (B) s s s PROGRAMMING VOLTAGE: 12.5V ± 0.25V PROGRAMMING TIME: 50µs/word ELECTRONIC SIGNATURE ­ Manufacturer Code: 20h ­ Device Code: B1h PLCC44 (K) 1 44 SO44 (M , program storage. It is organised as either 2 Mbit words of 8 bit or 1 Mbit words of 16 bit. The pin-out is , PDIP42, PLCC44 and SO44 packages. Figure 1 . Logic Diagram VCC 20 A0-A19 15 Q15A­ 1 Q0-Q14 E G BYTEVPP M27V160 VSS AI01898 April 2001 1 /16 M27V160 Figure 2A. DIP Connections


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PDF M27V160 100ns FDIP42W PDIP42 PLCC44 M27V160
1998 - M27C160

Abstract: M27V160 M27W160 Q15A
Text: ALGORITHM) 1 1 FDIP42W (F) SO44 (M) ELECTRONIC SIGNATURE as M27C160 ­ Manufacturer Code , written rapidly to the device by following the programming procedure. VCC 20 Q15A­ 1 A0-A19 , Complete data available on DATA-on-DISC CD-ROM or at www.st.com 1 /2 M27V160 DIP Pin Connections , Q11 1 42 2 41 3 40 4 39 5 38 6 37 7 36 35 8 9 34 10 33 M27V160 32 11 31 12 , A13 A14 A15 A16 BYTEVPP VSS Q15A- 1 Q7 Q14 Q6 Q13 Q5 Q12 Q4 VCC AI01899 Address


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PDF M27V160 110ns 50sec. FDIP42W M27C160 0020h 00B1h M27V160 M27W160 M27C160 M27W160 Q15A
1999 - PDIP42

Abstract: M27C160 PLCC44 Q15A AI00740
Text: s 42 16 Mbit MASK ROM REPLACEMENT s 42 LOW POWER CONSUMPTION 1 ­ Active Current 70mA at 8MHz 1 FDIP42W (F) PDIP42 (B) ­ Standby Current 100µA s PROGRAMMING VOLTAGE , systems requiring large data or program storage and is organised as either 2 Mbit words of 8 bit or 1 , required, the M27C160 is offered in PDIP42, PLCC44 and SO44 packages. 1 PLCC44 (K) SO44 (M) Figure 1 . Logic Diagram VCC 20 Q15A­ 1 A0-A19 15 Q0-Q14 E M27C160 G BYTEVPP


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PDF M27C160 FDIP42W PDIP42 0020h 00B1h M27C160 PLCC44 PDIP42 PLCC44 Q15A AI00740
1999 - M27V800

Abstract: PDIP42 PLCC44 Q15A
Text: CONFIGURABLE s 8 Mbit MASK ROM REPLACEMENT s LOW POWER CONSUMPTION 42 42 1 1 FDIP42W , for microprocessor systems requiring large data or program storage. It is organised as either 1 Mbit words of 8 bit or 512 Kbit words of 16 bit. The pinout is compatible with a 8 Mbit Mask ROM. 44 1 SO44 (M) PLCC44 (K) Figure 1 . Logic Diagram VCC 19 Table 1 . Signal Names A0-A18 Q15A­ 1 A0-A18 15 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A­ 1 Data


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PDF M27V800 512Kb 100ns FDIP42W PDIP42 0020h 00B2h M27V800 PDIP42, PDIP42 PLCC44 Q15A
Not Available

Abstract: No abstract text available
Text: SGS-THOMSON raD»HlLll(e'inM)l)ì!lD(ei M 27C800 8 Megabit ( 1 Meg x 8 or 512K x 16) UV , ■PROGRAMMING VOLTAGE 12.5V ± 0.3V 1 FDIP42W (F) S 044 (M) > PROGRAMMING TIME of , . PLCC44 (K) Figure 1 . Logic Diagram For applications where the content is programmed only one time , Plastic Chip Carrier packages. V cc 19 Table 1 . Signal Names A0-A18 * - ► Q15A- 1 A0-A18 15 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A- 1 Data


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PDF 27C800 10OjoA FDIP42W 26sec. M27C800 M27C800 PLCC44 PLCC44
2000 - Q15A

Abstract: PDIP40 M27C400
Text: 100µA s FDIP40W (F) PDIP40 (B) PROGRAMMING TIME: 50µs/word s 1 1 PROGRAMMING , M27C400 is offered in PDIP40 package. Figure 1 . Logic Diagram VCC 18 Q15A­ 1 A0-A17 15 Q0-Q14 E M27C400 G BYTEVPP VSS AI01634 September 2000 1 /14 M27C400 Figure 2. DIP Connections Table 1 . Signal Names A0-A17 A17 A7 A6 A5 A4 A3 A2 A1 A0 E VSS G Q0 Q8 Q1 Q9 Q2 Q10 Q3 Q11 1 40 2 39 3 38 4 37 5 36 6 35 7 34 33 8 32 9 31 10 M27C400


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PDF M27C400 512Kb 256Kb FDIP40W PDIP40 M27C400 Q15A PDIP40
M27C800

Abstract: PLCC44
Text: -THOMSON ItLiCêïTGMOtêS M27C800 8 Megabit ( 1 Meg x 8 or 512K x 16) UV EPROM and OTP EPROM , microprocessor systems requiring large data or program storage. It is organised as either 1 Meg words of 8 bit or , packages. Table 1 . Signal Names A0-A18 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A- 1 , Supply Voltage Vss Ground FDIP42W (F) S044 (M) PLCC44 (K) Figure 1 . Logic Diagram A0-A18 Ê G 19 BYTEVpp Vcc _L M27C800 «-Q15A- 1 15 Q0-Q14 vss April 1997 1 /15 This Material Copyrighted By


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PDF M27C800 26sec. M27C800 PLCC44 PLCC44
M27C160

Abstract: ZJA16
Text: SGS-THOMSON M27C160 16 Megabit (2Meg x 8 or 1 Meg x 16) UV EPROM and OTP ROM ■FAST ACCESS , either 2 Meg words of 8 bit or 1 Meg words of 16 bit. The pin-out is compatible with a 16 Megabit Mask , package. Table 1 . Signal Names FDIP42W (F) S044 (M) Figure 1 . Logic Diagram A0-A19 Address Inputs Q0- Q7 Data Outputs Q8- Q14 Data Outputs Q15A- 1 Data Output / Address Input Ê Chip Enable G Output , ‹ G 20 BYTEVpp M27C160 «-p- Q15A- 1 15 (¡^>Q0-Q14 vss ai00739b 1 /13 T^^B? OObflMÖÖ 471


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PDF M27C160 100ns 50sec. FDIP42W M27C160 7T2T237 00bfl4cn ZJA16
1997 - M27C800

Abstract: PLCC44 Q15A
Text: offered in both 44 pin Plastic Small Outline and 44 pin Plastic Chip Carrier packages. 44 42 1 1 FDIP42W (F) SO44 (M) PLCC44 (K) Figure 1 . Logic Diagram VCC 19 Table 1 . Signal Names A0-A18 Q15A­ 1 A0-A18 15 Address Inputs Q0-Q7 Data Outputs Q8-Q14 Data Outputs Q15A­ 1 Data Output / Address Input E Output Enable BYTEVPP Byte Mode , April 1997 G BYTEVPP VSS AI01593 1 /15 M27C800 Figure 2A. DIP Pin Connections A18 A17


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PDF M27C800 26sec. M27C800 PLCC44 Q15A
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