The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
PIC16C56AT-40/SS Microchip Technology Inc 8-BIT, OTPROM, 40 MHz, RISC MICROCONTROLLER, PDSO20, 0.209 INCH, PLASTIC, MO-150, SSOP-20
PIC16C56AT-04I/SO024 Microchip Technology Inc 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, MS-013, SO-18
PIC16C56AT-04I/SO017 Microchip Technology Inc 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, MS-013, SO-18
PIC16C56AT-04/SO027 Microchip Technology Inc 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, MS-013, SO-18
PIC16C56AT-04E/SO Microchip Technology Inc 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, MS-013, SO-18
PIC16C56AT-04I/SO030 Microchip Technology Inc 8-BIT, OTPROM, 4 MHz, RISC MICROCONTROLLER, PDSO18, 0.300 INCH, PLASTIC, MS-013, SO-18

PIC16C56AT-10E/SS datasheet (1)

Part ECAD Model Manufacturer Description Type PDF
PIC16C56AT-10E/SS PIC16C56AT-10E/SS ECAD Model Microchip Technology ROM-Based 8-Bit CMOS Microcontroller Series Original PDF

PIC16C56AT-10E/SS Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
Not Available

Abstract: No abstract text available
Text: *10*4mm) AP. 10E SPE-12-8-003/B/ SS | page 10 of 12 OD.081.CM 0.81 Coaxial Cable FEP 3 IPEX , AP.10E.07.0039B Specification Part No. AP.10E.07.0039B Product Name AP. 10E - 1 Stage , performance Ultra low power consumption RoHS Compliant SPE-12-8-003/B/ SS | page 1 of 12 1. Introduction AP. 10E active GPS patch antenna is the smallest GPS high performance antenna currently , versions are available. The AP. 10E consists of 2 functional blocks – the LNA and also the patch


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PDF 0039B SPE-12-8-003/B/SS 42MHz
Not Available

Abstract: No abstract text available
Text: -12-8-003/B/ SS | page 8 of 12 7. Technical Drawing Top AP. 10E B Side Bottom "A" NOTE: 1 , AP.10E.07.0039B Specification Part No. AP.10E.07.0039B Product Name AP. 10E - 1 , High performance Ultra low power consumption RoHS Compliant SPE-12-8-003/B/ SS | page 1 of 12 1. Introduction AP. 10E active GPS patch antenna is the smallest GPS high performance antenna , cable versions are available. The AP. 10E consists of 2 functional blocks – the LNA and also the


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PDF 0039B SPE-12-8-003/B/SS 42MHz
1999 - MT9LSDT1672G-133B1

Abstract: PC133 registered reference design
Text: MHz/CL = 3 (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) MARKING G -13E -133 - 10E , PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E -75 -8E CAS LATENCY 2 3 2 ACCESS TIME 5.4ns 5.4ns , 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN SYMBOL 43 V SS 44 DNU 45 S2


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PDF 168-pin, PC133- PC100-compliant 128MB PC133/PC100 MT9LSDT1672G-133B1 PC133 registered reference design
1999 - MT9LSDT1672G-133B1

Abstract: 168-PIN MT9LSDT1672 MT9LSDT872 ZM28 C5 marking code PC133 registered reference design
Text: (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) -13E -133 - 10E *Device latency only , MARKING SPEED GRADE CAS LATENCY ACCESS TIME SETUP TIME HOLD TIME -13E -133 - 10E , 72 PC133/PC100 Registered SDRAM DIMMs ZM28_3.p65 ­ Rev. 4/00 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN


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PDF MT9LSDT872, MT9LSDT1672 168-PIN 168-pin, PC133- PC100-compliant 128MB PC133/PC100 MT9LSDT1672G-133B1 MT9LSDT1672 MT9LSDT872 ZM28 C5 marking code PC133 registered reference design
2000 - 8MB SDRAM

Abstract: PC133 registered reference design
Text: (8ns, 125 MHz SDRAMs) - 10E KEY SDRAM COMPONENT TIMING PARAMETERS MODULE SPEED MARKING GRADE -13E -133 - 10E -7E -75 -8E CAS ACCESS LATENCY TIME 2 3 2 5.4ns 5.4ns 6ns SETUP TIME 1.5ns 1.5ns 2ns HOLD , 64 133 MHz, CL = 2 MT4LSDT864HG-133_ 8 Meg x 64 133 MHz, CL = 3 MT4LSDT864HG- 10E _ 8 Meg x 64 100 , , CL = 3 MT4LSDT864LHG- 10E _ 8 Meg x 64* 100 MHz, CL = 2 NOTE: All part numbers end with a two-place , , tRRD ENTRY (VERSION) 128 256 SDRAM 12 9 1 64 0 LVTTL 7 (-13E) 7.5 (-133) 8 (- 10E ) 5.4 (-13E/-133) 6


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PDF PC100, 144-pin, 096-cycle MT4LSDT864 MT8VR12818AG 512MB MT16VR25616AG MT16VR25618AG MT16VR25618AG-840A1 8MB SDRAM PC133 registered reference design
2000 - PC133 registered reference design

Abstract: MT16LSDF3264HG-133
Text: G -133 - 10E KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING -133 - 10E SPEED GRADE -75 -8E , PARTNUMBER MT16LSDF3264HG-133_ MT16LSDF3264HG- 10E _ CONFIGURATION 32Meg x 64 32 Meg x 64 VERSION 133 MHz, CL , LVTTL 7.5 (-133) 8 (- 10E ) 5.4 (-133) 6 (- 10E ) NONPARITY 15.6µs/SELF 8 NONE 1 1, 2, 4, 8, PAGE 4 2, 3 0 0 UNBUFFERED 0E 10 6 - - 20 15 (-133) 20 (- 10E ) 20 44 (-133) 50 (- 10E ) 128MB 1.5 (-133) 2 (- 10E ) 0.8 (-133) 1 (- 10E ) 1.5 (-133) 2 (- 10E ) MT16LSDF3264HG (Hex) 80 08 04 0C 0A 02 40 00 01 75 80 54 60 00 80 08 00 01 8F


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PDF PC100 PC133, 144-pin, 256MB 096-cycle MT16LSDF3264HG MT8VR12818AG 512MB MT16VR25616AG PC133 registered reference design MT16LSDF3264HG-133
1999 - D8560

Abstract: D-85609
Text: MHz SDRAMs) 100 MHz/CL = 3 (8ns, 125 MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) - 10E -10C -662 · Module Height 1.15" (32MB, 66 MHz, SS *) -662_1 1.00" (32MB, 66 MHz, DS*) -662_2 1.05" (64MB , *) -10_3* * SS = Single Sided, DS = Double Sided. * Adheres to PC100 SODIMM rev. 1.0 specification , , 16 MEG x 64 SDRAM SODIMMs KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING - 10E -10C -662 SPEED , PART NUMBERS PART NUMBER MT4LSDT464HG- 10E _ MT4LSDT464HG-10C_ MT4LSDT464HG-662_ MT4LSDT464LHG- 10E


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PDF 144-pin, 128MB 096-cycle -750A1 -745A1 -850A1 -845A1 -840A1 D8560 D-85609
1999 - Not Available

Abstract: No abstract text available
Text: ) 100 MHz/CL = 2 (8ns, 125 MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) -13E -133 - 10E -662 , - 10E -662 -7E -75 -8E -10 2 3 2 2 5.4ns 5.4ns 6ns 9ns SETUP TIME 1.5ns 1.5ns 2ns 2ns HOLD TIME 0.8ns , -133_ MT8LSDT864HG- 10E _ MT8LSDT864HG-662_ MT8LSDT864LHG-13E_ MT8LSDT864LHG-133_ MT8LSDT864LHG- 10E _ MT8LSDT864LHG , (VERSION) 128 256 SDRAM 12 8 (-13E/-133/- 10E ) 9 (-662) 2 (-13E/-133/- 10E ) 1 (-662) 64 0 LVTTL 7 (-13E) 7.5 (-133) 8 (- 10E ) 10 (-662) 5.4 (-13E/-133) 6 (- 10E ) 7.5 (-662) NONPARITY 15.6µs/SELF 16 (-13E/-133/- 10E


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PDF PC100, 144-pin, 096-cycle MT8LSDT864 128MB MT4VR6418AG 256MB MT8VR12816AG MT8VR12818AG
2000 - MT8LSDT1664HG-10EB1

Abstract: SO-DIMM 144-pin
Text: ) 100 MHz/CL = 2 (8ns, 125 MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) -13E -133 - 10E -662 , - 10E -662 -7E -75 -8E -10 2 3 2 2 5.4ns 5.4ns 6ns 9ns SETUP TIME 1.5ns 1.5ns 2ns 2ns HOLD TIME 0.8ns , x 64 133 MHz, CL = 2 MT8LSDT1664HG-133_ 16 Meg x 64 133 MHz, CL = 3 MT8LSDT1664HG- 10E _ 16 Meg x 64 , MHz, CL = 2 MT8LSDT1664LHG-133_ 16 Meg x 64* 133 MHz, CL = 3 MT8LSDT1664LHG- 10E _ 16 Meg x 64* 100 , (CAS LATENCY = 3) (Notes: 1) ENTRY (VERSION) 128 256 SDRAM 12 9 (-13E/-133/- 10E ) 10 (-662) 2 (-13E


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PDF PC100, 144pin, 128MB 096-cycle MT8LSDT1664 MT4VR6418AG 256MB MT8VR12816AG MT8LSDT1664HG-10EB1 SO-DIMM 144-pin
2000 - dram 72-pin simm 128mb

Abstract: PC133 registered reference design type 760 t85
Text: MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) -13E -133 - 10E -662 KEY SDRAM COMPONENT TIMING PARAMETERS MODULE SPEED MARKING GRADE -13E -133 - 10E -662 -7E -75 -8E -10 CAS ACCESS LATENCY TIME 2 3 2 2 , 125 CK1 42 CK0 84 VDD 126 RFU *128MB version only *-133/- 10E versions only PIN SYMBOL 127 VSS 128 , PART NUMBERS PART NUMBER MT8LSDT864AG-13E_ MT8LSDT864AG-133_ MT8LSDT864AG- 10E _ MT8LSDT864AG-662_ MT16LSDT1664AG-13E_ MT16LSDT1664AG-133_ MT16LSDT1664AG- 10E _ MT16LSDT1664AG-662_ MT8LSDT864AI-133_ MT8LSDT864AI- 10E


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PDF PC66-, PC100- PC133-compliant 168-pin, 128MB 096-cycle MT4VR6418AG 256MB MT8VR12816AG dram 72-pin simm 128mb PC133 registered reference design type 760 t85
2000 - Not Available

Abstract: No abstract text available
Text: - 10E -662* KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING -13E -133 - 10E -662 SPEED GRADE -7E , A10 80 39 BA1 81 40 VDD 82 41 VDD 83 42 CK0 84 *-133/- 10E version only NOTE: SYMBOL VSS DNU S2 , CONFIGURATION SYSTEM BUS SPEED MT4LSDT464AG-13E_ MT4LSDT464AG-133_ MT4LSDT464AG- 10E _ MT4LSDT464AG-662_ MT4LSDT864AG-13E_ MT4LSDT864AG-133_ MT4LSDT864AG- 10E _ MT4LSDT1664AG-13E_ MT4LSDT1664AG-133_ MT4LSDT1664AG- 10E , Protect: Serial presence-detect hardware write protect. Applies to -13E/-133/- 10E versions only. Serial


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PDF PC66-* PC100- PC133-compliant 168-pin, 128MB 096-cycle -750A1 -745A1 -850A1 -845A1
1999 - PC133 registered reference design

Abstract: No abstract text available
Text: , 125 MHz SDRAM) MARKING G -13E -133 - 10E *Device latency only; extra clock cycle required due to input register. KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E , 34 35 36 37 38 39 40 41 42 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN SYMBOL 43 V SS 44 DNU 45 S2# 46 DQMB2 47 DQMB3 48 DNU 49 V DD 50 NC 51 NC 52 CB2


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PDF 168-pin, PC133- PC100-compliant 128MB 256MB 512MB MT8VR12818AG MT16VR25616AG PC133 registered reference design
2000 - PC133 registered reference design

Abstract: 10EB2
Text: - 10E -662* KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING -13E -133 - 10E -662 SPEED GRADE -7E , A10 80 39 BA1 81 40 VDD 82 41 VDD 83 42 CK0 84 *-133/- 10E version only NOTE: SYMBOL VSS DNU S2 , CONFIGURATION SYSTEM BUS SPEED MT4LSDT464AG-13E_ MT4LSDT464AG-133_ MT4LSDT464AG- 10E _ MT4LSDT464AG-662_ MT4LSDT864AG-13E_ MT4LSDT864AG-133_ MT4LSDT864AG- 10E _ MT4LSDT1664AG-13E_ MT4LSDT1664AG-133_ MT4LSDT1664AG- 10E , Protect: Serial presence-detect hardware write protect. Applies to -13E/-133/- 10E versions only. Serial


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PDF PC66-* PC100- PC133-compliant 168-pin, 128MB 096-cycle MT16VR25616AG 512MB MT16VR25618AG MT16VR25618AG-840A1 PC133 registered reference design 10EB2
2001 - 0118-B

Abstract: MT8L PC133 registered reference design 10EF1 2Q01
Text: Latency 133 MHz/CL = 2 133 MHz/CL = 3 100 MHz/CL = 2 MARKING A G -13E -133 - 10E DEVICE TIMING Module Markings -13E -133 - 10E PC100 CL - tRCD - tRP 2-2-2 2-2-2 2-2-2 PC133 CL - tRCD - tRP 2-2-2 3-3-3 , MHz MT8LSDT1664AG-133_ 16 Meg x 64 133 MHz MT8LSDT1664AG- 10E _ 16 Meg x 64 100 MHz MT16LSDT3264AG-13E_ 32 Meg x 64 133 MHz MT16LSDT3264AG-133_ 32 Meg x 64 133 MHz MT16LSDT3264AG- 10E _ 32 Meg x 64 100 MHz , - 10E CAS LATENCY = 2 133 100 100 CAS LATENCY = 3 143 133 125 READ NOP tLZ NOP tOH DOUT


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PDF 128MB 256MB 168-PIN PC100- PC133-compliant 168-pin, 128MB 096-cycle Pres18 0118-B MT8L PC133 registered reference design 10EF1 2Q01
1999 - PC133 registered reference design

Abstract: MT18LSDT3272G-13E MT18LSDT1672
Text: , 125 MHz SDRAM) MARKING G -13E -133 - 10E *Device latency only; extra clock cycle required due to input register. KEY SDRAM COMPONENT TIMING PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E , 34 35 36 37 38 39 40 41 42 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN SYMBOL 43 V SS 44 DNU 45 S2# 46 DQMB2 47 DQMB3 48 DNU 49 V DD 50 NC 51 NC 52 CB2


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PDF 168-pin, PC133- PC100-compliant 128MB 256MB 512MB PC133/PC100 PC133 registered reference design MT18LSDT3272G-13E MT18LSDT1672
2000 - MT8LSDT1664HG-10EB1

Abstract: PC133 registered reference design
Text: ) 100 MHz/CL = 2 (8ns, 125 MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) -13E -133 - 10E -662 , - 10E -662 -7E -75 -8E -10 2 3 2 2 5.4ns 5.4ns 6ns 9ns SETUP TIME 1.5ns 1.5ns 2ns 2ns HOLD TIME 0.8ns , x 64 133 MHz, CL = 2 MT8LSDT1664HG-133_ 16 Meg x 64 133 MHz, CL = 3 MT8LSDT1664HG- 10E _ 16 Meg x 64 , MHz, CL = 2 MT8LSDT1664LHG-133_ 16 Meg x 64* 133 MHz, CL = 3 MT8LSDT1664LHG- 10E _ 16 Meg x 64* 100 , (CAS LATENCY = 3) (Notes: 1) ENTRY (VERSION) 128 256 SDRAM 12 9 (-13E/-133/- 10E ) 10 (-662) 2 (-13E


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PDF PC100, 144pin, 128MB 096-cycle MT8LSDT1664 MT8VR12818AG 512MB MT16VR25616AG MT16VR25618AG MT8LSDT1664HG-10EB1 PC133 registered reference design
1999 - 0118-B

Abstract: MT8LSDT3264HG PC133 registered reference design 1700B DDR DIMM pinout micron
Text: MHz/CL = 3 (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) MARKING G -13E -133 - 10E , PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E -75 -8E CAS LATENCY 2 3 2 ACCESS TIME 5.4ns 5.4ns , 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN SYMBOL 43 V SS 44 DNU 45 S2


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PDF 168-pin, PC133- PC100-compliant 128MB MT8VR12818AG 512MB MT16VR25616AG MT16VR25618AG MT16VR25618AG-840A1 0118-B MT8LSDT3264HG PC133 registered reference design 1700B DDR DIMM pinout micron
2000 - PC133 registered reference design

Abstract: No abstract text available
Text: - 10E -662* KEY SDRAM COMPONENT TIMING PARAMETERS MODULE SPEED CAS ACCESS MARKING GRADE LATENCY TIME -13E -133 - 10E -662 -7E -75 -8E -10 2 3 2 2 5.4ns 5.4ns 6ns 9ns SETUP TIMES 1.5ns 1.5ns 2ns 3ns HOLD , /WP* 40 VDD 82 SDA 41 VDD 83 SCL 42 CK0 84 VDD *-13E/-133/- 10E version only PIN 85 86 87 88 89 90 , MT5LSDT472AG-13E_ MT5LSDT472AG-133_ MT5LSDT472AG- 10E _ MT5LSDT472AG-662_ MT5LSDT872AG-13E_ MT5LSDT872AG-133_ MT5LSDT872AG- 10E _ MT5LSDT1672AG-13E_ MT5LSDT1672AG-133_ MT5LSDT1672AG- 10E 4 Meg x 72 4 Meg x 72 4 Meg x 72 4


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PDF PC66-* PC100- PC133-compliant 168-pin, 128MB 096-cycle MT8VR12818AG 512MB MT16VR25616AG PC133 registered reference design
2001 - PC133 registered reference design

Abstract: 16 MB Micron EDO SIMM Module mt1l DS1849 10EF1 10EB2
Text: - 10E DEVICE TIMING Module Markings -13E -133 - 10E PC100 CL - tRCD - tRP 2-2-2 2-2-2 2-2-2 PC133 CL , CONFIGURATION MT36LSDF6472G-13E_ 64 Meg x 72 MT36LSDF6472G-133_ 64 Meg x 72 MT36LSDF6472G- 10E _ 64 Meg x 72 MT36LSDF12872G-13E_ 128 Meg x 72 MT36LSDF12872G-133_ 128 Meg x 72 MT36LSDF12872G- 10E _ 128 Meg x 72 SYSTEM BUS , Latency = 2 -13E -133 - 10E *Input register will add one extra clock. T0 CLK COMMAND T1 T2 , REFRESH CURRENT: CKE 0.2V tRFC tRFC MAX SYMBOL -13E -133 - 10E UNITS NOTES IDD1 IDD2 IDD3 2916 2736


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PDF 512MB 168-PIN 168-pin, PC100 PC133 512MB MT8VR12818AG MT16VR25616AG PC133 registered reference design 16 MB Micron EDO SIMM Module mt1l DS1849 10EF1 10EB2
2000 - MT4LSDT464HG-10EB3

Abstract: No abstract text available
Text: - 10E -662 · Module Height (based on part number extension) 1.15" (66 MHz) -662_1 1.00" (66 MHz , PARAMETERS MODULE MARKING -13E -133 - 10E -662 SPEED GRADE -7E -75 -8E -10 CAS ACCESS LATENCY TIME 2 3 2 2 , NUMBER MT4LSDT464HG-13E_ MT4LSDT464HG-133_ MT4LSDT464HG- 10E _ MT4LSDT464HG-662_ MT4LSDT464LHG-13E_ MT4LSDT464LHG-133_ MT4LSDT464LHG- 10E _ MT4LSDT464LHG-662_ CONFIGURATION 16 Meg x 64 16 Meg x 64 16 Meg x 64 16 , SDRAM 12 8 1 64 0 LVTTL 7 (-13E) 7.5 (-133) 8 (- 10E ) 10 (-662) 5.4 (-13E/-133) 6 (- 10E ) 7.5 (-662


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PDF PC100 144-pin, 096-cycle MT4LSDT464 128MB MT4VR6418AG 256MB MT8VR12816AG MT8VR12818AG MT4LSDT464HG-10EB3
2000 - MT16LD464AG

Abstract: No abstract text available
Text: MHz SDRAMs) 66 MHz/CL = 2 (10ns, 100 MHz SDRAMs) -13E -133 - 10E -662 KEY SDRAM COMPONENT TIMING PARAMETERS MODULE SPEED MARKING GRADE -13E -133 - 10E -662 -7E -75 -8E -10 CAS ACCESS LATENCY TIME 2 3 2 2 , 125 CK1 42 CK0 84 VDD 126 RFU *128MB version only *-133/- 10E versions only PIN SYMBOL 127 VSS 128 , PART NUMBERS PART NUMBER MT8LSDT864AG-13E_ MT8LSDT864AG-133_ MT8LSDT864AG- 10E _ MT8LSDT864AG-662_ MT16LSDT1664AG-13E_ MT16LSDT1664AG-133_ MT16LSDT1664AG- 10E _ MT16LSDT1664AG-662_ MT8LSDT864AI-133_ MT8LSDT864AI- 10E


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PDF PC66-, PC100- PC133-compliant 168-pin, 128MB 096-cycle -750A1 -745A1 -850A1 -845A1 MT16LD464AG
2000 - PC133 registered reference design

Abstract: MT9V
Text: MHz/CL = 3 (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) MARKING G -13E -133 - 10E , PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E -75 -8E CAS ACCESS LATENCY TIME 2 3 2 5.4ns 5.4ns , 72 133 MHz MT18LSDT3272DG-133_ 32 Meg x 72 133 MHz MT18LSDT3272DG- 10E _ 32 Meg x 72 100 MHz MT18LSDT6472DG-13E_ 64 Meg x 72 133 MHz MT18LSDT6472DG-133_ 64 Meg x 72 133 MHz MT18LSDT6472DG- 10E _ 64 Meg x , , tRAS ENTRY (VERSION) 128 256 SDRAM 13 (512MB) 12 (256MB) 10 2 72 0 LVTTL 7 (-13E) 7.5 (-133) 8 (- 10E


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PDF 168-pin, PC133- PC100-compliant 256MB 512MB 64m18 MT8VR12818AG MT16VR25616AG PC133 registered reference design MT9V
1999 - PC133 registered reference design

Abstract: No abstract text available
Text: MHz/CL = 3 (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) MARKING G -13E -133 - 10E , PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E -75 -8E CAS LATENCY 2 3 2 ACCESS TIME 5.4ns 5.4ns , 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 SYMBOL V SS DQ0 DQ1 DQ2 DQ3 V DD DQ4 DQ5 DQ6 DQ7 DQ8 V SS DQ9 DQ10 DQ11 DQ12 DQ13 V DD DQ14 DQ15 CB0 CB1 V SS NC NC V DD WE# DQMB0 DQMB1 S0# DNU V SS A0 A2 A4 A6 A8 A10 BA1 V DD V DD CK0 PIN SYMBOL 43 V SS 44 DNU 45 S2


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PDF 168-pin, PC133- PC100-compliant 128MB MT8VR12818AG 512MB MT16VR25616AG MT16VR25618AG MT16VR25618AG-840A1 PC133 registered reference design
10ETF

Abstract: 10ETF06S AN-994 SMD-220
Text: uction Angle 4 10ET . SS F eries TJ= 150°C 2 0 0 2 4 6 8 10 Average , 10E F S T .S eries 40 0.01 100 0.1 1 Pulse T rain Duration (s) Number Of Equal , Non-Repetitive Surge Current Instantaneous Forward Current (A) 100 10 TJ= 25°C TJ= 150°C 10E F S , 10E F.S S T eries TJ= 25 °C 0 0 40 80 120 160 200 Rate Of Fall Of Forward , 20 A 0.2 10 A 5A 0.1 2A 10ET . SS F eries TJ= 150 °C 1A 0 0 40 80


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PDF I2204 10ETF06SPbF 10ETF06SPbF O-220AC) 10ETF 10ETF06S AN-994 SMD-220
2000 - PC133 registered reference design

Abstract: No abstract text available
Text: MHz/CL = 3 (7.5ns, 133 MHz SDRAMs) 100 MHz/CL = 2 (8ns, 125 MHz SDRAM) MARKING G -13E -133 - 10E , PARAMETERS MODULE MARKING -13E -133 - 10E SPEED GRADE -7E -75 -8E CAS ACCESS LATENCY TIME 2 3 2 5.4ns 5.4ns , 72 133 MHz MT18LSDT3272DG-133_ 32 Meg x 72 133 MHz MT18LSDT3272DG- 10E _ 32 Meg x 72 100 MHz MT18LSDT6472DG-13E_ 64 Meg x 72 133 MHz MT18LSDT6472DG-133_ 64 Meg x 72 133 MHz MT18LSDT6472DG- 10E _ 64 Meg x , ) 10 2 72 0 LVTTL 7 (-13E) 7.5 (-133) 8 (- 10E ) 5.4 (-13E/-133) 6 (- 10E ) ECC 15.6µs/SELF 8 8 1 1, 2, 4


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PDF 168-pin, PC133- PC100-compliant 256MB 512MB 64m18 MT8VR12818AG MT16VR25616AG PC133 registered reference design
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