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1997 - HP3070

Abstract: PALCE22V10 mach231
Text: MACH 1 & 2 FAMILIES 1 FINAL COM'L: -6/7/10/12/15 IND: -12/14/18 High-Performance EE CMOS Programmable Logic DISTINCTIVE CHARACTERISTICS x 84 Pins in PLCC x 128 Macrocells x 6 ns tPD Commercial; 12 ns tPD Industrial x 133 MHz fCNT x 64 I/Os; 4 dedicated inputs/clocks; 2 dedicated inputs x 128 Flip-flops; 4 clock choices x x x x x x 8 " PALCE32V16 " blocks with buried macrocells , independent " PALCE32V16 " with 8 buried macrocells. In addition to the logic product terms, two output enable


Original
PDF PALCE32V16" MACH131 M4-128N MACH231 16-038-SQ MACH231-6/7/10/12/15 HP3070 PALCE22V10
1997 - HP3070

Abstract: PALCE22V10 MACHpro MACH231SP MACH programming
Text: /clocks; 2 dedicated inputs 128 Flip-flops; 4 clock choices 8 " PALCE32V16 " blocks with buried macrocells , with 32 inputs. This makes the PAL block look effectively like an independent " PALCE32V16 " with 8


Original
PDF MACH231SP-10/12/15 10-ns 12-ns PALCE32V16" MACH131SP M4-128 PQL100 100-Pin 16-038-PQT-2 HP3070 PALCE22V10 MACHpro MACH231SP MACH programming
Not Available

Abstract: No abstract text available
Text: FINAL COM'L: -6/7 /10/12/15 IN D :-12/14/18 M A C H 2 3 1 -6 /7 /1 0 /1 2 /1 5 V A N A N A M D T I S High-Performance EE CMOS Programmable Logic C O M P A N Y DISTINCTIVE CHARACTERISTICS ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ ♦ 84 Pins in PLCC 128 Macrocells 6 ns t P Commercial; 12 ns t P Industrial D D 133 MHz fC T N 64 l/Os; 4 dedicated inputs/clocks; 2 dedicated inputs 128 Flip-flops; 4 clock choices 8 " PALCE32V16 " blocks with buried


OCR Scan
PDF PALCE32V16" MACH131 M4-128N GENE4088 ACH231 84-Pin
Not Available

Abstract: No abstract text available
Text: ; 2 dedicated inputs 128 Flip-flops; 4 clock choices 8 " PALCE32V16 " blocks with buried macrocells


OCR Scan
PDF 10-ns 12-ns PALCE32V16" 16-038-PQ PQL100 ACH231SP-10/12/15
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