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ADS1000A1IDBVR ADS1000A1IDBVR ECAD Model Texas Instruments 12-Bit, 128SPS, 1-Ch Delta-Sigma ADC w/ PGA, Oscillator & I2C 6-SOT-23 -40 to 125
SN74AS1000ANSR SN74AS1000ANSR ECAD Model Texas Instruments Quadruple 2-Input Positive-NAND Buffers/Drivers 14-SO 0 to 70
ADS1000A1IDBVTG4 ADS1000A1IDBVTG4 ECAD Model Texas Instruments 12-Bit, 128SPS, 1-Ch Delta-Sigma ADC w/ PGA, Oscillator & I2C 6-SOT-23 -40 to 125
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P51-1000-A-G-P-4.5V-000-000 datasheet (1)

Part ECAD Model Manufacturer Description Type PDF
P51-1000-A-G-P-4.5V-000-000 P51-1000-A-G-P-4.5V-000-000 ECAD Model SSI Technologies Pressure Sensors, Transducers, Sensors, Transducers, SENSOR 1000PSI 1/8-27NPT .5-4.5V Original PDF

P51-1000-A-G-P-4.5V-000-000 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1997 - logitech mouse controller chipset

Abstract: colour tv yoke Logitech Dual Action Gamepad RS-232 trackball LOGITECH PS/2 MOUSE 6 pin logitech gamepad USB logitech optical mouse IR SENSOR wheel mouse LOGITECH PS/2 MOUSE KEYTRONIC
Text: . 13 3.1.1 Uniprocessor AGP Motherboard . 13 3.1.2 Dual Processor AGP Motherboard , , multiprocessor, kits, kiosks, UPS, & NLX. Deleted non-requirements such as backpanel layout. Focus on AGP , -bit Accelerated Graphics Port ( AGP ) solution, such as ATI 3D Rage* Pro , NVIDIA's RIVA128*, Intel740, or others. An AGP controller should use " AGP execute mode", with the


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2001 - CY2210

Abstract: No abstract text available
Text: 0 CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , synchronous PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB , outputs, drive memory clock generator AGPCLK [0­3] 21, 22, 25, 26 AGP clock outputs, running at


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PDF CY2210 133-MHz CK133 CY2210-3) CK133W CY2210-2) CY2210
CY2210

Abstract: No abstract text available
Text: Y2210 CY2210 133 MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , synchronous PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , , 19 3.3V PCI ground VDDPCI 10, 16 3.3V PCI voltage supply VSSAGP 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB ground VDDUSB 31


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PDF Y2210 CY2210 CK133 CY2210-3) CK133W CY2210-2) CY2210
2000 - CY2210

Abstract: No abstract text available
Text: CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks at , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , VDDPCI 10, 16 3.3V PCI voltage supply VSSAGP 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB ground VDDUSB 31 3.3V USB voltage supply


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PDF CY2210 133-MHz CK133 CY2210-3) CK133W CY2210-2) CY2210
2002 - CY2210

Abstract: CY2210PVC-2
Text: 0 CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , synchronous PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , supply VSSAGP 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB , 49, 50 CPU/2 clock outputs, drive memory clock generator AGPCLK [0­3] 21, 22, 25, 26 AGP


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PDF CY2210 133-MHz CK133 CY2210-3) CK133W CY2210-2) CY2210 CY2210PVC-2
2002 - CY2210

Abstract: No abstract text available
Text: 0 CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , synchronous PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB , outputs, drive memory clock generator AGPCLK [0­3] 21, 22, 25, 26 AGP clock outputs, running at


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PDF CY2210 133-MHz CK133 CY2210-3) CK133W CY2210-2) CY2210
48MHZ

Abstract: CY28372 SSOP-48
Text: 48-pin SSOP package · Two copies of ZCLK clocks CPU ZCLK REF PCI AGP IOAPIC 48M , MHz through I2C. 31, 30 AGP [0:1] O AGP Clock. 34 SDATA I/O I2C Data. 5v , Output Frequency FS(3:0) CPU (MHz) ZCLK (MHz) AGP (MHz) PCI (MHz) VCO Freq. (MHz , 0 0010 133.3 100.0 66.7 33.3 400.0 I2C Option (byte 4, bit 2) 0 0 0011 133.3 100.0 50.0 33.3 400.0 0 0100 133.3 133.3 66.7 33.3 400.0 0


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PDF CY28372 48-MHz 48-pin Hz/24 48MHZ CY28372 SSOP-48
Not Available

Abstract: No abstract text available
Text: ,000VA 5,000V NC AGP 2 a a b a DC , DSP AGP2 DC V AGP DSP a-DC V AGP DSP a-L -DC V AGP DSP a-DC V AGP DSP a-L -DC V AGP DC V DSP a-DC V AGP DSP a-L -DC V AGP DC V DSP a-DC V AGP DSP a-L -DC V AGP DC V DSP a-DC V AGP DSP a-L -DC V AGP DC V


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PDF 000VA
2006 - Not Available

Abstract: No abstract text available
Text: 116.6 100.0 111.1 133.3 137.4 144.9 150.0 124.1 133.3 135.1 133.3 AGP (MHz) 66.7 50.0 66.7 50.0 66.7 , of ZCLK clocks · One 48 MHz/24 MHz programmable SIO clock CPU x2 ZCLK x2 REF x3 PCI x8 AGP x2 IOAPIC , . Default output frequency is 24 MHz, but can be configured for 48 MHz through I2C. AGP Clock. I2C Data. 5v , ]/ FS[2:3] PCI [0:5] PCI_STP# CPUT0 CPUC0 CPUT1 CPU_STP# ZCLK[0:1] IOAPIC[0:1] 48MHz 24_48MHz AGP [0:1 , ) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011


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PDF CY28372 48-MHz Hz/24 48-pin
2006 - Not Available

Abstract: No abstract text available
Text: 1CY2210 CY2210 133 MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , frequency - Four AGP clocks at 66 MHz - Three synchronous APIC clocks, at 16.67 MHz - One USB clock at 48 , memory clock generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support , voltage supply 3.3V PCI ground 3.3V PCI voltage supply 3.3V AGP ground 3.3V AGP voltage supply 3.3V USB , generator AGP clock outputs, running at 66.66 MHz APIC clock outputs, running at 16.67 MHz Reference clock


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PDF 1CY2210 CY2210 CK133 CY2210-3) CK133W CY2210-2)
2000 - CY2210

Abstract: No abstract text available
Text: CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks at , generators, including DRCG (CPUCLK/2) - Support for multiple AGP slots - Support multiprocessing systems , 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB , outputs, drive memory clock generator AGPCLK [0­3] 21, 22, 25, 26 AGP clock outputs, running at


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PDF CY2210 133-MHz CK133 CY2210-3) CK133W CY2210-2) CY2210
1998 - motherboard electronic circuit layout

Abstract: clock SECTION OF MOTHERBOARD agp layout Signal Path Designer
Text: Notes on AGP Interface Architectures and Motherboard Design with SSC ANDREW VOLK Principal , induced Spread Spectrum Clocking (SSC) skew for various AGP architectures. Section II presents the trade-off considerations to adjust AGP layout design to compensate for the SSC skew. Adjustment examples are also given to illustrate the methodology. I. SSC AND AGP INTERFACE ARCHITECTURES The questions , of the PLL drives. Note that a system may have different architectures on each end of the AGP


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2003 - pin AMD Athlon X3 435

Abstract: No abstract text available
Text: 166.5 95.4 100.0 83.3 111.1 133.3 116.6 100.0 111.1 133.3 137.4 144.9 150.0 124.1 133.3 135.1 133.3 AGP , interference (EMI) reduction · 48-pin SSOP package CPU x2 ZCLK x2 REF x3 PCI x8 AGP x2 IOAPIC x2 48M x1 24_48M , I2C. AGP Clock. I2C Data. 5v tolerant I2C Clock.5v tolerant Power-down Control. Turns off all clock , ] IOAPIC[0:1] 48MHz 24_48MHz AGP [0:1] SDATA SCLK PD# VDDA GNDA VDD_REF, GND_REF, GND_Z, VDD_Z, VDD_PCI , 1 1 1 1 1 1 1 1 (default) FS(3:0) 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100


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PDF CY28372 48-MHz 48-MHz/24-MHz 48-pin CY28372 pin AMD Athlon X3 435
2004 - amd athlon PIN LAYOUT

Abstract: 48MHZ CY28372 CY28372OC CY28372OCT CY28372OXC CY28372OXCT SSOP-48
Text: REF PCI AGP IOAPIC 48M 24_48M x2 x3 x8 x2 x2 x1 x1 Pin , configured for 48 MHz through I2C. 31, 30 AGP [0:1] O AGP Clock. 34 SDATA I/O I2C Data , Table Input Conditions Output Frequency FS(3:0) CPU (MHz) ZCLK (MHz) AGP (MHz) PCI , 66.7 50.0 33.3 400.0 0 0010 133.3 100.0 66.7 33.3 400.0 0 0011 133.3 100.0 50.0 33.3 400.0 0 0100 133.3 133.3 66.7 33.3 400.0 0


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PDF CY28372 48-MHz 48-pin CY28372 amd athlon PIN LAYOUT 48MHZ CY28372OC CY28372OCT CY28372OXC CY28372OXCT SSOP-48
1997 - 18PCI

Abstract: CY2210 apic
Text: ps AGP Cycle-Cycle Clock Jitter 500 ps REF Cycle-Cycle Clock Jitter 1000 ps , PRELIMINARY CY2210 133 MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG , synchronous PCI clocks, 1 free-running - Two CPU/2 clocks, at one-half the CPU frequency - Four AGP clocks , generators, including DRCG - Support for multiple AGP slots - Support multiprocessing systems - , , 16 3.3V PCI voltage supply VSSAGP 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP


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PDF CY2210 18PCI CY2210 apic
41F hall

Abstract: liycy 8 AMET-15 Hall 41f A-W-K 40UNC LIYCY connector 1,0 mm
Text: assembled the two fixing screws are held captive bythe4-40UNC-thread metallized Part no. AGP 09 G-METAL AGP 15 G-METAL AGP 25 Q-HETAL No. of contacts 9 15 25 Part no. AGP 09 G-ME AGP 15 G-ME AGP 25 G-ME AGP 37 G-ME Plastic, black Part no. AGP O SG-NEW AGP 15G-NEW AGP 25 G-NEW AGP 37 G-NEW Plastic, grey Parino. ASP 09 G-NEW/GR AGP 15 G-NEW/GR AGP 25 G-NEWÍGR AGP 37 G-NEWGR Plastic Parino. AGP 25 S metallized Part no. AGP 25 S-ME 68 Hoods for D-Subminiature Hoods for D-Subminiature connectors


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PDF -LIYCY-08/100 -LIYCY-10/100 -LIYCY-14/100 A4JYCY-16/100 -LIYCY-18/100 Y-26/100 -LIYCY-36/100 41F hall liycy 8 AMET-15 Hall 41f A-W-K 40UNC LIYCY connector 1,0 mm
Not Available

Abstract: No abstract text available
Text: no. Art. Nr. Part no. Art. Nr. Part no. AGP 25 S AGP 25 S-ME AGP 09 G-METALL 9-polig AGP 09 G-ME AGP 09 G-NEW AGP 09 G-NEW/GR AGP 15 G-METALL 15-polig AGP 15 G-ME AGP 15 G-NEW AGP 15 G-NEW/GR AGP 25 G-METALL 25-polig AGP 25 G-ME AGP 25 G-NEW AGP 25 G-NEW/GR AGP 37 G-ME AGP 37 G-NEW AGP 37 G-NEW/GR 78 E 16.0 0.630 Hauben / Hoods fur , . Nr. Part no. Polzahl No. of contacts Polzahl No. of contacts 9-polig AGP 15 G


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cm 108 usb application note

Abstract: CY2210 core i5 MOTHERBOARD CIRCUIT diagram
Text: CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB, and DRCG Support , PCI clocks, 1 free-running — Two CPU/2 clocks, at one-half the CPU frequency — Four AGP clocks at , , including DRCG — Support for multiple AGP slots — Support multiprocessing systems — Supports USB , VSSPCI 7, 13, 19 3.3V PCI ground VDDPCI 10, 16 3.3V PCI voltage supply VSSAGP 20, 24 3.3V AGP ground VDDAGP 23, 27 3.3V AGP voltage supply VSSUSB 29 3.3V USB ground VDDUSB 31 3.3V USB voltage supply


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PDF CY2210 133-MHz cm 108 usb application note CY2210 core i5 MOTHERBOARD CIRCUIT diagram
2004 - amd athlon PIN LAYOUT

Abstract: 48MHZ CY28372 CY28372OC CY28372OCT CY28372OXC CY28372OXCT SSOP-48 amd x2 athlon 4000
Text: REF PCI AGP IOAPIC 48M 24_48M x2 x3 x8 x2 x2 x1 x1 Pin , configured for 48 MHz through I2C. 31, 30 AGP [0:1] O AGP Clock. 34 SDATA I/O I2C Data , ) AGP (MHz) PCI (MHz) VCO Freq. (MHz) 0 0000 133.3 66.7 66.7 33.3 400.0 0 0001 133.3 66.7 50.0 33.3 400.0 0 0010 133.3 100.0 66.7 33.3 400.0 0 0011 133.3 100.0 50.0 33.3 400.0 0 0100 133.3 133.3 66.7


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PDF CY28372 48-MHz 48-pin CY28372 amd athlon PIN LAYOUT 48MHZ CY28372OC CY28372OCT CY28372OXC CY28372OXCT SSOP-48 amd x2 athlon 4000
1998 - master ssc 1

Abstract: clock SECTION OF MOTHERBOARD
Text: : Change Spec Version: A.G.P . 2.0 Summary: Systems that use spread spectrum clocking (SSC) must provide at least 0.5 ns of common clock ( AGP -1X) timing margin. Add-in cards must produce less than 0.5 ns , All AGP components must be functional with a AGPCLK using SSC. Background: Spread spectrum clocking , skew may show up as timing skew with respect to the AGP -1X timing specifications or may show up as skew across some clock domain boundary internal to the device. Note that SSC affects only AGP


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2005 - Not Available

Abstract: No abstract text available
Text: .3 CPU, AGP , and PCI Clock Outputs , Register 3: PCI, AGP Clock (1 = Enable, 0 = Stopped) (Default: FFh).8 , .18 AGP Electrical Characteristics , 32 different frequencies of CPU, PCI, and AGP clocks setting, support two 25MHz clock outputs, all , outputs 2 2.5V 25MHz clock outputs 3 AGP clock outputs 10 PCI synchronous clocks 1 24_48MHz clock output


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PDF W83194BR-903 W83194BR-903
2001 - IAdjg

Abstract: CAPacitor 10U 500V 1206 capacitor 2.2n 0805 1 SC1112 SC1112ASTR TOP2001
Text: 1.5V, SC1112) or (1.2V or 1.5V, SC1112A) and the AGP (1.5V or 3.3V). The SC1112 low dropout regulators , GND AGPGATE AGPSEN VTTGATE VTTSEN AGPSEL VTTSEL VTTIN C3 0.1u Q3 C14 330u AGP Q1 C2 C18 330u C16 , FC DELAY C13 0.1u C12 330u RB 22n C5 PWRGD VTT SELECT Signal AGP SELECT Signal , V Output Voltage AGP AGP1.5 AGP3.3 Output Voltage ADJ VTTSEN Bias Current (SC1112) VTTSEN , % dB 110 150 1 5VSTBY = 4.75V, Vgate = 3.0V 500 500 AGP Gate Current


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PDF SC1112 SC1112 200mV SC1112) SC1112A IAdjg CAPacitor 10U 500V 1206 capacitor 2.2n 0805 1 SC1112ASTR TOP2001
2001 - la 4985

Abstract: SC1112 SC1112ASTR SC1112ATSTR SC1112STR SC1112TSTR TSSOP-16 1u 500v capacitor IAdjg
Text: V or 1.5V, SC1112) or (1.2V or 1.5V, SC1112A) and the AGP (1.5V or 3.3V). The SC1112 low dropout , VTT SELECT Signal Revision 7, October 2001 AGP VTTGATE CAP+ 0.1u C14 330u AGPSEN , C8 330u C9 0.1u AGP SELECT Signal www.semtech.com SC1112 POWER MANAGEMENT Absolute , Output Voltage AGP Output Voltage ADJ VTTSEN Bias Current (SC1112) IbiasVTTSEN VTTSEN Bias , IsinkVTTgate AGP Gate Current V µA Load Regulation LOADREG VTTIN = 3.30V, IO = 0 to 2A 0.3


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PDF SC1112 200mV SC1112 SC1112) IRFR120N SC1112STR SO-16 TSSOP-16 la 4985 SC1112ASTR SC1112ATSTR SC1112STR SC1112TSTR TSSOP-16 1u 500v capacitor IAdjg
Not Available

Abstract: No abstract text available
Text: Hftw A'iii ,J3 ·ÂW CY2210 133-MHz Spread Spectrum Clock Synthesizer/Driver with AGP , USB , clocks, at one-half the CPU frequency - Four AGP clocks at 66 MHz - Three synchronous APIC clocks, at , generators, includ ing DRCG - Support for multiple AGP slots - Support multiprocessing systems - Supports , Reference ground 3.3V Reference voltage supply 3.3V PCI ground 3.3V PCI voltage supply 3.3V AGP ground 3.3V AGP voltage supply 3.3V USB ground 3.3V USB voltage supply 2.5V CPU ground 2.5V CPU voltage supply


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PDF CY2210 133-MHz
2007 - w83194br

Abstract: No abstract text available
Text: .3 5.2 CPU, AGP , and PCI Clock Outputs , ).8 7.4 Register 3: PCI, AGP Clock (1 = Enable, 0 = Stopped) (Default: FFh , .18 9.5 AGP Electrical Characteristics , 32 different frequencies of CPU, PCI, and AGP clocks setting, support two 25MHz clock outputs, all , outputs 2 2.5V 25MHz clock outputs 3 AGP clock outputs 10 PCI synchronous clocks 1 24_48Mhz clock output


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PDF W83194BR-903 W83194BG-903 W83194BR-903/W83194BG-903 W83194BR-903 w83194br
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