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  You can filter table by choosing multiple options from dropdownShowing 14 results of 14
Part Manufacturer Supplier Stock Best Price Price Each Buy Part
BT-OS 150 Einhell Germany AG element14 Asia-Pacific - $30.61 $30.61
CHT-LDOS-150-TO254-T Cissoid S A NAC 5 $335.00 $335.00
CHT-LDOS-150-TO254-T Cissoid S A Future Electronics - $396.56 $396.56
FOS150-50-0 Thomas & Betts Sager - $1.33 $1.14
FOS150-50-0 Thomas & Betts Allied Electronics & Automation - $7.83 $6.71
FOS150-50-9 Thomas & Betts Sager - $1.11 $1.07
JTOS-150 Mini-Circuits Bristol Electronics 4 - -
NOS-150 Eaton Bussmann Allied Electronics & Automation - $118.99 $118.99
NOS-150 Eaton Bussmann Master Electronics 8 $111.26 $92.72
NOS-150 Eaton Bussmann Sager - $103.31 $93.32
NOS-150 Eaton Corporation Avnet - $103.99 $91.79
POS-150 Mini-Circuits Bristol Electronics 170 - -
POS-150P MCLR Chip One Exchange 142 - -
STOS1500 TOROIDY TME Electronic Components 4 $231.39 $221.16

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OS15-0 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2002 - 5889

Abstract: OS15
Text: 1.000MHz to 160.000MHz Down to ±1ppm 10K Ohms // 15pF 35mA max Logic"1" Level = 0.9Vdd min. Logic" 0 , ±5ppm Operating Temp. Range* A = 0 °C to +50°C B = -10°C to +60°C C = -20°C to +70°C D = -30°C to +70°C E = -30°C to +80°C F = -40°C to +85°C G = 0 °C to +70°C Trimmer Option Blank = No Trimmer M


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PDF 000MHz 000GHz 5889 OS15
Not Available

Abstract: No abstract text available
Text: / P O S. 2 1 4 ,7 12, 3 5 0 , 85 4 5 , 84, 8 A 1 r LC E ri 70, 0 1 , OVER 1,25 pm NI. SAME AS -1 ONLY 0 ,8 pm AU. SAME AS -7 ONLY 2 , 0 pm AU. SAME AS -1 ONLY 0 ,4 pm AU. -4 -7 -8 9, 9 J ¿0 ,05 50LD ERP05T5 S U IT A B LE FOR 0 ,8 0 OR ± 0 .Î 7 , 0 NOM D I A H O LE S . -O, 6 5 , OS15 x — - 5 , 0 8 = 7 6 , 20 84, 1 O— 8 OBSOLETE SEE NOTE SEE NOTE 166732-7 A " 0 O . 0 CC N X X X X


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PDF ERP05T5 EH-0467-96 H-10021 H-9442
IA-G1-VGACO

Abstract: Fairchild a1010 dalsa cmos QE R 643 DALSA IA-G1 CMOS schematic diagram vga OS15 CMOS blemish specification 74LCX541 74LCX16374
Text: is done using the TTL input bits out_sel [2: 0 ]. The functionality of the output address selection , pins row_adr_sblk [4: 0 ] and row_adr_lin [3: 0 ]. Each row of the sensor is individually addressable , control of column block addressing is achieved by applying digital input signals to the col_adr_blk [3: 0 ], col_adr_lin [3: 0 ] and col_clk pins. By using these addresses, it is possible to achieve windowing of column , Col_adr_blk [3: 0 ]: This four-bit address controls access to blocks of pixel columns to a resolution of 64


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PDF 640x480 50MHz IA-G1-VGACO Fairchild a1010 dalsa cmos QE R 643 DALSA IA-G1 CMOS schematic diagram vga OS15 CMOS blemish specification 74LCX541 74LCX16374
Not Available

Abstract: No abstract text available
Text: ire c tio n a l 100 Amp 5 0 -2 7 0 V o lts T h y ris to r S u rg e P ro te c tiv e D e v ic e (T , œ24C. 240 5 300 400 3.5 150 750 200 100 TSMBJ1027C 2 : 0 5 336 440 , 5-21/5.59 I 91/£!.4‘1 ,GlS/.G3G ,030/.060 038/. 058 ^ Q.;-ííí/o.7r> 0 ,76./i.:*;à , /?ns (TJ - 70U C} 4. Breakdown voltage V ^R has a positive temperature coefficient of + 0 1 %/3 | C 5. Abcsv« ?D°C, derate imearly to zero @ tSO^C lead temperature 6. Max., The Max !(B 0 ) is 7


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PDF 1005C 1027C 10/1QQ0ms 8/20fiS. UL94VO 214AA DO-13
mosfet equivalent

Abstract: 3N157 3N158 C96d
Text: Voltage (Id = -10 /¿Ade, Vq = V$ = 0 ) V(BR)DSX -35 — Vdc Zero-Gate-Voltage Drain Current (Vpg = -15 Vdc, Vqs = 0 ) (VDs = -35 Vdc, Vqs = 0 ) Idss _ _ 1.0 -10 nAdc ¿lAdc Gate Reverse Current* (Vqs = +25 Vdc, Vqs = 0 ) (VGS = + 50 Vdc, Vds = 0 ) igss _ — + 10 + 10 pAdc nAdc Input Resistance (Vqs =-25 Vdc , -3.0 - -5.5 -7.0 Vdc Gate Forward Current* (Vqs = -25 Vdc, Vds = 0 ) (VGS = -50 Vdc, VDS = 0 ) (Vqs = -25 vdc, vDs = o, ta = +55°c; (Vqs = -50 Vdc, Vds = 0 ,Ta = +55"C) 'G(f) - - -10 -1.0 -10 -1.0 pAdc nAdc


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PDF 00fi5b03 3N157 3N158 O-206AF) mosfet equivalent C96d
Dalsa tdi

Abstract: IL-C9-0512 DALSA TDI CCD tdi ccd dalsa IL-C3-0512 Dalsa TDI CCD bi-directional IA-D1-0064 IL-C3-0128 IL-C3-0256
Text: . DIMENSIONS OF PACKAGE # 50-01-24005 1 670 +/- 005 h -I 0 300 +/- C Note: Cavity size will vary , Part X Y 0 50-01-24005 IL-C3-0128 0.55 ± .09 0.15 ± .02 0° ± 3.0° 50-01-24005 IL-C3-0256 0.55  , -2048 0.55 ± .04 0 15 ± .02 0° ± 1.0° Note: X = center imaging area to center pin 1 along package Y - center Imaging area to center pin 1 across package 0 - off-axis rotation. 43-00050 12/04/91 DALSA INC , +/- .015 I 0.022 +/- 004 0.045 +/- 005 ALL DIMENSIONS IN INCHES 1991 DALSAINC. 0 600 +/- .005


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PDF QQ0033S IA-D2-0512 Dalsa tdi IL-C9-0512 DALSA TDI CCD tdi ccd dalsa IL-C3-0512 Dalsa TDI CCD bi-directional IA-D1-0064 IL-C3-0128 IL-C3-0256
FBA001

Abstract: ADSP-1401 as15 G mz-31 ADSP-3128 AD8P-1101 as31 equivalent AS150 as3932 32 adder complement
Text: impedance OHIZ LSW ( OS15-0 ) OLW EXT (OS39-32) OEXT MSW w/Satuaration OMWSAT LSW @ clock HI OLWMW MSW @ clock , -bit X Input Data Y15_o 16-bit Y Input Data Yy_ 0 Pass Magnitude Register and Shift Control Register Preload Y3.O Shift Control Register Preload Y3. 0 Bit Growth Register Preload Z | 9_q 20-bit Z Output Data , ACCA ACCB OUT (IEXT) (38:33) (32:27) (26:24) (23:16) (15:12) (11:8) (7: 0 ) External X-Buffer Y-Buffer , (38:33) YBUF (32:27) FDBK (26:24) ARITHL (23:16) ACCA (15:12) ACCB (11:8) OUT (7: 0 ) XBUF 38 37 36


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PDF ADSP-1101 16x16-Blt 40-Bit 1024-Polnt 40-Blt 16-Bit 32-Bits-Per-Cycle Z19-16 FBA001 ADSP-1401 as15 G mz-31 ADSP-3128 AD8P-1101 as31 equivalent AS150 as3932 32 adder complement
32kx8 sram

Abstract: No abstract text available
Text: »< I/O24O vcc O I/O25O O ro260 WE4O ae O l/o270 a7 o a3 o NC O A4 O As O As O a9 O WEaO l/ 0 ,eO 553 O 1/O17O gndO I/ 0 ,bO 1/O19O i/o3, 0 I/O30O I/O29O l/02aO Ao O A, O A2 O I/O23O ifeo i/o2, 0 l , Vcc Operating Supply Current by 32 Mode Vcc = Max., Iout = 0 mA, CS < VIL 600 mA L Version 400 Iccxl6 vcc Operating Supply Current by 16 Mode Vcc = Max., Iout = 0 mA, CS< VIL 360 mA L Version , LOW to Low Z 0 0 0 ns 'HZOE DE HIGH to High Z 15 15 25 ns tLZCS CS LOW to Low ZM 3 3 3 ns


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PDF CYM1828 66-pin, CYM1828 CYM1828LHGâ 66-Pin CYM1828HGâ GYM1828HG-45MB 32kx8 sram
Not Available

Abstract: No abstract text available
Text: 0 -7) Upper-Byte Control (l/Os-15) Data Input/Output Chip Select Output Enable Write Enable +3.3V , t e M i c r o e l e c t r o n i c s · P h o e n ix , A Z · (6 0 2 ) 4 3 7 -1 5 2 0 TT l/l , M in 3.0 2.2 -0.3 -55 -40 M ax 3.6 V c c + 0.3 + 0 .8 + 125 +85 Unit V V V Vg Vcc °c , c e Sym bol ClN COUT C o nd itio n V in = 0V, f = 1 . 0 M H z V out = 0V, f = 1 . 0 M H z , lo Ic c C o n d itio n s Min V c c = 3 . 3 , V in = V s s to V c c U nits Max 10 10 180 15 0


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PDF WPS256K16V-XUX 256Kx16
7m4017

Abstract: No abstract text available
Text: T 7 M 4 0 1 7 FEATURES: · High-denslty 2 megabit (64K x 32) CMOS static RAM module · Fast access , AND COMMERCIAL TEMPERATURE RANGES PIN CONFIGURATION Vcc C Aq C I/O q c I/o , c l/ 0 2 c l/Oa c C5o C A, C l/ 0 4 C I/O5 C l/ 0 8 C l/ 0 7 c Ag C a3 c WE0 C a4 c As c 1 /Os c l/ 0 9 C 1/ 0 , 0 C 1 / 0 ,1 c a6 c a7 c C 5i C 1 / 0 ,2 d 1 / 0 ,3 c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 , /O22 41 3 l/ 0 21 40 13 I/O20 39 3 A , 38 3 A , 0 37 3 CS2 36 3 I/O ,g 35 3 1 / 0 ,3 D 1 / 0 ,7 34 I 33 3 l


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PDF 60-pin, MIL-STD-883, IDT7M4017 MIL-STD-883. 7M4017 S13-34
WT4 smd

Abstract: CQFP 240 Aeroflex WW-S700 ACT-F2M32A AMD2M CQFP
Text: , Whichever Occurs First I RESET Low to Read Mode <*>_ tOE tDF tDF tOH tREADY tQLQV tEHQZ tGHOZ tAXQX 0 40 20 20 20 0 0 50 30 30 20 0 0 55 35 35 20 ns ns ns ns ps Notes: 1. Not 100% tested. □ 04715b , Write Cycle Time twc tAVAV 90 120 150 ns Address Setup to CE Going Low Us tAVEL 0 0 0 ns , ns Data Hold Time from CE High tDH tEHOX 0 0 0 ns Output Enable Setup Time tOES 0 0 0 ns Output Enable Hold Time <*> Read tOEH 0 0 0 ns Toggle Bit 1 and Data Polling 10 10 10 ns Read


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PDF MIL-PRF-38534 MIL-STD-S83 004715b F2M32A WT4 smd CQFP 240 Aeroflex WW-S700 ACT-F2M32A AMD2M CQFP
TAE 1102

Abstract: No abstract text available
Text: . Unit Vcc Supply Voltage 4.5 5.0 5.5 V GND Supply Voltage 0 0 0 V VlH Input High Voltage 2.2 6.0 V , with Respect to GND -0.5 to +7.0 V Ta Operating Temperature 0 to +70 °c Tbias Temperature Under Bias , €” 0.2V; f = 0 Vin > Vcc -0.2V or < 0.2V 80 mA 2769 tbl 08 This Material Copyrighted By Its Respective , Z 0 — 0 — 0 — ns 1CHZ(,) CNp Deselect to Output in High Z — 10 — 12 — 18 ns tOHZ(1 , €” 3 — ns tPU™ Chip Select to Power-Up Time 0 — 0 — 0 — ns tPD*1' Chip Deselect to


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PDF IDT7MP4104 I/010 I/011 I/016 I/017pplied. TAE 1102
Not Available

Abstract: No abstract text available
Text: (Revolutionary) Data Byte Control: · Lower Byte (LB) = I/O 0 -7 · Upper Byte (UB) = I/Os-15 3.3 Vo lt Power , perature Operating Life PIN DESCRIPTION A o-17 LB ÜB I/O 0 - 1 5 · High Tem perature Storage · , * A d d re s s In p u ts L o w e r-B y te C o n tro l ( I/O 0 -7 ) U p p e r-B y te C o n tro l (I , 7 -1 5 2 0 \ fA I cs H L L ^ ITE M IC R O E LE C TR O N IC S W PS256K 16V-XU X , capacitance O utput capicitance Symbol ClN COUT Condition ViN = 0 V ,t = 1.0MHz VouT = O V ,t= 1.0MHz


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PDF PS256K16V-XU 256Kx16
ma 2830

Abstract: C2536
Text: –¡ I/O 22 I/O 10 □ 20 41 □ 1/ 0 21 I/011 c 21 40 □ I/O 20 Ae e 22 39 □ An A7 c 23 38 □ Aio , for ease of use. FUNCTIONAL BLOCK DIAGRAM WEo WEi Ä 0 -I7 - CSo t C5i CS2 i i CS3 i I 256Kx 32 , GND Supply Voltage 0 0 0 V VlH Input High Voltage 2.2 — 6.0 V VlL Input Low Voltage -0.5<1' â , Terminal Voltage with Respect to GND -0.5 to +7.0 V Ta Operating Temperature 0 to +70 °C Tbias , Select to Power-Up Time 0 — 0 — 0 — 0 — 0 — ns 1PD<1> Chip Deselect to Power-Down Time — 20


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PDF IDT7MB4067 200mV ma 2830 C2536
3N157

Abstract: 2n3994 EQUIVALENT 2N3994 2N3993 T735 MPQ3303 MPQ2906 3N158 2N3993A MHQ2906
Text: Typ Max Unit OFF CHARACTERISTICS Collector-Emitter Breakdown Voltage dC - 10 mAdc, Ib = 0 ) V(BR)CEO 12 — — Vdc Collector-Base Breakdown Voltage dC = 100 juAdc, Ie = 0 ) V(BR)CBO 25 — — Vdc Emitter-Base Breakdown Voltage (lE = 100 fiAdc, lc = 0 ) V(BR)EBO 4.0 — — Vdc Collector Cutoff Current (VCE = 15 Vdc, VBE = 0 ) ices — — 100 /zAdc ON CHARACTERISTICS DC Current Gain dC = 100 mAdc , Vdc, f = 100 MHz) tr 400 500 — MHz Output Capacitance (Vcb = 5.0 Vdc, lE = 0 , f = 1 MHz) C0bo â


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PDF b3L75SM MPQ2906, MHQ2906 3N157 2n3994 EQUIVALENT 2N3994 2N3993 T735 MPQ3303 MPQ2906 3N158 2N3993A
2001 - Fairchild Imaging ccd

Abstract: ccd 512 x 512
Text: clocks operate from 0 to 5 volt clock levels to simplify high speed readout schemes. Both vertical and , Voltage P-Well Ground Output Amplifier Return MIN 14.7 12.5 13 0 0 0 RANGE TYPICAL 15 15 13.5 1.6 0 1.4 MAX 16 16 14 3.0 0 2.0 UNIT Volts Volts Volts Volts Volts Volts CONDITION CLOCK CHARACTERISTICS: TP


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PDF CCD4156 1000X 512x512 Fairchild Imaging ccd ccd 512 x 512
2001 - CCD4156

Abstract: ccd 512 x 512
Text: clocks operate from 0 to 5 volt clock levels to simplify high speed readout schemes. Both vertical and , Ground Output Amplifier Return MIN 14.7 12.5 13 0 0 0 RANGE TYPICAL 15 15 13.5 1.6 0 1.4 MAX 16 16 14 3.0 0 2.0 UNIT Volts Volts Volts Volts Volts Volts CONDITION CLOCK CHARACTERISTICS: TP = 20 º C (Note


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PDF CCD456 1000X ccd4156 512x512 ccd 512 x 512
Not Available

Abstract: No abstract text available
Text: Diagram Pin Configuration Top View 1 12 23 34 45 56 1/03, 0 '/OæO C S .O 1/OsoO O I/O O 2ND O I/O ,o 13 l/OzeO W E , 0 O A.« O I/O, O 10,2 / As O O A,4 O A,o O Ö E a7 1/02, 0 TOzsO O N O *12 O ®Ei C A O *5 O a A O 2 O N O V C O '/°7 C C A 0 fl O l/O O CS, O I/O o e l/016O CS3 O I/Û220 O I/O 0 , N O '/O C s l/OuO GNdO 1/02, 0 0 l/Oj 0 I/O O '/Ol 3 i/ 0 ,eO 1/ 0 ,90 1/ 0 * 0 !/Ol6-23 0 A, O


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PDF CYM1828 66-Pin 1828L 1828H
OS15

Abstract: No abstract text available
Text: parts: the upper 4 bits specify the duty cycle of the basic pulse as 0 /16 to 15/16 with a resolution of , period, which consists of 16 basic pulses. Thus, the specifiable range of PWDR setting is from 0 /256 to , ) are 8-bit readable/writable registers used to fix the PWM output to 1 (for OS = 0 ) or 0 (for OS = 1). , Comparator 0 Comparator 1 Comparator 2 Comparator 3 Comparator 4 Comparator 5 Comparator 6 Comparator , (when OS = 0 ) with a duration of the resolution. Refer to the hardware manual of the H8S/2128 for


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PDF H8S/2128 REJ06B0481-0100/Rev OS15
2008 - IBM ds5300

Abstract: VG04 DS4700 david garrett ibm X335 DS4000 DS5000
Text: : 1024 KB · IO Types: Small Random, Large Random · Simulated Array Type: RAID 0 · Stripe Depth: 1024


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PDF DS5000 DS5300 IBM ds5300 VG04 DS4700 david garrett ibm X335 DS4000
W07 sot 23

Abstract: Bos 6K BOS12M A0R-A12R AOR-A12R
Text: «1' Symbol Rating Commercial Military Unit Vterm*2' Terminal Voltage with Respect to GND - 0 5 to +7 0 -O 5 to +7 0 V Ta Operating Temperature 0 to +70 -55 to +125 °C Tbias Temperature Under Bias -55 to+125 -65 , €”55°C to +125°C OV 5 0V ± 1 0 % Commercial 0°C to +70°C 0V 5 0V ± 1 0 % RECOMMENDED DC OPERATING , exceed Vcc + 0 5V Symbol Parameter Min. Typ. Max. Unit Vcc Supply Voltage 4.5 5 0 5 5 v GND Supply Voltage 0 0 0 v VlH Input High Voltage 2.2 — 6.0<2> V Vil Input Low Voltage -0.5<1> — 0 8 V NOTES


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PDF 2S771 DD14137 IDT7025S/L 35/45/55/70ns 25/35/45/55ns IDT7025S 750mW IDT7025L IDT7025 W07 sot 23 Bos 6K BOS12M A0R-A12R AOR-A12R
OC16

Abstract: OS28 LC7985NA os39 OS26 LC7985ND N051 LC7930N QIP80A MPU-16
Text: ILC04497 1 RS 1 MPU " 0 " () : ; () "1": (, ) R/W 1 MPU (R)(W) " 0 " : "1" : E 1 MPU DB4 DB7 4 MPU 4 MPU , " 0 ": , 1": " No.3255-7/34 LC7985NA, 7985ND OC1 OC16 16 1 , DR MPU 2 2 RS 0 R/W 0 IR () 0 1 1 0 (DB7)(DB0 DB6) DR (DR DD RAM CG RAM) 1 1 DR (DD RAM CG RAM DR) 2. LC7985NA / ND "1" 2 RS= 0 , R / W=1 DB7


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PDF LC7985NA, 7985ND N3255C LC7985ND LC7985NA LC7930N) RAM80 ROM7200 RAM64 OC16 OS28 os39 OS26 LC7985ND N051 LC7930N QIP80A MPU-16
2009 - Not Available

Abstract: No abstract text available
Text: Industrial Process Control Communications IOVDD DGND DVDD AVDD AVSS REF-A Analog Monitor VOUT- 0 VOUT-7 AIN- 0 , Reference Buffer A Command To DAC- 0 , DAC-1, Registers DAC-2, DAC-3 (When Correction Engine Disabled) Input Data Register 0 Correction Engine DAC- 0 Data LDAC DAC- 0 Latch- 0 OFFSET DAC A Mux VMON OFFSET-A VOUT- 0 RST RSTSEL LDAC CLR USB/BTC GPIO- 0 GPIO-1 GPIO-2 AIN- 0 AIN-1 Control Logic User Calibration: Zero Register 0 Gain Regsiter 0 To DAC- 0 , DAC-1, DAC-2, DAC-3 Internal Trimming Zero/Gain; INL


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PDF DAC8718 SBAS467A 16-Bit, 16-Bit 50MHz, QFN-48 TQFP-64 10x10mm
2009 - Not Available

Abstract: No abstract text available
Text: Industrial Process Control Communications IOVDD DGND DVDD AVDD AVSS REF-A Analog Monitor VOUT- 0 VOUT-7 AIN- 0 , Reference Buffer A Command To DAC- 0 , DAC-1, Registers DAC-2, DAC-3 (When Correction Engine Disabled) Input Data Register 0 Correction Engine DAC- 0 Data LDAC DAC- 0 Latch- 0 OFFSET DAC A Mux VMON OFFSET-A VOUT- 0 RST RSTSEL LDAC CLR USB/BTC GPIO- 0 GPIO-1 GPIO-2 AIN- 0 AIN-1 Control Logic User Calibration: Zero Register 0 Gain Regsiter 0 To DAC- 0 , DAC-1, DAC-2, DAC-3 Internal Trimming Zero/Gain; INL


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PDF DAC8718 SBAS467A 16-Bit, 16-Bit 50MHz, QFN-48 TQFP-64 10x10mm
2009 - DAC8218

Abstract: DAC8718 DB21 QFN-48 TQFP-64
Text: Analog Monitor CS SDI SDO RST RSTSEL LDAC CLR USB/BTC GPIO- 0 GPIO-1 GPIO-2 Control Logic SCLK Reference Buffer A OFFSET DAC A Command To DAC- 0 , DAC-1, Registers DAC-2, DAC-3 (When Correction Engine Disabled) Input Data Register 0 Correction Engine VOUT-7 AIN- 0 , function-compatible with the DAC8218 (14-bit) and the DAC7718 (12-bit). OFFSET-A DAC- 0 DAC- 0 Data Mux SPI Shift Register VOUT- 0 WAKEUP The DAC8718 features a standard, high-speed serial


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PDF DAC8718 SBAS467A 16-Bit, DAC8718 16-bit DAC8218 DB21 QFN-48 TQFP-64
Supplyframe Tracking Pixel