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DC1747A-A Linear Technology EVALUATION LOW EM1 KIT LTM2882-3
LT1010CK Linear Technology IC BUFFER AMPLIFIER, MBFM4, METAL CAN, TO-3, 4 PIN, Buffer Amplifier
LT1132CN Linear Technology IC LINE TRANSCEIVER, PDIP24, 0.300 INCH, PLASTIC, DIP-24, Line Driver or Receiver
LTC2262IUJ-12#TRPBF Linear Technology LTC2262-12 - 12-Bit, 150Msps Ultralow Power 1.8V ADC; Package: QFN; Pins: 40; Temperature Range: -40°C to 85°C
LTC2301IDE#TRPBF Linear Technology LTC2301 - 1-Channel, 12-Bit ADCs with I2C Compatible Interface; Package: DFN; Pins: 12; Temperature Range: -40°C to 85°C
LTC2226HLU#PBF Linear Technology IC 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQFP32, 5 X 5 MM, LEAD FREE, PLASTIC, MS-026, TQFP-32, Analog to Digital Converter

OF IC CD4040 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - cd4060

Abstract:
Text: couple of milliamperes. The unit will store a 13-bit conversion (12bit plus sign) in two consecutive bytes of memory, with a programmable time interval between measurements. The circuit is useful for , also useful in the lab for making unattended, repetitive measurements of long-term drift, component aging, etc. The heart of the circuit is a TC7109 (IC1), a 12-bit plus sign CMOS A/D converter. The TC7109 has a handshake mode in which the result of the latest conversion is output, in two consecutive


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PDF TC7109 AN-24 13-bit 12bit 14-STAGE cd4060 cd4060 crystal application CD4060 data CD4040 application circuit for CD4060 of CD4060 cmos 74C00 NAND cd4060 application note IC2 CD4060 IC2 CD4060 CURRENT TO VOLTAGE CONVERTER
1001DL

Abstract:
Text: —H- "NIGHT" COUNTER RESET (TERMINAL 11 OF CD4040 ) "CLOCK" PULSES (TERMINAL s OF CA3097E) J 1 PULSE/SEC ' -S- - ».g., 8 HRS -»-: mil* COUNTER OUTPUT (TERMINAL 1 OF CD4040 ) TERMINAL 6 OF , Thyristor Control Applications Features Relay Control Valve Control Synchronous Switching of Hashing , silicon integrated circuits designed to control a thyristor in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50-60Hz and 400Hz. Each of the


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PDF CA3059 50-60Hz 400Hz ca3059 208/230V, CA3059H CA3079H 1001DL ZO 103 TRIAC TRIAC ZO 103 MA zero crossing detector 50Hz 230v ic 1001dl triac zo 103 1001dl ic CA3058 CA3079 OF IC CD4040
CD4013 UP DOWN COUNTER

Abstract:
Text: / Ripple Counter HD-4040 CD4040 Quad Clocked "D" Latch HD-4042 CD4042 Quad Three State R/S Latch NOR HD , MC14066 Di - 4 FUNCTIONAL CROSS REFERENCE OF HD-4000 SERIES AND HD-54C/74C SERIES ARITHMETIC FUNCTIONS


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PDF HD-4000 CD4000 HD-4001 CD4001 MM4601 HD-4002 CD4002 MM4602 HD-4006 CD4013 UP DOWN COUNTER mc 4011 4017 motorola MC14017 CD4024 mm4601 cd4017 decade counter CD4000 cross REFERENCE rca cd4066 CD4002 RCA
ZO 103 TRIAC

Abstract:
Text: , CA3079 SENSOR ILLUMINATION J ■"DAY" - —H- "NIGHT" COUNTER RESET (TERMINAL 11 OF CD4040 , (TERMINAL 1 OF CD4040 ) TERMINAL 6 OF CA3059 AND TERMINAL 5 OF CA30S7E TERMINAL 4 OF CA305S AND POWER IN , Thyristor Control Applications Features Relay Control Valve Control Synchronous Switching of Hashing , silicon integrated circuits designed to control a thyristor in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50-60Hz and 400Hz. Each of the


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PDF CA3059 50-60Hz 400Hz ca3059 208/230V, CA3059H CA3079H ZO 103 TRIAC 1001dl TRIAC ZO 103 MA OF IC CD4040 triac zo 103 ic cd4040 Functions of IC CD4040 CD4040 circuit diagram of cd4040
2002 - CA3059

Abstract:
Text: ILLUMINATION COUNTER RESET (TERMINAL 11 OF CD4040 ) e.g., 8 HRS "CLOCK" PULSES (TERMINAL 9 OF CA3097E) 1 PULSE/SEC COUNTER OUTPUT (TERMINAL 1 OF CD4040 ) TERMINAL 6 OF CA3059 AND TERMINAL 5 OF , designed to control a thyristor in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50Hz-60Hz and 400Hz. Each of the zero-voltage switches incorporates , Synchronous Switching of Flashing Lights · On-Off Motor Switching · Differential Comparator with


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PDF CA3059, CA3079 50Hz-60Hz 400Hz CA3059 CA3079 208/230V, 50Hz-60Hz 400Hz. CA3059 equivalent circuit diagram of cd4040 DATASHEET OF IC CD4040 COUNTER IC CD4040 CA3079 zero-voltage switches OF IC CD4040 Zero Crossing Detector for 220V 50Hz ic CD4040
1994 - CA3079

Abstract:
Text: SENSOR ILLUMINATION COUNTER RESET (TERMINAL 11 OF CD4040 ) e.g., 8 HRS "CLOCK" PULSES (TERMINAL 9 OF CA3097E) 1 PULSE/SEC COUNTER OUTPUT (TERMINAL 1 OF CD4040 ) TERMINAL 6 OF CA3059 AND , in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50Hz-60Hz and 400Hz. Each of the zero-voltage switches incorporates 4 functional blocks (see the Functional Block Diagram) as follows: · Valve Control · Synchronous Switching of Flashing


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PDF CA3059, CA3079 50Hz-60Hz 400Hz CA3059 CA3079 208/230V, 50Hz-60Hz 400Hz. CA3059H COUNTER IC CD4040 CA3097E 16 PIN COS IC CD4040 zero crossing detector 50Hz 230V AC IC CD4040 zero crossing detector 50Hz 230v CA3059 equivalent CA3058
IC Cd4020

Abstract:
Text: power and high noise immunity of CMOS. The 'HC4020 is a 14 stage counter, the 'HC4040 is a 12stage , (negative transition) of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. These devices are pin equivalent to the CD4020, CD4024 and CD4040 , : For a power supply of 5V ± 1 0 % the worst case output voltages (Vo h . and Vol ) occur fo r HC at , of the output, Qw, at V q c -S V . Note 6: Cpo determines the no load dynamic power consumption, P o


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PDF 54HC4024/MM74HC4024/MM54HC4040/MM74HC4040 MM54HC4020/MM74HC4020 14-Stage MM54HC4024/MM74HC4024 MM54HC4040/MM74HC4040 12-Stage 4040/M HC4020 HC4040 12stage IC Cd4020 COUNTER IC CD4040 IC CD4040 cd4024 cd4020 pin diagram 54hc4040 cd4020 CD4024 equivalent CD4040 and pin diagram of ic cd4020
Not Available

Abstract:
Text: R C H II- D S E M IC O N D U C T O R tm MM74HC4020 • MM74HC4040 14-Stage Binary Counter , power and high noise immunity of CMOS. The ’HC4020 is a 14 stage counter and the ’HC4040 is a 12-stage counter. Both devices are incremented on the fall­ ing edge (negative transition) of the input clock , . These devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from , € package: -12 mW/’C from 1O ’C to 125°C. O Note 4: For a power supply of 5V ±10% the worst case


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, HC4020 HC4040
IC Cd4020

Abstract:
Text: retaining the low pow er and high noise im m unity of CMOS. The M M 74H C 4020 is a 14 stage counter and the , transition) of the input clock, and all th e ir outputs are reset to a low level by applying a logical high on th e ir reset input. These devices are pin equivalent to the CD4020 and CD4040 respectively. All , ircuit (SO IC ), JED E C M S-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TY P E II, 5.3m , C ircuit (SO IC ), JED E C M S-012, 0.150" Narrow 16-Lead Small Outline Package (SOP), EIAJ TY P E II


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage IC Cd4020 4040N 74HC4020M 74HC4020N IC 4020 counter
Not Available

Abstract:
Text: pow er and high noise im m unity of CM O S. The M M 74H C 4020 is a 14 stage counter and the M M 74H , transition) of the input clock, and all th e ir outputs are reset to a low level by applying a logical high on th e ir reset input. These devices are pin equivalent to the C D 4020 and CD4040 respectively , utline Integrated C ircuit (SO IC ), JE D E C M S-012, 0.150” N arrow 16-Lead Small O utline P ackage , Integrated C ircuit (SO IC ), JE D E C M S-012, 0.150” N arrow M16D 16-Lead Small O utline P ackage


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage
Not Available

Abstract:
Text: and high noise immunity of CMOS. The ’HC4020 is a 14 stage counter and the ’HC4040 is a 12stage counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and , devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage , 100°C to 125°C. Note 4: For a power supply of 5V ± 1 0 % the worst case output voltages (Vo h . and , so the 6.0V values should be used. *V | l limits are currently tested at 20% of Vcc- The above V il


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PDF MM54HC4020/MM74HC4020 14-Stage MM54HC4040/MM74HC4040 12-Stage 4020/M MM74HC4040, HC4020 HC4040 12stage
1999 - and pin diagram of cd4020

Abstract:
Text: similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The MM74HC4020 is , falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. These devices are pin equivalent to the CD4020 and CD4040 , VIN = VCC or GND Current IOUT = 0 µA Note 4: For a power supply of 5V ±10% the worst case , 17 + 12(N­1) ns; where N is the number of the output, QW, at VCC = 5V. AC Electrical


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM74HC4020, MM74HC4040, MM74HC4020 MM74HC4040 CD4020 and pin diagram of cd4020 cd4020 pin diagram pin diagram of cd4040 description and pin diagram of cd4020 cd4040 dip CD4040 PIN DIAGRAM pin Diagram cd4040 CD4040
CD4040

Abstract:
Text: the low power and high noise immunity of CMOS. The 'HC4020 is a 14 stage counter and the 'HC4040 is a 12stage counter. Both devices are incremented on the falling edge (negative transition) of the input clock , devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due , Please look into Section 6, Appendix D for availability of various package types. 3-372 NATIONAL , "J" package: -12 m W /'C from 100*C to 125*C. Note 4: For a power suppiy of 5V ± 1 0 % the worst case


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PDF 54HC4020/MM74HC4020/MM54HC4040/MM74HC4040 MM54HC4020/MM74HC4020 14-Stage MM54HC4040/MM74HC4040 12-Stage 4020/M 54HC4040/ MM74HC4040, HC4020 HC4040 CD4040 54HC4020 cd4020
1995 - NATIONAL SEMICONDUCTORS CD4020

Abstract:
Text: performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS The , falling edge (negative transition) of the input clock and all their outputs are reset to a low level by applying a logical high on their reset input These devices are pin equivalent to the CD4020 and CD4040 , For a power supply of 5V g 10% the worst case output voltages (VOH and VOL) occur for HC at 4 5V Thus , are currently tested at 20% of VCC The above VIL specification (30% of VCC) will be implemented no


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PDF MM54HC4020 MM74HC4020 14-Stage MM54HC4040 MM74HC4040 12-Stage MM74HC4020 MM54HC4040 MM74HC4040 NATIONAL SEMICONDUCTORS CD4020 and pin diagram of cd4020 HC4040 CD4020 CD4040 cd4020 pin diagram E17A HC4020 C1995
CD4024

Abstract:
Text: speed performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS , -stage counter. All these devices are incremented on the falling edge (negative transition) of the input clock , microCMOS These devices are pin equivalent to the CD4020, CD4024 and CD4040 respectively. All inputs are , supply of 5V ±10% the worst case output voltages (Voh. and Vol) occur for HC at 4.5V. Thus the 4.5V , any output can be calculated using: tp -17-M2(N-1) ns; where N is the number of the output, Qw, at Vcc


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PDF MM54HC4020/MM74HC4020 14-Stage MM54HC4024/MM74HC4024 MM54HC4040/MM74HC4040 12-Stage MM54HC4020/MM74HC4020, MM54HC4024/ MM74HC4024, MM54HC4040/MM74HC4040, HC4020 CD4024 CD4040 CD4024 equivalent LT 5216 CD4020 cd4020 pin diagram pin diagram of cd4040 HC4040 uses of cd4040 HC4024
2001 - CD4020

Abstract:
Text: performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The , the falling edge (negative transition) of the input clock, and all their outputs are reset to a low , CD4020 and CD4040 respectively. All inputs are protected from damage due to static discharge by , IOUT = 0 µA Note 4: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL , number of the output, QW, at VCC = 5V. AC Electrical Characteristics VCC = 2.0V to 6.0V, CL = 50 pF


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM74HC4020, MM74HC4040, MM74HC4020 MM74HC4040 CD4020 circuit diagram of cd4040 cd4040 and pin diagram of cd4020 pin diagram of cd4040 MM74HC4020N cd4020 pin diagram cd4040 application note uses of cd4040
2003 - and pin diagram of cd4020

Abstract:
Text: similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The MM74HC4020 is , falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input. These devices are pin equivalent to the CD4020 and CD4040 , Note 5: For a power supply of 5V ±10% the worst case output voltages (VOH, and VOL) occur for HC at , Propagation delay time to any output can be calculated using: tP = 17 + 12(N­1) ns; where N is the number of


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM74HC4020, MM74HC4040, MM74HC4020 MM74HC4040 CD4020 and pin diagram of cd4020 CD4040 MM74HC4020SJ MM74HC4020N MM74HC4020M MM74HC4040SJ cd4020 pin diagram 74HC
1998 - and pin diagram of cd4020

Abstract:
Text: performance similar to LS-TTL logic while retaining the low power and high noise immunity of CMOS. The , falling edge (negative transition) of the input clock, and all their outputs are reset to a low level by , CD4040 respectively. All inputs are protected from damage due to static discharge by protection diodes , package: -12 mW/°C from 100°C to 125°C. Note 4: For a power supply of 5V ± 10% the worst case output , 6.0V values should be used. Note 5: VIL limits are currently tested at 20% of VCC. The above VIL


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, HC4020 HC4040 and pin diagram of cd4020 CD4020 cd4020 pin diagram pin diagram of cd4040 FAIRCHILD MM74HC FAIRCHILD 4040 CD4040 74HC
zero crossing detector ic with 230v

Abstract:
Text: OF CD4040 ) TERMINAL 6 OF CA3059 AND TERMINAL 5 OF CA3097E TERMINAL 4 OF CA3059 AND POWER IN LOAD , are mono lithic silicon integrated circuits designed to control a thyristor in a variety of AC power switching applications for AC input volt ages of 24V, 120V, 208/230V, and 277V at 50-60Hz and 400Hz. Each of , Sensing Amplifier - Tests the condition of external sensors or command signals. Hysteresis or , Valve Control Synchronous Switching of Hashing Lights On-Off Motor Switching Differential Comparator


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PDF CA3059 sJ\3079 50-60Hz 400Hz CA3059 CA3079 208/230V, 400Hz. CA3059H zero crossing detector ic with 230v 50 Amp current 512 volt triac CA3059E zero crossing detector 50Hz 230V AC zero crossing detector 50Hz 230v ic CD4040 circuit diagram of cd4040 CD4020A 230V AC to 12V DC ic
pin diagram details of cd4040

Abstract:
Text: immunity of CMOS. The MM74HC4020 is a 14 stage counter and the MM74HC4040 is a 12-stage counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and all their , equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due to static , supply of 5V ±10% the worst case output voltages (V0h> and V0|_) occur for HC at 4.5V. Thus the 4.5V , delay time to any output can be calculated using: lp = 17 + 12(N-1) ns; where N Is the number of the


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PDF MM74HC4020 MM74HC4040 14-Stage 12-Stage MM74HC4020, MM74HC4040, MM74HC4020 MM74HC4040 CD4020 pin diagram details of cd4040 description and pin diagram of cd4020 IC Cd4020 cd4020 pin diagram circuit diagram of cd4040 uses of cd4040 4040 FAIRCHILD pin diagram of cd4040 FAIRCHILD 4040
1998 - CD4040

Abstract:
Text: the negative transition of each clock pulse. The counters are reset to the zero state by a logical "1" at the reset input independent of clock. Industry Part Number NS Part Numbers CD4040BM , Military Drawing (SMD) - CD4040 : 7705801EA* - Medium speed operation - Schmitt trigger clock input 1.0V to 15V 0.45Vdd (typ.) Fan out of 2 driving 74L or 1 driving 74LS 8MHz typ. at Vdd = 10V 2 , the safety of the device cannot be guaranteed; they are not meant to imply that the devices should be


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PDF MNCD4040BM-X 12-STAGE CD4040BM CD4040BM CD4040BMJ/883* CD4040BMW/883 7705801EA* MIL-STD-883, CD4040 7705801EA 74LS
ci 4040

Abstract:
Text: and high noise immunity of CMOS. The 'HC4020 is a 14 stage counter and the 'HC4040 is a 12-stage counter. Both devices are incremented on the falling edge (negative transition) of the input clock, and , devices are pin equivalent to the CD4020 and CD4040 respectively. All inputs are protected from damage due , from 100°C to 125°C. Note 4: For a power supply of 5V ±10% the worst case output voltages (Voh. and , should be used *V|l limits are currently tested at 20% of Voc- The above Vil specification (30% of Voc


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PDF MM54HC4020/MM74HC4020 14-Stage MM54HC4040/MM74HC4040 12-Stage MM54HC4020/MM74HC4020, MM54HC4040/ MM74HC4040, HC4020 HC4040 ci 4040 CD4040 MM74HC4020J LA 4040 cd4020 pin diagram description and pin diagram of cd4020 ci hc 4020 uses of cd4040
uses of cd4040

Abstract:
Text: 4-quadrant multiplying digital-to-sin/cos converter. The converter accepts a digital input of up to , . The external analog voltage can be an ac or dc reference with an amplitude of ±10 V peak. ■The analog input is buffered through an operational amplifier to minimize loading of the input signal. The , fixed dc reference, the model 5126 is available with an internal dc reference source of either +5 V-dc , upon the option selected. Model DTG5126 offers an angular accuracy of 2 arc-minutes. The exceptional


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PDF 47S5M DTG5126 16-bit 345/USA 5126-160S) HSRD1006) 20-bit, TSL1X36) 20-bit uses of cd4040 NATEL natel engineering CD4040 DTG5126 5126 DTQ5129 15-V Natel 5012 Natel 5116
CD4020A

Abstract:
Text: (TERMINAL 1 OF CD4040 ) TERMINAL 6 OF CA3059 AND TERMINAL 5 OF CA3097E TERMINAL 4 OF CA3059 AND POWER IN LOAD , silicon integrated circuits designed to control a thyristor in a variety of AC power switching applications for AC input voltages of 24V, 120V, 208/230V, and 277V at 50Hz-60Hz and 400Hz. Each of the , Tests the condition of external sensors or command signals. Hysteresis or proportional-control , pulses of the circuit at the time when the AC cycle is at zero volt age point; thereby eliminating


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PDF CA3059, CA3079 50Hz-60Hz 400Hz CA3059 CA3079 208/230V, 400Hz. CA3059H CD4020A schematic diagram 220v dc motor control Zero Crossing Detector for 220V 50Hz
2007 - 16f73

Abstract:
Text: publication.1 We are continually surprised, to the point of near mystification, by these circuit amalgams , insular. Perhaps the freedom of selection without commitment, akin to window shopping. Or, perhaps, simply the pleasure of new recruits for the circuit aficionados intellectual palate. Locally based , Stabilize 5V Output. , LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. an113f AN113-1 Application Note


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PDF an113f AN113-19 AN113-20 16f73 74ACH14 cd4040 application note 16f73 rs232 74ACH74 LT1150 LSK389 equivalent 2N2369 avalanche 2N2369 AVALANCHE PULSE GENERATOR Notebook lcd inverter schematic
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