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Festo
SOOC-DS-Q-2-R25 Photoelectric; Fiber-Optic; Diffuse; forSOE4; cube; 2m cbl; 25mm bnd
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Allied Electronics & Automation SOOC-DS-Q-2-R25 Bulk 0 1 $186.84 $186.84 $186.84 $186.84 $186.84 More Info
Festo
SOOC-DS-M6-1-R25 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; lg sw dist; M6; 1m cbl; 25mm bnd
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Allied Electronics & Automation SOOC-DS-M6-1-R25 Bulk 0 1 $17.68 $17.68 $17.68 $17.68 $17.68 More Info
Festo
SOOC-DS-M6-2-R25 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; M6; 2m cbl; 25mm bend rad
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Allied Electronics & Automation SOOC-DS-M6-2-R25 Bulk 0 1 $27.53 $27.53 $27.53 $27.53 $27.53 More Info
Festo
SOOC-DS-F-M4-2-R2 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; flex; M4; 2m cbl; 2mm bnd
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Allied Electronics & Automation SOOC-DS-F-M4-2-R2 Bulk 0 1 $149.44 $149.44 $149.44 $149.44 $149.44 More Info
Festo
SOOC-DS-P-M4-1-R15 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M4; 1m cbl; 15mm bnd
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Allied Electronics & Automation SOOC-DS-P-M4-1-R15 Bulk 0 1 $23.65 $23.65 $23.65 $23.65 $23.65 More Info
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Festo
SOOC-DS-C-M4-2-R15 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; coax; M4; 2m cbl; 15mm bnd
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Allied Electronics & Automation SOOC-DS-C-M4-2-R15 Bulk 0 1 $62.88 $62.88 $62.88 $62.88 $62.88 More Info
Festo
SOOC-DS-H-M6-1-R40 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; lg sw dist; M6; 1m cbl; 40mm bnd
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Allied Electronics & Automation SOOC-DS-H-M6-1-R40 Bulk 0 1 $29.58 $29.58 $29.58 $29.58 $29.58 More Info
Festo
SOOC-DS-P-M3-2-R10 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M3; 2m cbl; 10mm bend rad
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Allied Electronics & Automation SOOC-DS-P-M3-2-R10 Bulk 0 1 $62.88 $62.88 $62.88 $62.88 $62.88 More Info
Festo
SOOC-DS-P-M4-2-R15 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M4; 2m cbl; 15mm bnd
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Allied Electronics & Automation SOOC-DS-P-M4-2-R15 Bulk 0 1 $35.35 $35.35 $35.35 $35.35 $35.35 More Info
Festo
SOOC-DS-H-M6-2-R40 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; lg sw dist; M6; 2m cbl; 40mm bnd
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Allied Electronics & Automation SOOC-DS-H-M6-2-R40 Bulk 0 1 $37.41 $37.41 $37.41 $37.41 $37.41 More Info
Festo
SOOC-DS-M6-2-R25-S4 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M6; 2m cbl; 25mm bnd; 40mm sleeve
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Allied Electronics & Automation SOOC-DS-M6-2-R25-S4 Bulk 0 1 $39.28 $39.28 $39.28 $39.28 $39.28 More Info
Festo
SOOC-DS-M6-1-R25-S4 Photoelectric; Fiber-Optic; Diffuse; forSOE4 units; M6; 1m cbl; 25mm bnd
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Allied Electronics & Automation SOOC-DS-M6-1-R25-S4 Bulk 0 1 $31.47 $31.47 $31.47 $31.47 $31.47 More Info
Festo
SOOC-DS-P-M4-1-R15-S4 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M4; 1m cbl; 15mm bnd; 40mm sleeve
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Allied Electronics & Automation SOOC-DS-P-M4-1-R15-S4 Bulk 0 1 $39.28 $39.28 $39.28 $39.28 $39.28 More Info
Festo
SOOC-DS-P-M3-2-R10-S4 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M3; 2m cbl; 10mm bnd; 40mm sleeve
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Allied Electronics & Automation SOOC-DS-P-M3-2-R10-S4 Bulk 0 1 $76.67 $76.67 $76.67 $76.67 $76.67 More Info
Festo
SOOC-DS-P-M4-2-R15-S4 Photoelectric; Fiber-Optic; Diffuse; forSOE4; M4; 2m cbl; 15mm bnd; 40mm sleeve
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Allied Electronics & Automation SOOC-DS-P-M4-2-R15-S4 Bulk 0 1 $51.18 $51.18 $51.18 $51.18 $51.18 More Info

OCDS datasheet (1)

Part Manufacturer Description Type PDF
OCDS Infineon Technologies Better way to develop and debug system- OCDS based Original PDF

OCDS Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
OCDS

Abstract: CERBERUS ocds C166CBC c161u debugging emulation support ocds Debugging Emulation Support C161U OCDS cerberus Microcontroller AT89C51 C165H/C161U C165H
Text: ) 9 10 Brk_out# TCLK (IEEE 1149.1) 11 Brk_in# 13 n.c. 15 12 Gnd 14 OCDS_E# 16 key (no pin , Debugging and Emulation Support for C161U by OCDS * 165UTAH / C165H C161U OCDS Debugging and Emulation * OCDS : On-chip debug support C161U - World's Best Valued 16-bit USB Microcontroller , Research, Specification Development, Integration 165UTAH / C165H C161U OCDS Debugging and , C161U`s New Development Process Software Team Research, Specification 165UTAH / C165H C161U OCDS


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PDF C161U 165UTAH C165H C161U 16-bit OCDS CERBERUS ocds C166CBC debugging emulation support ocds Debugging Emulation Support C161U OCDS cerberus Microcontroller AT89C51 C165H/C161U C165H
2006 - OCDS

Abstract: Tricore* ocds Tricore AP32060 OCDS-L2
Text: A pp l ic a t i o n N o t e , V 2 . 3, D e c . 2 0 0 1 AP32058 OCDS L2 Trace Port Connector TriCore Based Boards AI ICore N e v e r s t o p t h i n k i n g . OCDS L2 Trace Port , or other persons may be endangered. AP32058 OCDS L2 Trace Port Connector Introduction 1 Introduction This document describes the Infineon Technologies OCDS Level 2 TriCore trace-port connector , frequencies beyond 80 MHz use the OCDS L1/L2 & Nexus High-Speed Connector (see Application Note AP32060). In


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PDF AP32058 OCDS Tricore* ocds Tricore AP32060 OCDS-L2
2009 - TSMC 0.35Um

Abstract: 80C515C ocds 0.35Um tsmc 8051 mcs51 TSMC 0.25Um T8051 R8051XC2 MCS51 ASM51
Text: , and OCDS debug), CPU only, and size of the optional OCDS. ASIC Technology TSMC* 0.35µm UMC 0.25µm , synchronous reset; therefore scan insertion is straightforward. A complete On-Chip Debug Support ( OCDS , 2.8K CPU + peripherals = 5.2K (fits in 0.0539 mm2 footprint) Total, with OCDS debug = 8.5K Dummy , Support ( OCDS ) March 2009 Functional Description The T8051 core is partitioned into modules as , Memory. OCDS - On Chip Debug Support Serves as a debug interface through an IEEE1149.1 (JTAG) port


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PDF MCS51® T8051 8051-Compatible ASM51 R8051XC2 T8051 TSMC 0.35Um 80C515C ocds 0.35Um tsmc 8051 mcs51 TSMC 0.25Um MCS51
16-pin JTAG CONNECTOR

Abstract: Infineon tricore flash programming AP24001 wiggler OCDS Tricore* ocds DB25 LPT JTAG CONNECTOR 6 pin JTAG connector by industry standard SN74HC244
Text: TCLK 5 BRK_IN# GND 1 2 3 14 6 BRK_OUT# 7 OCDS_E# 82 Wiremount , A p p l i c a t io n N o t e , V 2 . 2 . 1 , J u ly 2 0 0 3 AP24001 OCDS Level 1 JTAG , t h i n k i n g . OCDS Level 1 JTAG Connector Revision History: 2003-07 V2 , ) to: ipdoc@infineon.com AP24001 OCDS Level1 JTAG Connector Introduction 1 Introduction , 13 14 OCDSE RCAP1 15 16 RCAP2 Figure 1 Connector Layout Application Note 3


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PDF AP24001 16-Bit 32-Bit SN74HC244N DB25-F 16-pin JTAG CONNECTOR Infineon tricore flash programming AP24001 wiggler OCDS Tricore* ocds DB25 LPT JTAG CONNECTOR 6 pin JTAG connector by industry standard SN74HC244
2003 - Tricore

Abstract: Tricore* ssc TC1130 C1130 44E-2
Text: F14 O I O I O I O PUC SWCFG7 OCDSA_7 MII_CRS SWCFG8 OCDSA_8 MII_COL SWCFG9 OCDSA_9 MII_RXD0 PUC SWCFG10 OCDSA_10 MII_RXD1 PUC SWCFG11 OCDSA_11 SLSO0_1 MII_RXD2 PUC SWCFG12 OCDSA_12 SLSO1_1 MII_RXD3 PUC SWCFG13 OCDSA_13 SLSO0_2 MII_RXER PUC PUC PUC SLSO1_2 SWCFG14 OCDSA_14 SLSI0 RMW SWCFG15 OCDSA_15 9 Ethernet Controller receive data valid , output OCDSB_1 OCDS L2 Debug Line B1 CC61_0 CCU1 input/output of capture/ compare channel 0 OCDSB_2


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PDF TC1130 32-Bit D-81541 Tricore Tricore* ssc TC1130 C1130 44E-2
2013 - Not Available

Abstract: No abstract text available
Text: DSPN IDC_P SYNCN CLKN AGND AGND AGND AGND AGND AGND OCDS1 OCDS0 NC N P DGND DSP IDC_N SYNC , PSS[2:0] SYNC, OCDS [1:0] SYNCN CLK, CLKN GA 2. Description The EV10DS130A is a 10-bit 3 , thanks to user friendly features as OCDS , PSS. It embeds different output modes (RTZ, NRZ, narrow RTZ , ], PSS[0.2], OCDS [0.1] Gain Adjustment function GA –0.3V, VCCA3 + 0.3 V Maximum , (Differential mode) (3) PCLK MUX, OCDS , PSS, MODE, PSS VIL VIH 0 VCCD V V Gain Adjustment


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PDF EV10DS130AZP 10-bit
2014 - Not Available

Abstract: No abstract text available
Text: CLOCK BUFFER DIODE 2 PSS[2:0] SYNC, OCDS [1:0] SYNCN CLK, CLKN GA 2. Description , interface with standard LVDS FPGAs thanks to user friendly features as OCDS , PSS. It embeds different , inputs VIL VIH MUX, MODE[0.1], PSS[0.2], OCDS [0.1] Gain Adjustment function GA â , clock input power level (Differential mode) Control functions inputs IUCM, MUX, OCDS , PSS, MODE , 1.64 Output bandwidth 4 6 GHz 4 FUNCTIONS Digital functions: MODE, OCDS , PSS, MUX 0


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PDF EV10DS130AG 10-bit 1090Bâ
2007 - aircon l1

Abstract: XE166 XE162 universal access device 2 uad2 SAF-XE164-96F66L ocds C166 INFINEON stepper motor interface with 8051 assembler code XE164 SAF-XE167-96F66L
Text: / linker and CrossView Pro Keil Software OCDS-L1 JTAG debugger for XC166 based products XE166 , OCDS-L1 ) Controller Price* [EURO] XE167 Easy Kit SAF-XE167-96F66L 129,- XE164 Easy Kit , / linker and CrossView Pro Keil Software OCDS-L1 JTAG debugger for XC166 based products XE166 , OCDS-L1 ) Controller Price* [EURO] XE167 Easy Kit SAF-XE167-96F66L 129,- XE164 Easy Kit , / linker and CrossView Pro Keil Software OCDS-L1 JTAG debugger for XC166 based products XE166


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PDF XE166 16-bit XC166, PG-LQFP-144 SAF-XE167G-72F66L XE167 SAF-XE167K-72F66L aircon l1 XE162 universal access device 2 uad2 SAF-XE164-96F66L ocds C166 INFINEON stepper motor interface with 8051 assembler code XE164 SAF-XE167-96F66L
2005 - tricore loader

Abstract: TC1796 multican 184CH TC1920 TC1912 TC1910 TC1765T-L40EB TC1765N-L40EB TC1130 TC1115
Text: MLI + 2xASC + 2xSSC + I²C - Packaging On-Chip Bootstrap Loader Watch-dog Timer OCDS / JTAG Power Managment System Ethernet CAN Real Time Clock Serial I/O EBU (DRAM) EBU , ,5V 48KB Core; 3,3V or 2x256 5V IO 93KB 1,5V 2x256 Core; 208KB 2MB Flash 3,3V IO OCDS 1+2 , 2xGPTA GPTU STM P-LBGA-208 OCDS 1 ! ! ! 3xASC+SSC+I2C+SDLM - TC1765T-L40U , - 2xASC 2xSSC SDLM 2xASC 2xSSC 2xMLI 2xMSC ! OCDS 1+2 P-BGA-329 ! MultiCAN


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PDF TC1100 32-bit P-LBGA-208 150MHz TC1115 144KB TC1130 TC11IDS P-BGA-388 tricore loader TC1796 multican 184CH TC1920 TC1912 TC1910 TC1765T-L40EB TC1765N-L40EB TC1130 TC1115
2009 - 8051 mcs51

Abstract: interface zigbee with 8051 parallel communication between two 8051 ocds uart with auto tuning baud rate generator block diagram for 8051 transmitter AND RECEIVER documentation for 16 bit alu using clock gating EP3C5F256C6 how to program for 8051 external memory T8051
Text: complete On-Chip Debug Support ( OCDS ) debugging system compatible with the industry-standard KeilTM , mm2 footprint) Total, with OCDS debug = 8.5K Dummy peripheral replacements for even lower gate , Function Registers interface Power Management Unit On Chip Debug Support ( OCDS ) March 2009 , memory interface can address up to 64kB of both Program Memory and External Data Memory. OCDS - On Chip Debug Support Serves as a debug interface through an IEEE1149.1 (JTAG) port. The OCDS unit


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PDF MCS51® T8051 8051-Compatible ASM51 R8051XC2 8051 mcs51 interface zigbee with 8051 parallel communication between two 8051 ocds uart with auto tuning baud rate generator block diagram for 8051 transmitter AND RECEIVER documentation for 16 bit alu using clock gating EP3C5F256C6 how to program for 8051 external memory T8051
2005 - ASC04

Abstract: transistor D400 circuit diagram application CCU61 transistor D400 ocds microprocessor bosch engine control module bosch DMI FUSE Cerberus OCDS C166 cerberus
Text: Software configuration 0 OCDSA_0 OCDS L2 Debug Line A0 SWCFG1 Software configuration 1 OCDSA_1 OCDS , configuration 3 OCDSA_3 OCDS L2 Debug Line A3 SWCFG4 Software configuration 4 OCDSA_4 OCDS L2 Debug Line , 6 OCDSA_6 OCDS L2 Debug Line A6 SWCFG7 Software configuration 7 OCDSA_7 OCDS L2 Debug Line A7 SWCFG8 Software configuration 8 OCDSA_8 OCDS L2 Debug Line A8 SWCFG9 Software configuration 9 OCDSA_9 , channel 0 OCDSB_2 OCDS L2 Debug Line B2 COUT61_0 CCU61 output of capture/compare channel 0 OCDSB_3


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PDF TC1100 32-Bit P-LBGA-208-2 P-LBGA-208-2 ASC04 transistor D400 circuit diagram application CCU61 transistor D400 ocds microprocessor bosch engine control module bosch DMI FUSE Cerberus OCDS C166 cerberus
2012 - Not Available

Abstract: No abstract text available
Text: SHIFT CLOCK DIV/X CLOCK BUFFER DIODE 2 PSS[2:0] SYNC, OCDS [1:0] SYNCN CLK, CLKN , , allowing easy interface with standard LVDS FPGAs thanks to user friendly features as OCDS , PSS. It embeds , , CLKN Control functions inputs VIL VIH MUX, MODE[0.1], PSS[0.2], OCDS [0.1] -0.4V VCCD , 0 VCCA3 Tc>-55°C / Tj< 125°C Tc>-55°C / Tj< 125°C V V Symbol Comments MUX, OCDS , FUNCTIONS Digital functions: MODE, OCDS , PSS, MUX - Logic 0 - Logic 1 Digital output function (HTVF


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PDF EV10DS130AGS 10-bit Clo42
1998 - debugging emulation support ocds

Abstract: siemens jtag connector Tricore
Text: adaptation available Full support of both OCDS levels Large real-time trace buffer Timestamps and , TriCore toolchain follows the given possibilities of OCDS ­ the On Chip Debug Support provided by , support In addition to Level 1 this level offers: Debug support up to 100 MHz with full OCDS , Entry-Level: DProbeTriCore Level 1 Reflecting the OCDS level the D-family for TriCore starts with an , OCDS level-1. Our well-known Debugger HiTOP can offer unlimited software breakpoints, four hardware


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PDF ELF/DWARF/IEEE695 D-85386 Sep9-001 CV47EZ debugging emulation support ocds siemens jtag connector Tricore
2008 - bosch MA 3.1 ecu map wiring 37 pin

Abstract: BOSCH ECU microprocessor bosch ecu datasheet 2108H Tricore CERBERUS ocds bosch MA 3.0 ecu map wiring 37 pin PA-DSO-2803-D420-28/OCDS ecu bosch DMI FUSE
Text: MII_CRS SWCFG8 OCDSA_8 MII_COL SWCFG9 OCDSA_9 MII_RXD0 PUC SWCFG10 OCDSA_10 MII_RXD1 PUC SWCFG11 OCDSA_11 SLSO0_1 MII_RXD2 PUC SWCFG12 OCDSA_12 SLSO1_1 MII_RXD3 PUC SWCFG13 OCDSA_13 SLSO0_2 MII_RXER PUC PUC PUC SLSO1_2 SWCFG14 OCDSA_14 SLSI0 RMW SWCFG15 , OCDSB_6 OCDS L2 Debug Line B6 COUT61_2 CCU61 output of capture/compare channel 2 OCDSB_7 OCDS L2 , RXDCAN0_B CAN node 0 receiver input B SWCFG0 Software configuration 0 OCDSA_0 OCDS L2 Debug Line A0


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PDF TC1130 32-Bit P-LBGA-208-2 P-LBGA-208-2 bosch MA 3.1 ecu map wiring 37 pin BOSCH ECU microprocessor bosch ecu datasheet 2108H Tricore CERBERUS ocds bosch MA 3.0 ecu map wiring 37 pin PA-DSO-2803-D420-28/OCDS ecu bosch DMI FUSE
2009 - interface zigbee with 8051

Abstract: parallel communication between two 8051 how to program for 8051 external memory internal and external memories of 8051 memory zigbee interface with 8051 VIRTEX-5 8051 block alu 8051 uart with auto tuning baud rate generator serial communication between 8051 mcs51
Text: scan insertion is straightforward. A complete On-Chip Debug Support ( OCDS ) debugging system , ( OCDS ) June 2009 Functional Description The T8051 core is partitioned into modules as shown in , . The memory interface can address up to 64kB of both Program Memory and External Data Memory. OCDS - On Chip Debug Support Serves as a debug interface through an IEEE1149.1 (JTAG) port. The OCDS unit , 's UART (Serial Port 1) interface. The included JTAG-accessible OCDS facilitates firmware (algorithm


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PDF MCS51® T8051 8051-Compatible ASM51 R8051XC2 interface zigbee with 8051 parallel communication between two 8051 how to program for 8051 external memory internal and external memories of 8051 memory zigbee interface with 8051 VIRTEX-5 8051 block alu 8051 uart with auto tuning baud rate generator serial communication between 8051 mcs51
2005 - CERBERUS ocds

Abstract: transistor D400 pin diagram application TC1115 DATA SHEET OF D400 transistor transistor D400 PMSM data sheet microprocessor bosch DMI FUSE cerberus AD17
Text: O I O SWCFG7 OCDSA_7 SWCFG8 OCDSA_8 SWCFG9 OCDSA_9 SWCFG10 OCDSA_10 SWCFG11 OCDSA_11 SLSO0_1 SWCFG12 OCDSA_12 SLSO1_1 SWCFG13 OCDSA_13 SLSO0_2 SLSO1_2 SWCFG14 OCDSA_14 SLSI0 RMW , OCDSA_3 OCDS L2 Debug Line A3 SWCFG4 Software configuration 4 OCDSA_4 OCDS L2 Debug Line A4 SWCFG5 Software configuration 5 OCDSA_5 OCDS L2 Debug Line A5 SWCFG6 Software configuration 6 OCDSA_6 OCDS , 0 OCDSB_2 OCDS L2 Debug Line B2 COUT61_0 CCU61 output of capture/compare channel 0 OCDSB_3


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PDF TC1115 32-Bit P-LBGA-208-2 P-LBGA-208-2 CERBERUS ocds transistor D400 pin diagram application TC1115 DATA SHEET OF D400 transistor transistor D400 PMSM data sheet microprocessor bosch DMI FUSE cerberus AD17
2005 - R80515 evatronix

Abstract: alarm clock verilog code siemens 80c515 verilog code for i2c communication fpga 80C517 R8051XC-A vhdl code for i2c Slave vhdl code for branch metric unit r8051x vhdl code for spi
Text: and real-time clock. Integrated on-chip debugging using either the native OCDS or FS2's OCI is also , (IDLE and STOP) Interface for on-chip debug: native On-Chip Debug Support ( OCDS Direct Memory Access , , 1, or 2 SPI master-slave interface: yes or no On-chip debug support: OCDS , FS2 OCI, or none For OCDS : Number of hardware breakpoints: 2 to 8 Program trace: yes or no Data & program trace: yes or , R8051XC CPU DMA OCDS On Chip Memory/SFR Interface OCI Interface OCDS Interface TimerO


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PDF R8051XC R8051XC 80C51. R8051XC-B 80C515 80C517, R8051XC-F R8051XC-B R8051XC-DSN-1HV28F26S00-200 R80515 evatronix alarm clock verilog code siemens 80c515 verilog code for i2c communication fpga 80C517 R8051XC-A vhdl code for i2c Slave vhdl code for branch metric unit r8051x vhdl code for spi
2003 - cerberus CC62 manual

Abstract: CC-612
Text: MII_RXDV SWCFG7 OCDSA_7 MII_CRS SWCFG8 OCDSA_8 MII_COL SWCFG9 OCDSA_9 MII_RXD0 SWCFG10 OCDSA_10 MII_RXD1 SWCFG11 OCDSA_11 SLSO0_1 MII_RXD2 SWCFG12 OCDSA_12 SLSO1_1 MII_RXD3 SWCFG13 OCDSA_13 SLSO0_2 MII_RXER , PUC Functions OCDSB_11 TDATA1 SLSO0_7 CC61_T12HR OCDSB_12 RCLK1 SLSO1_7 CC61_T13HR OCDSB_13 RREADY1 MRST1B OCDSB_14 RVALID1 MTSR1B OCDSB_15 RDATA1 SCLK1B OCDS L2 Debug Line B11 MLI1 transmit channel data , OCDSB_4 OCDS L2 Debug Line B4 COUT61_1 CCU1 output of capture/compare channel 1 OCDSB_5 OCDS L2 Debug


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PDF 32-Bit TC1130 D-81541 TC1130 ap3200710 ap3208110 cerberus CC62 manual CC-612
2012 - EV12DS130AGS

Abstract: EV12DS130Amgs EV12DS130A EV12DS130 CI-CGA255 NTK 025 EV12AS130A 3dfs 45
Text: 2 PSS[2:0] SYNC, OCDS [1:0] SYNCN CLK, CLKN GA 2. Description The EV12DS130A is a 12-bit 3 GSps , to user friendly features as OCDS , PSS. It embeds different output modes (RTZ, NRZ, narrow RTZ, RF , 2.45 12 V V Vpp dBm PCLK MUX, IUCM, MODE[0.1], PSS[0.2], OCDS [0.1] GA Tj Tstg ­0.4V VCCD + , C0.C11, C0N.C11N D0.D11, D0N.D11N IDC_P, IDC_N CLK, CLKN PCLK IUCM, MUX, OCDS , PSS, MODE, PSS GA Tc = , functions: MODE, OCDS , PSS, MUX - Logic 0 - Logic 1 Gain Adjustment function Digital output function (HTVF


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PDF EV12DS130AGS 12-bit 1080B EV12DS130AGS EV12DS130Amgs EV12DS130A EV12DS130 CI-CGA255 NTK 025 EV12AS130A 3dfs 45
2013 - Not Available

Abstract: No abstract text available
Text: TIMING DSP CLOCK PHASE SHIFT CLOCK DIV/X CLOCK BUFFER DIODE 2 PSS[2:0] SYNC, OCDS [1 , features as OCDS , PSS. It embeds different output modes (RTZ, NRZ, narrow RTZ, RF) that allows performance , , CLKN Control functions inputs VIL VIH MUX, MODE[0.1], PSS[0.2], OCDS [0.1] Gain , inputs IUCM, MUX, OCDS , PSS, MODE, PSS VIL VIH 0 VCCD V V GA Range 0 VCCA3 , FUNCTIONS Digital functions: MODE, OCDS , PSS, MUX - Logic 0 VIH 0 1.6 V µA VCCD IIN


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PDF EV12DS130AG 12-bit 1080Eâ
2005 - Not Available

Abstract: No abstract text available
Text: configuration 0 OCDSA_0 OCDS L2 Debug Line A0 SWCFG1 Software configuration 1 OCDSA_1 OCDS L2 Debug Line , 3 OCDSA_3 OCDS L2 Debug Line A3 SWCFG4 Software configuration 4 OCDSA_4 OCDS L2 Debug Line A4 SWCFG5 Software configuration 5 OCDSA_5 OCDS L2 Debug Line A5 SWCFG6 Software configuration 6 OCDSA_6 , Software configuration 8 OCDSA_8 OCDS L2 Debug Line A8 SWCFG9 Software configuration 9 OCDSA_9 OCDS , OCDSB_3 OCDS L2 Debug Line B3 CC61_1 CCU61 input/output of capture/ compare channel 1 OCDSB_4 OCDS


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PDF TC1100 32-Bit P-LBGA-208-2 P-LBGA-208-2
2014 - Not Available

Abstract: No abstract text available
Text: TIMING DSP CLOCK PHASE SHIFT CLOCK DIV/X CLOCK BUFFER DIODE 2 PSS[2:0] SYNC, OCDS [1 , features as OCDS , PSS. It embeds different output modes (RTZ, NRZ, narrow RTZ, RF) that allows performance , , CLKN Control functions inputs VIL VIH MUX, MODE[0.1], PSS[0.2], OCDS [0.1] Gain , inputs IUCM, MUX, OCDS , PSS, MODE, PSS VIL VIH 0 VCCD V V GA Range 0 VCCA3 , Digital functions: MODE, OCDS , PSS, MUX 0 VIL - Logic 1 VIH - Input Current IIN Gain


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PDF EV12DS130AG 12-bit 1080Fâ
2012 - Not Available

Abstract: No abstract text available
Text: PHASE SHIFT CLOCK DIV/X CLOCK BUFFER DIODE 2 PSS[2:0] SYNC, OCDS [1:0] SYNCN CLK , multiplexer, allowing easy interface with standard LVDS FPGAs thanks to user friendly features as OCDS , PSS , 12 dBm MUX, IUCM, MODE[0.1], PSS[0.2], OCDS [0.1] –0.4V VCCD + 0.4 V V GA , 3 dBm 0 VCCD V V IUCM, MUX, OCDS , PSS, MODE, PSS VIL VIH GA Range Tc = , functions: MODE, OCDS , PSS, MUX - Logic 0 VIH Gain Adjustment function 0 VIL - Logic 1 GA


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PDF EV12DS130AGS 12-bit
2000 - easy utah

Abstract: reference design using infineon jtag rs232 Infineon USB microcontroller h9412 c165utah h941 c166 programming c ocds C165
Text: Chip Debug System ( OCDS ) 1 MByte XDATA RAM 512 kByte FLASH memory All controller signals bonded on , traffic generation (Windows 98) Demo versions of OCDS debuggers and C-compilers from various tool , prototyping purposes. There are two connectors to the JTAG interface for OCDS debugging. One is a , Power supply for US and Europe RS232-interface cable Printerport cable (for OCDS demo debugger) USB


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PDF C165UTAH, C165UTAH easy utah reference design using infineon jtag rs232 Infineon USB microcontroller h9412 h941 c166 programming c ocds C165
2005 - 2108H BOSCH ECU

Abstract: transistor D400 pin diagram application D400 transistor TC1130 AD17 transistor D400 microprocessor bosch micro controllers data sheet engine control module bosch BOSCH ECU information
Text: PUC SWCFG7 OCDSA_7 MII_CRS SWCFG8 OCDSA_8 MII_COL SWCFG9 OCDSA_9 MII_RXD0 PUC SWCFG10 OCDSA_10 MII_RXD1 PUC SWCFG11 OCDSA_11 SLSO0_1 MII_RXD2 PUC SWCFG12 OCDSA_12 SLSO1_1 MII_RXD3 PUC SWCFG13 OCDSA_13 SLSO0_2 MII_RXER PUC PUC PUC SLSO1_2 SWCFG14 OCDSA_14 , OCDSB_4 OCDS L2 Debug Line B4 COUT61_1 CCU61 output of capture/compare channel 1 OCDSB_5 OCDS L2 , RXDCAN0_B CAN node 0 receiver input B SWCFG0 Software configuration 0 OCDSA_0 OCDS L2 Debug Line A0


Original
PDF TC1130 32-Bit P-LBGA-208-2 P-LBGA-208-2 2108H BOSCH ECU transistor D400 pin diagram application D400 transistor TC1130 AD17 transistor D400 microprocessor bosch micro controllers data sheet engine control module bosch BOSCH ECU information
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