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Part Manufacturer Supplier Stock Best Price Price Each Buy Part
NB3N853501EDTG ON Semiconductor Avnet - $6.19 $5.89
NB3N853501EDTG ON Semiconductor Avnet - €7.09 €5.89
NB3N853501EDTG ON Semiconductor Future Electronics - $7.69 $6.15
NB3N853501EDTG ON Semiconductor Rochester Electronics 206 $9.65 $7.84
NB3N853501EDTR2G ON Semiconductor Avnet - $6.19 $5.89
NB3N853501EDTR2G ON Semiconductor Avnet - $9.60 $7.87
NB3N853501EDTR2G ON Semiconductor Future Electronics - $6.15 $6.15
NB3N853501EDTR2G ON Semiconductor Rochester Electronics 10,000 $9.65 $7.84
NB3N853501EDTR2G ON Semiconductor Wuhan P&S 1,700 $8.80 $6.37

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NB3N853501E datasheet (2)

Part Manufacturer Description Type PDF
NB3N853501EDTG On Semiconductor NB3N853501 - IC 3N SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20, LEAD FREE, TSSOP-20, Clock Driver Original PDF
NB3N853501EDTR2G On Semiconductor NB3N853501 - IC 3N SERIES, LOW SKEW CLOCK DRIVER, 4 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PDSO20, LEAD FREE, TSSOP-20, Clock Driver Original PDF

NB3N853501E Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2011 - NB3N853501E

Abstract: No abstract text available
Text: NB3N853501E 3.3 V LVTTL/LVCMOS 2:1 MUX to 4 LVPECL Differential Clock Fanout Buffer Outputs with Clock Enable and Clock Select Description http://onsemi.com MARKING DIAGRAM The NB3N853501E is a , : NB3N853501E /D NB3N853501E Q0 Q0 VCC 15 VCC 14 Q2 13 Q2 12 V CC 11 nc 6 CLK_SEL 7 CLK0 8 nc 9 CLK1 10 nc , in Figure 3. http://onsemi.com 2 NB3N853501E Figure 3. CLK_EN TIMING DIAGRAM Table 3 , signal, 2 power). http://onsemi.com 3 NB3N853501E Table 5. DC CHARACTERISTICS VCC = 3.3 ±5% V


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PDF NB3N853501E TSSOP-20 30cable NB3N853501E/D
2011 - NB3N853501E

Abstract: No abstract text available
Text: NB3N853501E 3.3 V LVTTL/LVCMOS 2:1 MUX to 4 LVPECL Differential Clock Fanout Buffer Outputs , NB3N853501E is a pure 3.3 V supply 2:1:4 clock distribution fanout buffer. Input MUX selects one of two , Publication Order Number: NB3N853501E /D NB3N853501E VEE 1 20 Q0 CLK_EN 2 19 Q0 , in Figure 3. http://onsemi.com 2 NB3N853501E Figure 3. CLK_EN TIMING DIAGRAM Table 3 , board − 2S2P (2 signal, 2 power). http://onsemi.com 3 NB3N853501E Table 5. DC CHARACTERISTICS


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PDF NB3N853501E NB3N853501E NB3N853501E/D
2011 - NB3N853501E

Abstract: No abstract text available
Text: Device NB3N853501EDTG NB3N853501EDTR2G Package TSSOP-20 (Pb-Free) TSSOP-20 (Pb-Free) Shipping 75 Units , NB3N853501E 3.3 V LVTTL/LVCMOS 2:1 MUX to 4 LVPECL Differential Clock Fanout Buffer Outputs with Clock Enable and Clock Select Description http://onsemi.com MARKING DIAGRAM The NB3N853501E is a , : NB3N853501E /D NB3N853501E VEE CLK_EN CLK_SEL CLK0 nc CLK1 nc nc nc VCC 1 2 3 4 5 6 7 8 9 10 20 19 18 17 , NB3N853501E Figure 3. CLK_EN TIMING DIAGRAM Table 3. ATTRIBUTES (Note 2) Characteristics Internal Input


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PDF NB3N853501E TSSOP-20 30cable NB3N853501E/D
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