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Part Manufacturer Description Datasheet Download Buy Part
LT1025ACJ8 Linear Technology T.C. COLD JUNCTION COMPENSATOR
LT1025CS8#PBF Linear Technology LT1025 - Micropower Thermocouple Cold Junction Compensator; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LT1025CN8 Linear Technology LT1025 - Micropower Thermocouple Cold Junction Compensator; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C
LT1025CN8#PBF Linear Technology LT1025 - Micropower Thermocouple Cold Junction Compensator; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C
LT1025CS8#TRPBF Linear Technology LT1025 - Micropower Thermocouple Cold Junction Compensator; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LT1025ACN8 Linear Technology LT1025 - Micropower Thermocouple Cold Junction Compensator; Package: PDIP; Pins: 8; Temperature Range: 0°C to 70°C

N Channel Junction FET Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
XR2271

Abstract: XR-2271 XR2271CP XR 2271 1468cn 12V fluo XR-1489 1468 cn XR2271CN XR1468CN
Text: output pull down resistance is an N channel junction FET . For Vo * V - it is resistive, and for |Vo (V - , EXAR CORP XR-494 91D 04470 D NON-INV n fT - r , H * O S DEAD TIME 4 f T T CONTROL 1 11 I cT s r r n l i - i . . OUTPUT 11 I CONTROL Z013 + , Current, Peak ± 100 mA Power Dissipation Ceramic ( N ) Package 1.0 Watt Derate Above + 25°C 6.7 mW/°C


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PDF XR-2271 XR-2271 XR-1568M XR-1568/XR-1468C XR-1468/1568 XR2271 XR2271CP XR 2271 1468cn 12V fluo XR-1489 1468 cn XR2271CN XR1468CN
1999 - P-Channel Depletion Mosfets

Abstract: shockley diode P-Channel Depletion Mode FET shockley diode application shockley diode datasheet n channel depletion MOSFET list of n channel fet jfet idss 10 ma vp -3 diode shockley P-Channel Depletion Mode Field Effect Transistor
Text: form a semiconductor junction on the channel of a FET to achieve gate control of the channel current , field-effect transistors). Junction FETs are inherently depletion-mode devices, and are available in both n , also exist as both n - and p-channel devices. The two main FET groups depend on different phenomena for , junction formed along the channel . Implicit in this description is the fundamental difference between JFET , Channel N-Drain S D P N Depletion Layer P N-Channel P-Gate G Final form taken by


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PDF AN101 P-Channel Depletion Mosfets shockley diode P-Channel Depletion Mode FET shockley diode application shockley diode datasheet n channel depletion MOSFET list of n channel fet jfet idss 10 ma vp -3 diode shockley P-Channel Depletion Mode Field Effect Transistor
1995 - P-Channel Depletion Mode FET

Abstract: p channel depletion mosfet an101 siliconix N-Channel JFET FETs n channel depletion MOSFET JFETs Junction FETs list of n channel fet Junction FETs JFETs depletion Depletion MOSFET
Text: Channel NDrain S D P N Depletion Layer P NChannel PGate Final form taken by FET with ntype channel embedded in ptype substrate. Figure 2. Idealized Structure of An NChannel Junction , to form a semiconductor junction on the channel of a FET in order to achieve gate control of the , enhancement and depletion modes, and also exist as both n and pchannel devices. The two main FET groups , . FET Family Tree (07/11/94) 1 AN101 Siliconix In addition to the channel material, a JFET


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PDF AN101 P-Channel Depletion Mode FET p channel depletion mosfet an101 siliconix N-Channel JFET FETs n channel depletion MOSFET JFETs Junction FETs list of n channel fet Junction FETs JFETs depletion Depletion MOSFET
1996 - p channel depletion mosfet

Abstract: list of n channel fet P-Channel Depletion Mode FET shockley diode Depletion MOSFET 6D n channel depletion MOSFET list of n channel MOSFET P-Channel Depletion Mode Field Effect Transistor P-Channel Depletion Mosfets depletion p mosfet
Text: to form a semiconductor junction on the channel of a FET in order to achieve gate control of the , junction formed along the channel . Implicit in this description is the fundamental difference between JFET , Figure 1. FET Family Tree Siliconix 11-Jul1­94 1 AN101 In addition to the channel material, a , which the maximum IDSS flows. VDS < VP Channel S N-Source D P N N-Drain Depletion Layer P G N-Channel P-Gate Final form taken by FET with n-type channel embedded in p-type


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PDF AN101 p channel depletion mosfet list of n channel fet P-Channel Depletion Mode FET shockley diode Depletion MOSFET 6D n channel depletion MOSFET list of n channel MOSFET P-Channel Depletion Mode Field Effect Transistor P-Channel Depletion Mosfets depletion p mosfet
P-Channel Depletion Mode FET

Abstract: P-Channel Depletion Mosfets P-Channel Depletion Mode Field Effect Transistor P-Channel Depletion mosFET n channel depletion MOSFET N-Channel JFET FETs Siliconix JFET application note list of n channel fet shockley diode p channel depletion mosfet
Text: Cross-Section N ­ Source Gate The lateral DMOS FET differs radically in its channel construction when , field-effect transistors). Junction FETs are inherently depletion-mode devices, and are available in both n , also exist as both n - and p-channel devices. The two main FET groups depend on different phenomena for , junction formed along the channel . Implicit in this description is the fundamental difference between JFET , which the maximum IDSS flows. VDS < VP N-Source N-Drain Channel S D P N Depletion


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PDF AN101 P-Channel Depletion Mode FET P-Channel Depletion Mosfets P-Channel Depletion Mode Field Effect Transistor P-Channel Depletion mosFET n channel depletion MOSFET N-Channel JFET FETs Siliconix JFET application note list of n channel fet shockley diode p channel depletion mosfet
1993 - AN211A

Abstract: MPF102 JFET MPF102 equivalent transistor MPF102 Transistor MPF102 JFET data sheet 2N3797 mpf102 fet 2N3797 equivalent mpf102 equivalent P channel 2N4221 motorola
Text: P-CHANNEL MOSFET ID N MOS FIELD-EFFECT TRANSISTORS (MOSFET) P (SUBSTRATE) P L CHANNEL CHANNEL LENGTH Figure 3. Junction FET with Single-Ended Geometry SOURCE N P (SUBSTRATE) (a) OXIDE , JFET SOURCE JUNCTION FIELD-EFFECT TRANSISTOR (JFET) P P SOURCE N DRAIN N , + ­­­­­­­­­ N + N + INDUCED CHANNEL P (SUBSTRATE) Figure 5. Channel Enhancement , . Notice that for the junction FET , drain current may be enhanced by forward gate voltage only until the


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PDF AN211A/D AN211A AN211A MPF102 JFET MPF102 equivalent transistor MPF102 Transistor MPF102 JFET data sheet 2N3797 mpf102 fet 2N3797 equivalent mpf102 equivalent P channel 2N4221 motorola
1993 - 2N3797

Abstract: MPF102 equivalent transistor MPF102 JFET mpf102 fet 2N4221 motorola 2N3797 equivalent MPF102 Transistor mpf102 application note P-Channel Depletion Mode FET JFET TRANSISTOR REPLACEMENT GUIDE
Text: TRANSISTORS (MOSFET) P (SUBSTRATE) P L CHANNEL CHANNEL LENGTH Figure 3. Junction FET with , oxide layer serves as a protective coating for the FET surface and to insulate the channel from the , + ­­­­­­­­­ N + N + INDUCED CHANNEL P (SUBSTRATE) Figure 5. Channel Enhancement , . Notice that for the junction FET , drain current may be enhanced by forward gate voltage only until the gate-source p-n junction becomes forward biased. The third type of FET operates only in the enhancement


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PDF AN211A/D AN211A 2N3797 MPF102 equivalent transistor MPF102 JFET mpf102 fet 2N4221 motorola 2N3797 equivalent MPF102 Transistor mpf102 application note P-Channel Depletion Mode FET JFET TRANSISTOR REPLACEMENT GUIDE
1993 - MPF102 JFET

Abstract: motorola AN211A 2N3797 2N4221 MOTOROLA POWER TRANSISTOR MPF102 Transistor 2N4221 motorola JFET with Yos MPF102 circuit application 2N4351 MOTOROLA igfet
Text: current in the 2 GATE P (SUBSTRATE) P L CHANNEL CHANNEL LENGTH Figure 3. Junction FET with Single-Ended Geometry SOURCE DRAIN N N P (SUBSTRATE) P (SUBSTRATE) (a , - N + INDUCED CHANNEL N + Freescale Semiconductor, Inc. P (SUBSTRATE) Figure 5 , large gate voltages. Notice that for the junction FET , drain current may be enhanced by forward gate voltage only until the gate-source p-n junction becomes forward biased. The third type of FET operates


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PDF AN211A/D AN211A MPF102 JFET motorola AN211A 2N3797 2N4221 MOTOROLA POWER TRANSISTOR MPF102 Transistor 2N4221 motorola JFET with Yos MPF102 circuit application 2N4351 MOTOROLA igfet
2000 - MPF102 equivalent transistor

Abstract: MPF102 JFET AN211A mpf102 fet 2N3797 2N3797 equivalent 2N4351 MPF102 Transistor P-Channel Depletion Mode FET mpf102 application note
Text: into the channel until they meet, È È È È È È N (a) (-) P P N DRAIN SOURCE ÈÇÇÈ ÇÇÇ ÇÇÇ È , ËËËËËËËË ËËËË ËËËËËËËË ËËËË ËËËËËËËË ËËËË ËËËËËËËË ËËËË P P (SUBSTRATE) ID N P L CHANNEL LENGTH MOS , for the FET surface and to insulate the channel from the gate. However, the oxide is subject to , connected back to back. Figure 3. Junction FET with Single-Ended Geometry http://onsemi.com 2 , EnhancementMode MOSFET ÍÍÍÍÍÍÍÍÍÍÍÍÍ ÍÍÍÍÍÍÍÍÍÍÍÍÍ N + N + Figure 5. Channel Enhancement. Application of


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PDF AN211A/D r14525 AN211A/D MPF102 equivalent transistor MPF102 JFET AN211A mpf102 fet 2N3797 2N3797 equivalent 2N4351 MPF102 Transistor P-Channel Depletion Mode FET mpf102 application note
P-Channel Depletion Mode FET

Abstract: P-Channel Depletion-Mode FET E202 2N3631 Junction FETs JFETs 2N3823 E202 P-Channel Depletion Mosfets 2N3329 2N2606
Text: necessary to form a semiconductor junction on the channel of a FET in order to achieve gate control of the , incorporated 6-10 Junction FET Capacitances Associated with the junction between the gate and the channel of a , enhancement or depletion modes, and exist as both N - and P-Channel devices. The two main FET groups depend on , a reverse-biased PN junction formed along the channel . Implicit in this description is the fundamental difference between FET and bipolar devices: when the FET junction is reverse-biased the gate


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2006 - fZ80

Abstract: C5750X7R1H106M TOSW24 TSSOP-28 Si4850EY LM5642XMT LM5642X LM5642MTC LM5642 AN-1229
Text: dual-phase, single output regulator. The output of each channel can be independently adjusted from 1.3V to , response to fast load transients. Current is sensed across either the Vds of the top FET or across an external currentsense resistor connected in series with the drain of the top FET . The LM5642 features , soft-start behavior more predictable and controllable than traditional soft-start circuits. n n n n n , off time for the IC during an output under-voltage event. n n n n n n n n n n n n n n


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PDF LM5642/LM5642X LM5642 200kHz 375kHz LM5642X. 150kHz 250kHz LM5642 fZ80 C5750X7R1H106M TOSW24 TSSOP-28 Si4850EY LM5642XMT LM5642X LM5642MTC AN-1229
Not Available

Abstract: No abstract text available
Text: INTEGRATED CIRCUIT TPD7000F 4- CHANNEL LOW -SIDE POW ER M O S FET DRIVER TPD7000F is a power MOS FET driver for low-side switching. This 4- channel driver with a built-in circuit is used to monitor the voltage between the MOS FET drain and source for each channel and to output the state of the power MOS FET . FEATURES • Low-side N-channel power MOS FET driver (input capacitance: 15nF Max). • Incorporates a power MOS FET overcurrent protection function. • Incorporates induction load energy


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PDF TPD7000F TPD7000F 24-pin SSOP24-P-300-1
2006 - lm2642

Abstract: No abstract text available
Text: either the Vds of the top FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is independently adjustable for each channel . The LM2642 features , either channel generate unwanted Ldi/dt noise spikes at the source node of the FET (SWx node) and also , FET as apply to the bottom FET . Loop Compensation where Tj_max is the maximum allowed junction , also be paralleled to operate as a dual-phase single output regulator. The output of each channel can


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PDF LM2642 LM2642 SNVS203H 300kHz.
2005 - LM5642

Abstract: BAS40-06 LM5642MTC RLF12545T-100M5R1 RLF12560T-4R2N100 Si4840DY Si4850EY TSSOP-28
Text: allowed junction temperature in the FET , Ta_max is the maximum ambient temperature, Rja is the , operating 180° out of phase with each other at a normal switching frequency of 200kHz. n Two synchronous buck regulators n 180° out of phase operation n Synchronizable switching frequency from 150kHz to 250kHz n 4.5V to 36V input range n 50µA Shutdown current n Adjustable output from 1.3V to 90% of Vin n 0.04% (typical) line and load regulation error n Current mode control with or without a sense


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PDF LM5642 LM5642 200kHz. 150kHz 250kHz CSP-9-111S2) CSP-9-111S2. BAS40-06 LM5642MTC RLF12545T-100M5R1 RLF12560T-4R2N100 Si4840DY Si4850EY TSSOP-28
2006 - LM2642

Abstract: LM2642MTC
Text: frequency of 300kHz. n n n n n n n n The two switching regulator controllers operate 180° out , dual-phase single output regulator. The output of each channel can be independently adjusted from 1.3 to , top FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is independently adjustable for each channel . The LM2642 features analog soft-start , monitor the dc output of channel 1. Over-voltage protection is available for both outputs. A UV-Delay pin


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PDF LM2642 LM2642 300kHz. CSP-9-111S2. LM2642MTC
2003 - SI4470DY

Abstract: LM5642MTC Si4840DY Si4850EY TSSOP-28 BAS40-06 LM5642 RLF12545T-100M5R1 RLF12560T-4R2N100
Text: . (25) where Tj_max is the maximum allowed junction temperature in the FET , Ta_max is the maximum , operating 180° out of phase with each other at a normal switching frequency of 200kHz. n Two synchronous buck regulators n 180° out of phase operation n Synchronizable switching frequency from 150kHz to 250kHz n 4.5V to 36V input range n 50µA Shutdown current n Adjustable output from 1.3V to 90% of Vin n 0.04% (typical) line and load regulation error n Current mode control with or without a sense


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PDF LM5642 LM5642 200kHz. 150kHz 250kHz SI4470DY LM5642MTC Si4840DY Si4850EY TSSOP-28 BAS40-06 RLF12545T-100M5R1 RLF12560T-4R2N100
1999 - pHfet

Abstract: No abstract text available
Text: Channel 1 or 2 ROSC Oscillator Resistor GATE(H)1, GATE(H)2 High-Side FET Driver for Channel 1 or 2 GATE(L)1, GATE(L)2 Low-Side FET Driver for Channel 1 or 2 PGnd1 Power Ground for Channel 1 PGnd2 Power Ground for Channel 2 SGnd Ground for Internal Reference LGnd Logic Ground Operating Junction , GATE(H)1 GATE(L)1 PGnd1 LGnd SGnd VFFB1 VFB1 COMP1 High Side Switch FET driver pin for the channel 1 FET . Low Side Synchronous FET driver pin for the channel 1 FET . High Current ground for the GATE(H)1


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PDF CS5421 CS5421 MS-012 CS5421GD16 CS5421GDR16 pHfet
2003 - LM5642MTC

Abstract: BAS40-06 LM5642 RLF12545T-100M5R1 RLF12560T-4R2N100 Si4840DY Si4850EY TSSOP-28
Text: . (25) where Tj_max is the maximum allowed junction temperature in the FET , Ta_max is the maximum , operating 180° out of phase with each other at a normal switching frequency of 200kHz. n Two synchronous buck regulators n 180° out of phase operation n Synchronizable switching frequency from 150kHz to 250kHz n 4.5V to 36V input range n 50µA Shutdown current n Adjustable output from 1.3V to 90% of Vin n 0.04% (typical) line and load regulation error n Current mode control with or without a sense


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PDF LM5642 LM5642 200kHz. 150kHz 250kHz LM5642MTC BAS40-06 RLF12545T-100M5R1 RLF12560T-4R2N100 Si4840DY Si4850EY TSSOP-28
2002 - LM2642

Abstract: LM2642MTC
Text: maximum allowed junction temperature in the FET , Ta_max is the maximum ambient temperature, Rja is the , frequency of 300kHz. n n n n n n n n n The two switching regulator controllers operate 180 , dual-phase single output regulator. The output of each channel can be independently adjusted from 1.3 to , response to fast load transients. Current is sensed across either the Vds of the top FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is


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PDF LM2642 LM2642 300kHz. LM2642MTC
2004 - LM2642

Abstract: LM2642MTC
Text: guidelines apply to the top FET as apply to the bottom FET . where Tj_max is the maximum allowed junction , frequency of 300kHz. n n n n n n n n The two switching regulator controllers operate 180° out , dual-phase single output regulator. The output of each channel can be independently adjusted from 1.3 to , top FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is independently adjustable for each channel . The LM2642 features analog soft-start


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PDF LM2642 LM2642 300kHz. LM2642MTC
2003 - LM2642

Abstract: LM2642MTC
Text: is the maximum allowed junction temperature in the FET , Ta_max is the maximum ambient temperature , frequency of 300kHz. n n n n n n n n The two switching regulator controllers operate 180° out , dual-phase single output regulator. The output of each channel can be independently adjusted from 1.3 to , top FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is independently adjustable for each channel . The LM2642 features analog soft-start


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PDF LM2642 LM2642 300kHz. LM2642MTC
2001 - LM2645MTD

Abstract: MTD48 LM2645
Text: FET . Current limit is independently adjustable for each channel . The analog soft-start for the , Two channels operating 180° out of phase n Separate on/off for each channel n Separate Power Good , n Skip-mode operation available n Negative current limit n Separate soft start for each channel n , is user selectable between 200 kHz or 300 kHz. The first switching controller ( Channel 1) features a fixed 5V output, and the second switching controller controller ( Channel 2) features a fixed 3.3V


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PDF LM2645 LM2645 LM2645MTD MTD48
2006 - LM27222

Abstract: LM27212 LM27212MTD LM27212MTDX LM27212SQ LM27212SQX MTD48 63M4 0828V
Text: of the bottom power FET . Pin 36, OUT2: Channel 2 pulse output to control the switching of the , 45, NC: No connect. Pin 46, SRCK1: Kelvin connect to Channel 1 bottom FET source node (ground) to , force Channel 1 to run in diode emulation mode (bottom FET is turned off when inductor current goes , driver to enable or disable the turning on of the bottom power FET . Pin 30, OUT2: Channel 2 pulse , bottom FET source node (ground) to detect negative inductor current. Pin 41, SW1: Connect to Channel 1


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PDF LM27212 LM27212 CSP-9-111S2) CSP-9-111S2. LM27222 LM27212MTD LM27212MTDX LM27212SQ LM27212SQX MTD48 63M4 0828V
2002 - Not Available

Abstract: No abstract text available
Text: either channel Usually a 3.3 to 4.7 resistor is sufficient to suppress the noise. Top FET switching , to the bottom FET . where Tj_max is the maximum allowed junction temperature in the FET , Ta_max is the , paralleled to operate as a dual-phase single output regulator. The output of each channel can be , FET or across an external currentsense resistor connected in series with the drain of the top FET . Current limit is independently adjustable for each channel . The LM2642 features analog soft-start


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PDF LM2642 300kHz.
TPD7000F

Abstract: No abstract text available
Text: SILICON MONOLITHIC BIPOLAR LINEAR INTEGRATED CIRCUIT TPD7000F 4- CHANNEL LOW-SIDE POWER MOS FET DRIVER TPD7000F is a power MOS FET driver for low-side switching. This 4-charmel driver with a built-in circuit is used to monitor the voltage between the MOS FET drain and source for each channel and to output the state of the power MOS FET . FEATURES · Low-side N-channel power MOS FET driver (input capacitance: 15nF Max). · Incorporates a power MOS FET overcurrent protection function. · Incorporates induction load


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PDF TPD7000F TPD7000F 24-pin IN7000F SSOP24-P-300-1
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