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LTC1262CS8#TRPBF Linear Technology LTC1262 - 12V, 30mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LTC1262IS8#PBF Linear Technology LTC1262 - 12V, 30mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LTC1262IS8 Linear Technology LTC1262 - 12V, 30mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: -40°C to 85°C
LTC1262CS8 Linear Technology LTC1262 - 12V, 30mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LTC1262CS8#TR Linear Technology LTC1262 - 12V, 30mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LTC1263CS8#PBF Linear Technology LTC1263 - 12V, 60mA Flash Memory Programming Supply; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C

MX25L6406EM2I-12G-PROGRAMMED Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2012 - User Manual

Abstract: eCM-BF609 Industrial ECM-BF609 MX25L6406EM2I-12G MX25L6406 MEM2G16D2D MX25L6406E MX25L6406EM2 MEM2G16D2DABG-25I MX25L6406EM
Text: Page | 5 Hardware User Manual - eCM-BF609  8MB SPI-Flash o MX25L6406EM2I- 12G o ï , – 0x0FFFFFFF Size 8MByte Comment MX25L6406EM2I- 12G 256MByte MEM2G16D2DABG-25I, 128M , connector) The Static Memory Controller can be programmed to control up to four banks of memory-mapped , MEM2G16D2DABG-25I MX25L6406EM2I- 12G (8MB) KSZ8031RNLI ADSP-BF609BBCZ-5X MEM2G16D2DABG-25I MX25L6406EM2I- 12G , Type ADSP-BF609-ENG MEM2G16D2DABG-25I MX25L6406EM2I- 12G (8MB) ADSP-BF609BBCZ-5X MEM2G16D2DABG


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PDF eCM-BF609 eCM-BF609 User Manual eCM-BF609 Industrial MX25L6406EM2I-12G MX25L6406 MEM2G16D2D MX25L6406E MX25L6406EM2 MEM2G16D2DABG-25I MX25L6406EM
2010 - MX25L6406EM2I-12G

Abstract: MX25L6406 25l6406e MX25L6406E MX25L6406EMI-12G MX25L6406EM MX25L6406em2 mxic mx25l6406e MX25L6406EZNI-12G mx25l6406em2i
Text: transmitted data which goes beyond the end of the current page are programmed from the start address if the , . If more than 256 bytes are sent to the device, the data of the last 256-byte is programmed at the , data is programmed at the request address of the page without effect on other address of the same page


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PDF MX25L6406E PM1577 MX25L6406EM2I-12G MX25L6406 25l6406e MX25L6406E MX25L6406EMI-12G MX25L6406EM MX25L6406em2 mxic mx25l6406e MX25L6406EZNI-12G mx25l6406em2i
2010 - MX25L6406E

Abstract: MX25L6406EM2I-12G MX25L6406 MX25L6406EMI-12G 25l6406E mx25l6406em2i MX25L6406EM mxic mx25l6406e data mx25L6406E MX25L6406EZNI-12G
Text: , all transmitted data which goes beyond the end of the current page are programmed from the start , programmed at the request page and previous data will be disregarded. If less than 256 bytes are sent to the device, the data is programmed at the request address of the page without effect on other address of the


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PDF MX25L6406E PM1577 MX25L6406E MX25L6406EM2I-12G MX25L6406 MX25L6406EMI-12G 25l6406E mx25l6406em2i MX25L6406EM mxic mx25l6406e data mx25L6406E MX25L6406EZNI-12G
Not Available

Abstract: No abstract text available
Text: Memory Module Specifications KVR1066D3N7K3/ 12G 12GB (4GB 2Rx8 512M x 64-Bit x 3 pcs.) PC3-8500 CL7 240-Pin DIMM Kit Important Information: The module defined in this data sheet is one of several configurations available under this part number. While all configurations are compatible, the DRAM combination , 's KVR1066D3N7K3/ 12G is a kit of three 512M x 64bit (4GB) DDR3-1066 CL7 SDRAM (Synchronous DRAM), 2Rx8 memory , . The SPD's are programmed to JEDEC standard latency DDR3-1066 timing of 7-7-7 at 1.5V. Each 240


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PDF KVR1066D3N7K3/12G 64-Bit PC3-8500 240-Pin KVR1066D3N7K3/12G 64bit DDR3-1066
Not Available

Abstract: No abstract text available
Text: Memory Module Specifications KVR1333D3E9SK3/ 12G 12GB (4GB 2Rx8 512M x 72-Bit x 3 pcs.) PC3-10600 CL9 ECC 240-Pin DIMM Kit Important Information: The module defined in this data sheet is one of several configurations available under this part number. While all configurations are compatible, the DRAM , 's KVR1333D3E9SK3/ 12G is a kit of three 512M x 72-bit (4GB) DDR3-1333 CL9 SDRAM (Synchronous DRAM), 2Rx8 ECC memory , 's are programmed to JEDEC standard latency DDR3-1333 timing of 9-9-9 at 1.5V. Each 240-pin DIMM uses


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PDF KVR1333D3E9SK3/12G 72-Bit PC3-10600 240-Pin KVR1333D3E9SK3/12G 72-bit DDR3-1333 VALUERAM0861-001
1999 - qpsk modulator chip

Abstract: Stanford Telecom servo 9g STEL-9244 Stanford Telecommunications demodulator Stanford Telecommunications STEL-9257 MAX 232A rAised cosine FILTER 3G STEL-1109
Text: determined relative to the amount of gain that the 9257's variable gain amp. is programmed for. For example: for 0.128 Msps and a programmed nominal input level of + 10 dBmV (gain setting = 90), G = 13 - 10 = , request retransmission The collision signal stays high for the length of time programmed into the , 2.0 -2-G 39 0.5 11-G 34 2.0 -1-G 41 0.5 12-G 3A 2.0 0-G 47 0.5 13-G 42 2.5 1-G 51 , -13-G 0.5 5-G F 0.5 - 12-G 0.5 6-G 10 1.0 -11-G 0.5 7-G 12 1.0 -10-G 0.5 8-G 14 0.5


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PDF STEL-9257 STEL-9257 qpsk modulator chip Stanford Telecom servo 9g STEL-9244 Stanford Telecommunications demodulator Stanford Telecommunications MAX 232A rAised cosine FILTER 3G STEL-1109
DDR3 DIMM SPD

Abstract: No abstract text available
Text: Memory Module Specifications KVR1066D3E7SK3/ 12G 12GB (4GB 2Rx8 512M x 72-Bit x 3 pcs.) PC3-8500 CL7 ECC 240-Pin DIMM Kit Important Information: The module defined in this data sheet is one of several configurations available under this part number. While all configurations are compatible, the DRAM , 's KVR1066D3E7SK3/ 12G is a kit of three 512M x 72-bit (4GB) DDR3-1066 CL7 SDRAM (Synchronous DRAM), 2Rx8 ECC memory , 's are programmed to JEDEC standard latency DDR3-1066 timing of 7-7-7 at 1.5V. Each 240-pin DIMM uses


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PDF KVR1066D3E7SK3/12G 72-Bit PC3-8500 240-Pin KVR1066D3E7SK3/12G 72-bit DDR3-1066 VALUERAM0859-001 DDR3 DIMM SPD
Not Available

Abstract: No abstract text available
Text: Memory Module Specifications KVR1333D3N9K3/ 12G 12GB (4GB 2Rx8 512M x 64-Bit x 3 pcs.) PC3-10600 CL9 240-Pin DIMM Kit Important Information: The module defined in this data sheet is one of several configurations available under this part number. While all configurations are compatible, the DRAM combination , 's KVR1333D3N9K3/ 12G is a kit of three 512M x 64bit (4GB) DDR3-1333 CL9 SDRAM (Synchronous DRAM), 2Rx8 memory , . The SPD's are programmed to JEDEC standard latency DDR3-1333 timing of 9-9-9 at 1.5V. Each 240


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PDF KVR1333D3N9K3/12G 64-Bit PC3-10600 240-Pin KVR1333D3N9K3/12G 64bit DDR3-1333
DDR3 DIMM 240 clock termination

Abstract: No abstract text available
Text: Memory Module Specifications KVR1333D3D8R9SK3/ 12G 12GB (4GB 512M x 72-Bit x 3 pcs.) PC3-10600 CL9 Registered w/Parity 240-Pin DIMM Kit DESCRIPTION ValueRAM's KVR1333D3D8R9SK3/ 12G is a kit of three 512M x 72-bit (4GB) DDR3-1333 CL9 SDRAM (Synchronous DRAM), registered w/parity, 2Rx8 ECC memory modules, based on eighteen 256M x 8-bit DDR3-1333 FBGA components per module. Total kit capacity is 12GB. The SPDs are programmed to JEDEC standard latency DDR3-1333 timing of 9-9-9. Each 240-pin DIMM uses


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PDF KVR1333D3D8R9SK3/12G 72-Bit PC3-10600 240-Pin KVR1333D3D8R9SK3/12G 72-bit DDR3-1333 DDR3 DIMM 240 clock termination
2010 - mxic mx25l6406e

Abstract: No abstract text available
Text: , transmitted data that exceed page length are programmed from the starting address (24-bit address that last 8 , 256 data byte is programmed at the request page and previous data will be disregarded. If the data bytes sent to the device has not exceeded 256, the data will be programmed at the request address of


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PDF MX25L6406E PM1577 mxic mx25l6406e
2008 - FNP1500-I2C-controlling

Abstract: FXR34
Text: that can be programmed to the FNP and FXP1500/1800 front-ends. This manual is available by searching on , Front-Ends & FNR-3 and FXR-3 Power Shelves Data Sheet Model Selection Model FNP1500- 12G FNP1500-48G & FXP1500-48G FNP1800- 12G FNP1800-48G & FXP1800-48G 1 2 Input voltage VAC 1 auto selected 108 ­ 264 85 ­ , -332, Issue 1): GB 25 °C GB 25 °C (FNP1500- 12G ) Demonstrated 230 TBD 250 7.5 2 4 6.15 10 5 Min Nom Max 10 k 40 , Current limit output 1 FNP1500- 12G Conditions/Description Io = 64.5 A Vi = 230 VAC, Io1 = 65.5 A, TC = 25


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PDF FNP1500/1800 FXP1500/1800 5400-Watt HZZ02002G) FNP1500" FNP1500-I2C-controlling FXR34
2006 - 50 33g

Abstract: FON QFN Thermal Shut Down Functioned MOSFET MAX5954 2105w
Text: programmed time duration must be chosen according to the total capacitance load connected to 12G and 3.3G , = 3.3V, PWRGD = FAULT = PORADJ = TIM = OUTPUT = 12G = 3.3G = OPEN, INPUT = PRES-DET = PGND = GND , 12VIN CONTROL 12VIN Current-Limit Threshold (V12S+ - V12S-) V12ILIM 12G Gate Charge Current I12G_CHG 49 12G Gate High Voltage (V12G - V12VIN) 12G Threshold Voltage For PWRGD Assertion , I12G_DIS 4 Normal turn-off, ON = GND, V12G = 2V 12G Gate Discharge Current V12G = GND 60 µA


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PDF 160ms T4866-1. 50 33g FON QFN Thermal Shut Down Functioned MOSFET MAX5954 2105w
2010 - Not Available

Abstract: No abstract text available
Text: , transmitted data that exceed page length are programmed from the starting address (24-bit address that last 8 , 256 data byte is programmed at the request page and previous data will be disregarded. If the data bytes sent to the device has not exceeded 256, the data will be programmed at the request address of


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PDF MX25L6406E PM1577
2006 - fxp 1212

Abstract: zener diode sr 4416 EN50116 51742-11202000AA 51762-106020000AA HZZ01223 FNP1500-I2C-controlling D-Sub 37-pin female Connector 51762-11202000AA FXR-3-12G
Text: range of parameters that can be programmed to the FNP and FXP1500/1800 front-ends. This manual is , FXP1500/1800 Front-Ends & FNR-3 and FXR-3 Power Shelves Data Sheet Model Selection Model FNP1500- 12G & FXP1500- 12G FNP1500-48G & FXP1500-48G FNP1800-48G & FXP1800-48G 1 2 Output 1 Output , Hz 6.15 grms Calculated per Bellcore (SR-332, Issue 1): GB 25 °C GB 25 °C (FNP1500- 12G , 129.0 ADC ADC Nominal current output 1 FNP1500- 12G Io1 nom @ Vi =108 VAC ­ 264 VAC, Po


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PDF FNP1500/1800 FXP1500/1800 5400-Watt HZZ02002G) FNP1500" fxp 1212 zener diode sr 4416 EN50116 51742-11202000AA 51762-106020000AA HZZ01223 FNP1500-I2C-controlling D-Sub 37-pin female Connector 51762-11202000AA FXR-3-12G
2004 - 50 33g on

Abstract: FON QFN Thermal Shut Down Functioned MOSFET MAX5946 MAX5946AETX MAX5946LETX
Text: _ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ = 3.3G_ = OPEN, INPUT_ = PRES_DET , Threshold (V12S_+ - V12S_-) V12ILIM 12G _ Gate Charge Current I12G_CHG Normal turn-off, ON_ = GND, V12G_ = 2V 50 150 250 µA 12G _ Gate Discharge Current I12G_DIS Output short-circuit , 12G _ Gate High Voltage (V12G_ - V12VIN) V12G_H I12G_ = 1µA 4.8 5.3 5.8 V 12G , .3S_- = V3.3VAUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ =


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PDF 160ms MAX5946 50 33g on FON QFN Thermal Shut Down Functioned MOSFET MAX5946 MAX5946AETX MAX5946LETX
2007 - FNP1500-I2C-controlling

Abstract: 51762-11202000AA 51742-11202000AA HZZ01222
Text: that can be programmed to the FNP and FXP1500/1800 front-ends. This manual is available by searching on , Front-Ends & FNR-3 and FXR-3 Power Shelves Data Sheet Model Selection Model FNP1500- 12G & FXP1500- 12G , -332, Issue 1): GB 25 °C GB 25 °C (FNP1500- 12G ) Demonstrated 230 TBD 250 7.5 2 4 6.15 10 5 Min Nom Max 10 k 40 , voltage set point accuracy Output voltage trimming Nominal current output 1 Current limit output 1 FNP1500- 12G , Vo set = 12V dVo1 over the setting range [7 to 13V] -0.5 11.64 -0.36 - 5.58 12 FNP1500- 12G 2 Min


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PDF FNP1500/1800 FXP1500/1800 5400-Watt HZZ02002G) FNP1500" FNP1500-I2C-controlling 51762-11202000AA 51742-11202000AA HZZ01222
2010 - MX25L6406E

Abstract: MX25L6406 25l6406e MX25L6406EM2I-12G mxic mx25l6406e MX25L6406EM MX25L6406EM2 data mx25L6406E land pattern for vsop 8 pins MX25L6406EZNI-12G
Text: end of the current page are programmed from the start address if the same page (from the address whose , the device, the data of the last 256-byte is programmed at the request page and previous data will be disregarded. If less than 256 bytes are sent to the device, the data is programmed at the request address of


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PDF MX25L6406E MX25L6406E PM1577 MX25L6406 25l6406e MX25L6406EM2I-12G mxic mx25l6406e MX25L6406EM MX25L6406EM2 data mx25L6406E land pattern for vsop 8 pins MX25L6406EZNI-12G
2004 - MAX5946

Abstract: MAX5946AETX MAX5946LETX SI7448DP-T1
Text: _ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ = 3.3G_ = OPEN, INPUT_ = PRES_DET , Threshold (V12S_+ - V12S_-) V12ILIM 12G _ Gate Charge Current I12G_CHG Normal turn-off, ON_ = GND, V12G_ = 2V 50 150 250 µA 12G _ Gate Discharge Current I12G_DIS Output short-circuit , 12G _ Gate High Voltage (V12G_ - V12VIN) V12G_H I12G_ = 1µA 4.8 5.3 5.8 V 12G , .3S_- = V3.3VAUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ =


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PDF 160ms MAX5946 MAX5946 MAX5946AETX MAX5946LETX SI7448DP-T1
2010 - mxic mx25l6406e

Abstract: MX25L6406E 25l6406e MX25L6406EM2I-12G MX25L6406 MX25L6406EM MX25L6406EMI-12G
Text: , all transmitted data which goes beyond the end of the current page are programmed from the start , programmed at the request page and previous data will be disregarded. If less than 256 bytes are sent to the device, the data is programmed at the request address of the page without effect on other address of the


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PDF MX25L6406E MX25L6406E PM1577 mxic mx25l6406e 25l6406e MX25L6406EM2I-12G MX25L6406 MX25L6406EM MX25L6406EMI-12G
2007 - 25l1605

Abstract: MX25L3205DM2C-12G MX25L1605DM2C MX25L3205DM2C 25l1605d MX25L1605D MX25L3205DMI-12G 25L160 MX25L1605DM2C-12G MX25Lxx
Text: which goes beyond the end of the current page are programmed from the start address if the same page , 256 bytes are sent to the device, the data of the last 256-byte is programmed at the request page and previous data will be disregarded. If less than 256 bytes are sent to the device, the data is programmed at


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PDF MX25L1605D MX25L3205D MX25L6405D 16M-BIT 32M-BIT 64M-BIT 25l1605 MX25L3205DM2C-12G MX25L1605DM2C MX25L3205DM2C 25l1605d MX25L3205DMI-12G 25L160 MX25L1605DM2C-12G MX25Lxx
2011 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF MX25U4033E MX25U4033E PM1755
2007 - T5677-1

Abstract: MAX5957 MAX7313 qfn 48l
Text: programmed time duration must be chosen according to the total capacitance load connected to the 12G _ and , .) to +14V 12G _ .-0.3V to (V12VIN + 6V , .3S_+ =V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ = , 200 mA µs 12VIN CONTROL 12VIN Current-Limit Threshold (V12S+ - V12S-) 12G _ Gate Charge Current 12G _ Gate Discharge Current V12ILIM I12G, CHG I12G_, DIS 12G _ Gate High Voltage


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PDF MAX5957/MAX5958 MAX5957/ MAX5958s' MAX7313. MAX5957/MAX5958 T5677-1 MAX5957 MAX7313 qfn 48l
2007 - resistor b 33g

Abstract: No abstract text available
Text: 12G _ .-0.3V to (V12VIN + 6V) 12S_+, 12S , VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G _ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND , -) 12G _ Gate Charge Current V12ILIM I12G, CHG V12G_ = GND Normal turn-off, ON_ = GND, V12G_ = 2V 12G , MIN TYP MAX UNITS 60 120 200 mA 12G _ Gate High Voltage (V12G_ - V12VIN) 12G _ Threshold , PORADJ = TIM = OUTPUT_ = 12G _ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND, TA = TJ = -40°C to +85°C


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PDF MAX5959/MAX5960 MAX5959/MAX5960s' MAX7313. TQFP12x12mm 12x12x1 MAX5959/MAX5960 resistor b 33g
2007 - pcie Design guide

Abstract: 12v output CIRCUIT DIAGRAM pcie IRF N-Channel Power MOSFETs 3SB diode 12v regulated power supply IN5819 datasheet resistor b 33g pcie X1 edge connector Thermal Shut Down Functioned MOSFET
Text: .) to +14V 12G _ .-0.3V to (V12VIN + 6V , 12G _ = 3.3G_ = OPEN, INPUT_ = PRES-DET_ = PGND = GND, TA = TJ = -40°C to +85°C, unless otherwise , (V12S+ - V12S-) 12G _ Gate Charge Current 12G _ Gate Discharge Current V12ILIM I12G, CHG I12G_, DIS 12G _ Gate High Voltage (V12G_ - V12VIN) V12G, H I12G_ = 1µA 12G _ Threshold Voltage , V3.3S_- = V3.3AUXIN = VON_ = VAUXON_ = VFON_ = 3.3V, PWRGD_ = FAULT_ = PORADJ = TIM = OUTPUT_ = 12G


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PDF MAX5959/MAX5960 MAX5959/MAX5960s' MAX7313. 12x12x1 MAX5959/MAX5960 pcie Design guide 12v output CIRCUIT DIAGRAM pcie IRF N-Channel Power MOSFETs 3SB diode 12v regulated power supply IN5819 datasheet resistor b 33g pcie X1 edge connector Thermal Shut Down Functioned MOSFET
2008 - Not Available

Abstract: No abstract text available
Text: Shelves Data Sheet Model Selection Model FNP1500- 12G FNP1500-48G FNP1800- 12G Input voltage VAC 1 auto , -332, Issue 1): GB 25 °C GB 25 °C (FNP1500- 12G ) Demonstrated 230 TBD 250 7.5 2 4 6.15 10 5 Min Nom Max 10 k 40 , FNP1500- 12G Conditions/Description Io = 64.5 A Vi = 230 VAC, Io1 = 65.5 A, TC = 25 °C (Factory setting , the setting range [7 to 13V] -0.5 11.64 -0.36 - 5.58 12 FNP1500- 12G 2 Min 11.93 -0.42 7 6.2 Nom , ADC ADC ADC ADC FNP1800- 12G 150.0 FNP1500- 12G FNP1800- 12G Current limit output 1


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PDF FNP1500/1800 FNP1500" MCD10074 29-Aug-08
Supplyframe Tracking Pixel