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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
MT8920BS1 Microsemi Corporation Telecom Circuit, 1-Func, CMOS, PDSO28, 0.300 INCH, LEAD FREE, MS-013AE, SOIC-28
MT8920BPR1 Microsemi Corporation Telecom Circuit, 1-Func, CMOS, PQCC28, LEAD FREE, PLASTIC, MS-018AB, LCC-28
MT8920BE1 Microsemi Corporation Telecom Circuit, 1-Func, CMOS, PDIP28, 0.600 INCH, LEAD FREE, PLASTIC, MS-011AB, DIP-28
MT8920BP1 Microsemi Corporation Telecom Circuit, 1-Func, CMOS, PQCC28, LEAD FREE, PLASTIC, MS-018AB, LCC-28
DS9092R+ Maxim Integrated Products iButton Port
DS9105-001# Maxim Integrated Products iButton Number Set

MT8920-1 datasheet (6)

Part Manufacturer Description Type PDF
MT8920-1AC Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF
MT8920-1AC Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF
MT8920-1AE Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF
MT8920-1AE Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF
MT8920-1AP Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF
MT8920-1AP Mitel Semiconductor ST-BUS Parallel Access Circuit Scan PDF

MT8920-1 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
740i

Abstract:
Text: 28 Pin Plastic DIP MT8920/ MT8920-1 AC 28 Pin Ceramic DIP MT8920/ MT8920-1AP 28 Pin Plastic , © MITEL iso-cmos st-bus" family MT8920/ MT8920-1 ST-BUS Parallel Access Circuit Features â , for 68000 nP (mode 1 ). • Fast dual-port RAM access (mode 2). Accesstime: 120 nsec - MT8920-1 180 , 12-3 MT8920/ MT8920-1 ISO-CMOS Absolute Maximum Ratings* - Voltages are with respect to ground (Vs5 , Material Copyrighted By Its Respective Manufacturer ISO CMOS MT8920/ MT8920-1 AC Electrical


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PDF MT8920/MT8920-1 MT8920-1 MT8920 TMS32020_ 74HCT MT8920/ MT8920-1 740i 740S2 MT8920 X2930
RRU 32

Abstract:
Text: GENERATOR I C 4Ì Figure 1 . Functional Block Diagram 12-3 MT8920/ MT8920-1 ISO-CMOS Absolute , . 12-4 v dd iso CMOS MT8920/ MT8920-1 AC Electrical Characteristics'- M ode 1 Parallel Bus Tim , tR D 5 DS High to DTACK High MT8920 MT8920-1 6 DS High to Data High Imped.(Read) 7 DS High , A c know led ge cycle IACK replaces CS. R /W must rem ain high. 12-5 MT8920/ MT8920-1 is o - , _ Characteristics 2 Address Access Time MT8920 MT8920-1 M ax Units *E V D 1 OE


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PDF T8920/M T8920-1 MT8920 TMS32020 MT8920/MT8920-1 RRU 32 RRU+32
Pinout Diagram for IC 7400

Abstract:
Text: ISO-CMOS ST-BUS" f a m i l y MT8920/ MT8920-1 ST-BUS Parallel Access Circuit ~ T - 7 S~ - /S , Access ti me : 120 nsec - MT8920-1 180 nsec - MT8920 · Parallel bus controller (mode 3) - no external , Plastic J-Lead 12-3 MT8920/ MT8920-1 MITEL SEMICONDUCTOR Absolute Maximum Ratings* ISO-CMOS , SEMICONDUCTOR ISO-CMOS MT8920/ MT8920-1 35E D Bi b24T370 000b777 MITC T 7c i c T -7 5 - 1 5 Test Conditions , MT8920 MT8920-1 ns ns ns ns ns 6 D5 High to Data High Imped.(Read) 7 DS High to CS High 8 Data Hold


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PDF 00Gta77S MT8920/MT8920-1 9161-002-084-NA MT8920-1 MT8920 Pinout Diagram for IC 7400 7400ac stc 1740
2004 - Not Available

Abstract:
Text: TDM/TSI Switches Specialized VOICE/DATA Part # Number of Input Streams Features Packaging Number of Output Streams Total Matrix Size Rate Conversion Constant Delay 4.096 Mbps Variable Delay 2.048 Mbps On-board PLL Serial to Parallel Speciality 8.192 Mbps JTAG MT8920 MT9080 MT9085 MT90812 32 Channels 2 K x 16 bit 1 K to Parallel 64 x 64 TDM (ST-BUS , SOIC 84 pin PLCC 68 pin PLCC 68 pin PLCC, 64 pin MQFP · · · 100 pin PQFP, 84 pin PLCC 1 2 ·


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PDF MT8920 MT9080 MT9085 MT90812 MT9080
1995 - MT8920

Abstract:
Text: SECTION 1 Introduction "To illustrate the performance available from this software, a 20-MHz DSP56000/ DSP56001 is capable of implementing 10 six-way conference bridges, a single 71-way bridge, or even 17 threeway bridges." T his application note describes one possible implementation of a conference bridge for a modern digital telephone exchange. Conference bridging is a feature available on many modern analog or digital telephone exchanges. It allows conversation among three or more


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PDF 20-MHz DSP56000/ DSP56001 71-way MT8920 DSP56000
2001 - motorola 6800 8bit hardware architecture

Abstract:
Text: Application Note MSAN-145 How to Interface Zarlink Components to Parallel Bus CPUs ISSUE 1 , components to various microprocessors. 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - - -


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PDF MSAN-145 motorola 6800 8bit hardware architecture INSTRUCTION SET motorola 6802 8085 microprocessor Datasheet motorola 6800 cpu 8284 intel microprocessor architecture cpu 6802 INSTRUCTION SET motorola 6800 intel 8085 internal structure Intel 8085 8085 microprocessor
2001 - interfacing 8259 with 8086

Abstract:
Text: Application Note MSAN-145 How to Interface Zarlink Components to Parallel Bus CPUs ISSUE 1 , components to various microprocessors. 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - - -


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PDF MSAN-145 interfacing 8259 with 8086 interfacing of 8259 devices with 8085 8259 interface with 8051 Peripheral memory interfacing 8085 with 8086 real time clock using 8085 microprocessor interfacing clock system of 8284 INSTRUCTION SET motorola 6800 interfacing of memory devices with 8085 intel 8085 difference between intel 8085 and motorola 6800
2001 - difference between intel 8085 and motorola 6800

Abstract:
Text: Application Note MSAN-145 How to Interface Zarlink Components to Parallel Bus CPUs ISSUE 1 , components to various microprocessors. 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - - -


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PDF MSAN-145 difference between intel 8085 and motorola 6800 difference between intel 8086 and zilog z80 interfacing 8259 with 8086 interfacing of 8259 devices with 8085 difference between 8086 and zilog z80 intel 8085 microprocessor motorola 6809 memory interfacing 8085 with 8086 motorola 68000 architecture intel 8085
1996 - motorola 6802

Abstract:
Text: Application Note MSAN-145 How to Interface Mitel Components to Parallel Bus CPUs ® ISSUE 1 TABLE OF CONTENTS · Introduction 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8880 MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , - MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - , "glue" components as possible Group 1 a/ MT8952B HDLC Controller b/ MT8880/8/9 DTMF Transceivers c


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PDF MSAN-145 MC68HC11 Z80/Z8400 Z8002/Z280 uni45 MT8920B MT8920B motorola 6802 INSTRUCTION SET motorola 6802 8085 intel microprocessor block diagram microprocessor 8085 block diagram intel 8085 intel 8051 and 68HC11 difference between intel 8085 and motorola 6800 cpu 6802 INSTRUCTION SET 8085 8284 intel microprocessor architecture
1995 - 8085 microprocessor

Abstract:
Text: Application Note MSAN-145 How to Interface Mitel Components to Parallel Bus CPUs ® ISSUE 1 TABLE OF CONTENTS · Introduction 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8880 MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , - MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - , "glue" components as possible Group 1 a/ MT8952B HDLC Controller b/ MT8880/8/9 DTMF Transceivers c


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PDF MSAN-145 MC68HC11 Z80/Z8400 Z8002/Z280 MT8920B MT8920B AD0-AD15 8085 microprocessor 8085 microprocessor Datasheet intel 8085 ic intel 8085 intel 8085 microprocessor interfacing of memory devices with 8085 8085 intel microprocessor block diagram datasheet 6802 processor motorola motorola 6802 cpu Interfacing 8085
2001 - 8085 intel microprocessor block diagram

Abstract:
Text: Application Note MSAN-145 How to Interface Zarlink Components to Parallel Bus CPUs ISSUE 1 , components to various microprocessors. 1.0 Group 1 Components 1.1 1.2 1.3 1.4 1.5 1.6 1.7 , MT8888 MT8889 MT8980/ 1 MT8985, MT8986 (DIP-40) MT8986 (PLCC-44) MT8920B MT8952B Table 1 , MT8889 4 2 3 5 9 7 7 10 7 7 MT8980/ 1 13 11 12 - - -


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PDF MSAN-145 8085 intel microprocessor block diagram intel 8085 interfacing of memory devices with 8085 8085 microprocessor motorola 6800 cpu 8085 microprocessor Architecture Diagram interfacing 8259 with 8086 8284 intel microprocessor architecture cpu 6802 Interfacing 8085
1996 - 1488 1489 standard

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ® ISSUE 1 · , this trend through reduced costs of implementation. Figure 1 shows the ISDN User Network Access Model. Conclusion TE1 Digital Set NT12 S TE1 Terminal (Type 1 ) T NT2 U U V LT NT1 , Primary Rate Access Figure 1 - ISDN User Access Reference Model A-139 MSAN-128 Application Note types of information channels, each with a defined bit rate. As can be seen from Figure 1


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PDF MSAN-128 1488 1489 standard 32X64 MH89500 MH89760 MH89790 MSAN-128 MT8930 MT8972 MT8994
Not Available

Abstract:
Text: · · · High speed parallel access to the serial ST-BUS Parallel bus optimized for 68000 nP (mode 1 , Comp/ MUX Address Generator STo1 FOi Ü4Î 'ss Figure 1 - Functional Block Diagram 3-3 b24t , A5, STCH C VSSC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 u 28 27 26 25 24 23 22 21 20 19 18 17 16 15 , Figure 2 - Pin Connections Pin Description Pin# 1 Name C4Ï FÔÎ Description* 4.096 MHz Clock , subsequent to the falling edge of FOi identifies the start of a frame. Interrupt Acknowledge (Mode 1 ). This


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PDF MT8920 120nsec MT8920BE MT8920BC MT8920BP MT8920BS General-10 001205b
2001 - 32X64

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ISSUE 1 1.0 , this trend through reduced costs of implementation. Figure 1 shows the ISDN User Network Access Model. Conclusion TE1 Digital Set NT12 S TE1 Terminal (Type 1 ) T NT2 U U V LT NT1 , Primary Rate Access Figure 1 - ISDN User Access Reference Model A-135 MSAN-128 Application Note As can be seen from Figure 1 , there are points in theend-to-end transmission of information


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PDF MSAN-128 32X64 dnic MH89760 MH89790 MSAN-128 MT8930 MT8972
2001 - 1488 1489 standard

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ISSUE 1 1.0 , this trend through reduced costs of implementation. Figure 1 shows the ISDN User Network Access Model. Conclusion TE1 Digital Set NT12 S TE1 Terminal (Type 1 ) T NT2 U U V LT NT1 , Primary Rate Access Figure 1 - ISDN User Access Reference Model A-135 MSAN-128 Application Note As can be seen from Figure 1 , there are points in theend-to-end transmission of information


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PDF MSAN-128 1488 1489 standard MSAN-128 MT8972 MT8930 MH89790 MH89780 MH89760 I461 32X64 MT8980 application
1995 - 1488 1489 standard

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ® ISSUE 1 , AAAA TE1 Terminal (Type 1 ) TE2 Printer (Type 2) One of the cornerstones of the ISDN , competition will reinforce this trend through reduced costs of implementation. Figure 1 shows the ISDN User , AAAA Figure 1 - ISDN User Access Reference Model A-139 MSAN-128 Application Note As can be seen from Figure 1 , there are points in the end-to-end transmission of information through an


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PDF MSAN-128 1488 1489 standard msan configuration MT8972 ISDN TE adapter chips MH89760 32X64 MITEL SEMICONDUCTOR MT8980 application MSAN-128 MT8930
2001 - MH89780

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ISSUE 1 1.0 , this trend through reduced costs of implementation. Figure 1 shows the ISDN User Network Access Model. Conclusion TE1 Digital Set NT12 S TE1 Terminal (Type 1 ) T NT2 U U V LT NT1 , Primary Rate Access Figure 1 - ISDN User Access Reference Model A-135 MSAN-128 Application Note As can be seen from Figure 1 , there are points in theend-to-end transmission of information


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PDF MSAN-128 MH89780 1488 1489 standard 32X64 MH89760 MH89790 MSAN-128 MT8930 MT8972
1999 - MSAN-128

Abstract:
Text: Application Note MSAN-128 Implementing an ISDN Architecture Using the ST-BUS ® ISSUE 1 · , this trend through reduced costs of implementation. Figure 1 shows the ISDN User Network Access Model. Conclusion TE1 Digital Set NT12 S TE1 Terminal (Type 1 ) T NT2 U U V LT NT1 , Primary Rate Access Figure 1 - ISDN User Access Reference Model A-135 MSAN-128 Application Note types of information channels, each with a defined bit rate. As can be seen from Figure 1


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PDF MSAN-128 MSAN-128 MH89780 ST-BUS MT8930 MH89790 MH89760 I461 H12-channel 32X64 1488 1489 standard
2002 - Not Available

Abstract:
Text: industry standard codecs, digital phone devices and Layer 1 transceivers. Linear coded PCM is provided to , MS3 A/µ FORMAT MS4 MS5 MS6 LINEAR SEL Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor , F0i C2o BCLK PCMo1 PCMi1 VSS LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 , FORMAT A/µ Figure 2 - Pin Connections Pin Description Pin # 1 Name EN1 Description Enable Strobe 1 , a single bit, high true pulse when LINEAR= 1 . In SSI mode this output is high impedance. Master Clock


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PDF MT9126 MT9126AE MT9126AS MT9126ASR MT9126AS1
2005 - MT8920

Abstract:
Text: Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink , phone devices and Layer 1 transceivers. Linear coded PCM is provided to facilitate external DSP , 1 Ordering Information Box Added Pb Free part numbers. EN1 MCLK F0i C2o BCLK PCMo1 PCMi1 VSS LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 , Description 1 EN1 Enable Strobe 1 (Output). This 8 bit wide, active high strobe is active during the


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PDF ZL38010 MT8920 MT89L80 MT9172 MT91L60 ZL38010 ZL38010DCE ZL38010DCE1 ZL38010DCF
032KB

Abstract:
Text: Layer 1 transceivers. Linear coded PCM is provided to facilitate external DSP functions . Full , LINEAR SEL Figure 1 - Functional Block Diagram 8-89 MT9126 Data Sheet EN1 MCLK F0i C2o BCLK PCMo1 PCMi1 VSS LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1 2 3 4 5 6 7 8 9 10 , Description Pin # Name Description 1 EN1 Enable Strobe 1 (Output). This 8 bit wide, active , when LINEAR= 1 . In SSI mode this output is high impedance. 2 MCLK Master Clock (input). This


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PDF MT9126 032KB MT9126AS MT9126AE MT9126 MT8980 MT8972 MT8920 MT8910 MH88622 PAIRGAIN
2001 - Not Available

Abstract:
Text: interface to industry standard codecs, digital phone devices and Layer 1 transceivers. Linear coded PCM is , MS1 MS2 MS3 A/µ FORMAT MS4 MS5 MS6 LINEAR SEL Figure 1 - Functional Block Diagram 8-89 MT9126 Data Sheet EN1 MCLK F0i C2o BCLK PCMo1 PCMi1 VSS LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1 2 3 4 5 , VDD MS3 MS2 MS1 IC PWRDN FORMAT A/µ Figure 2 - Pin Connections Pin Description Pin # 1 Name EN1 Description Enable Strobe 1 (Output). This 8 bit wide, active high strobe is active during the B1 PCM channel


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PDF MT9126 MT9126AE MT9126AS
2001 - MH88622

Abstract:
Text: interface to industry standard codecs, digital phone devices and Layer 1 transceivers. Linear coded PCM is , VDD VSS PWRDN IC MS1 MS2 MS3 A/µ FORMAT MS4 MS5 MS6 LINEAR SEL Figure 1 - Functional Block , LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 , 1 EN1 Enable Strobe 1 (Output). This 8 bit wide, active high strobe is active during the B1 PCM channel in ST-BUS mode. Becomes a single bit, high true pulse when LINEAR= 1 . In SSI mode this


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PDF MT9126 MH88622 MT8910 MT8920 MT8972 MT8980 MT9126 MT9126AE MT9126AS MT9160
2005 - Not Available

Abstract:
Text: Decode VDD VSS PWRDN IC MS1 MS2 MS3 A/µ FORMAT MS4 MS5 MS6 LINEAR SEL Figure 1 - Functional Block Diagram 1 Zarlink Semiconductor Inc. Zarlink, ZL and the Zarlink Semiconductor logo are , selectable allowing a simple interface to industry standard codecs, digital phone devices and Layer 1 , from October 2005 Issue to January 2007 Issue. Page 1 Item Ordering Information Box Change Added Pb Free part numbers. EN1 MCLK F0i C2o BCLK PCMo1 PCMi1 VSS LINEAR ENB2/F0od ENB1 PCMo2 PCMi2 SEL 1


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PDF ZL38010 ZL38010DCE ZL38010DCF ZL38010DCE1 ZL38010DCF1
0Q051

Abstract:
Text: RxB RxD CSTÌ1 TxFDL TxFDLCIk NC CSTiO E8KO VSS c c c c c c c c c c c c c c 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 D 2 3 D 2 1 VDD 1C , SLIP CONTROL ai« föTi RxSF* DS1 LINK INTERFACE Figure 1 . Functional Block Diagram 4-241 , -75-11-29 -Absolute Maximum Ratings* Parameter 1 2 3 4 5 Power Supplies with respect to V$s Voltage on any pin other , ) unless otherwise stated Characteristics 1 2 3 4 I n p u s Operating Temperature Power Supplies Input


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PDF GG0S14fe, MT8976 SLC-96 0Q051 SLC96 alarm frame format
Supplyframe Tracking Pixel