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1995 - TEA 2621

Abstract: TEA 1509 JG100 M68040 MC68000 MC68LC040 TEA 1045 040CQ 68LC040
Text: ", the comment "Write PD3-0 and skip" applies only to the the Write Page Fault case in which a MOVE16 , protect fault is taken on the MOVE16 write, in which the MOVE16 source is dirty in the cache, and that the source and destination addresses for the MOVE16 are the same, (specifically, a MOVE16 (Ax)+,(Ay)+ , serialized space. Item #1557: Under certain circumstances, a MOVE16 write ATC fault improperly invalidates , cache line at address $xxxxxZZZ that is in the data cache and is marked dirty. 2) Execute MOVE16 src


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PDF M68040 MC68000 040cqfp 68040UM/AD MC68LC040 TEA 2621 TEA 1509 JG100 TEA 1045 040CQ 68LC040
1998 - 68040V

Abstract: 68LC040 DSA0039258 M68040 MC68040 MOVE16
Text: MOVE16 (2M16=1)in the WB2S. General Operation: The following items provide clarification to the , fault is taken on the MOVE16 write, in which the MOVE16 source is dirty in the cache, and that the source and destination addresses for the MOVE16 are the same, (specifically, a MOVE16 (Ax)+,(Ay)+ , MOVE16 write ATC fault improperly invalidates a dirty cache line. The following steps are needed to , is marked dirty. 2) Execute MOVE16 src,$yyyyyZZZ, where the page descriptor for logical page


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PDF MC68040UMAD/AD MC68040 MC68040UM/AD 68040V 68LC040 DSA0039258 M68040 MC68040 MOVE16
M68040

Abstract: MC68040
Text: the Write Page Fault case in which a MOVE16 (2M16=1)in the WB2S. General Operation: The following , cache when it is disabled. 6. When a TLB or TTR write protect fault is taken on the MOVE16 write, in which the MOVE16 source is dirty in the cache, and that the source and destination addresses for the MOVE16 are the same, (specifically, a MOVE16 (Ax)+,(Ay)+ instruction in which Ax=Ay), the associated , MOVE16 write ATC fault improperly invalidates a dirty cache line. The following steps are needed to


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PDF MC68040UMAD/AD MC68040 MC68040UM/AD M68040 MC68040
1997 - XCF5102PV20A

Abstract: MCF5102 QEAQ9651
Text: . If a MOVE16 instruction has both source and destination addresses hitting in the same copyback mode , write protected, then the dirty cached data may be lost. Masks: 3F94E 1F28T 5. MOVE16 (Ax) + (Ay)+ where Ax = Ay is functionally the same as MOVE16 (Ax),(Ay)+. The address register increments only once


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PDF MCFf5102UMAD/AD MCF5102 MCF5102 XCF5102PV20A 3F94E QEAQ9651 3F94E XCF5102PV20A QEAQ9651
MC68LC040

Abstract: M68000 M68040 MC68040 MC68040V MC68EC040 mc68030c
Text: (MC68040FPSP) for details on software emulation. The MOVE16 user instruction is new to the instruction set , defined in the M68000 family architecture plus a new data format (16-byte block) for the MOVE16 , with the MC68881/MC68882 floating-point coprocessors. The M68040 instruction set includes MOVE16 , a new , supervisor state then USP » An or An » USP else TRAP MOVE USP,An MOVE An,USP MOVE16 Source block » Destination block MOVE16 (Ax)+, (Ay)+7 MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC


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PDF MC68040, MC68040V, MC68LC040, MC68EC040, MC68EC040V M68040) M68000-compatible, 32-bit MC68030-compatible MC68LC040 M68000 M68040 MC68040 MC68040V MC68EC040 mc68030c
1997 - MCF5102

Abstract: QEAQ9651 XCF5102PV20A
Text: cache-inhibited space. 4. If a MOVE16 instruction has both source and destination addresses hitting in the same , . December 19, 1996 Masks: 3F94E 1F28T 5. MOVE16 (Ax) + (Ay)+ where Ax = Ay is functionally the same as MOVE16 (Ax),(Ay)+. The address register increments only once and the line is copied over itself instead


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PDF MCFf5102UMAD/AD MCF5102 MCF5102 XCF5102PV20A 3F94E QEAQ9651 3F94E QEAQ9651 XCF5102PV20A
1996 - 8452 MOTOROLA

Abstract: M68000 MCF5102
Text: pending after the faulted access (see Figure 8-8). For a data cache line-push fault or a MOVE16 write


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PDF MOVE16 MOVE16 MCF5102 8452 MOTOROLA M68000
1996 - snoop filter

Abstract: MCF5102
Text: transfer. Transfer Type TT[1:0] Indicates the general transfer type: normal, MOVE16 , alternate , samples these signals to determine if it should snoop the transfer. Only normal and MOVE16 accesses can , Access 0 1 MOVE16 Access 1 0 Alternate Logical Function Code Access 1 1 , information for each transfer type. Table 53 lists the encoding for normal and MOVE16 transfers, and Table 5-4 , Descriptions Table 5-3. Normal and MOVE16 Access Transfer Modifier Encoding TM2 TM1 TM0 Transfer


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PDF MCF5102. MCF5102 snoop filter
1996 - MCF5102

Abstract: M68000 M68040
Text: > If supervisor state then USP An or An USP else TRAP MOVE USP,An MOVE An,USP MOVE16 Source block Destination block MOVE16 (Ax)+, (Ay)+2 MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEP Source Destination MOVEP Dx,(dn,Ay) MOVEP (dn,Ay),Dx MOVES , . 2. MOVE16 (ax)+,(ay)+ is functionally the same as MOVE16 (ax),(ay)+ when ax = ay. The address


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PDF 32-bit MOVE16 MCF5102 M68000 M68040
MC68060FPSP

Abstract: M68000 M68060 MC68040 MC68060 MC68EC060 MC68LC060
Text: architecture plus a new data format (16-byte block) for the MOVE16 instruction. Registers, memory, or , floating-point coprocessors. The MC68060 instruction set includes MOVE16 which allows high-speed transfers of 16 , An or An - USP else TRAP MOVE USP.An MOVE An,USP MOVE16 Source block - Destination block MOVE16 (Ax)+, (Ay)+6 MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC If supervisor state then , .List refers to register. 5.List refers to control registers only. 6. MOVE16 (ax)+,(ay)+ is functionally the


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PDF MC68060 M68060 MC68060, MC68LC060, MC68EC060. MC68LC060 MC68EC060 MC68060FPSP M68000 MC68040
2012 - Not Available

Abstract: No abstract text available
Text: block  Destination block MOVE16 (Ax)+, (Ay)+(5) MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC If supervisor state then Rc  Rn or Rn  Rc else TRAP MOVEC Rc , register. 4. List refers to control registers only. 5. MOVE16 (ax)+, (ay)+ is functionally the same as MOVE16 (ax), (ay)+ when ax = ay. The address register is only incremented once, and the line is copied , per bus transfer. Transfer Type TT1,TT0 Indicates the general transfer type: normal, MOVE16


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PDF WC32P040-XXM 33MHz WC32P040 68000-compatible, 32-bit 68030-compatible 68881/68882-compatible
M68040

Abstract: MC68020 MC68030 MC68040 MC68040V MC68EC040 MC68LC040
Text: No file text available


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PDF MC68040 MC68040V, MC68LC040, MC68EC040, MC68EC040V for16 MOVE16 M68040 MC68020 MC68030 MC68040V MC68EC040 MC68LC040
MC68060

Abstract: M68060
Text: general transfer type: normal, MOVE16 , alternate logical function code, and acknowledge. Transfer Modifier , processor is allowed to snoop bus transactions, TT1 is sampled. Only normal and MOVE16 accesses can be , . Table 2-2. Transfer-Type Encoding TT1 TT0 Transfer Type 0 0 Normal Access 0 1 MOVE16 Access 1 0 , transfer cycle type. Table 2-3 lists the encoding for normal (TTx = 00) and MOVE16 (TTx = 01) transfers , . MOTOROLA M68060 USER'S MANUAL 2-5 Signal Description Table 2-3. Normal and MOVE16 Access TMx Encoding TM2


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PDF MC68060 M68060
2005 - scx 15 dn

Abstract: DY 127 fmt 150 FPN 82 transistor tip 41a WC32P040-XXM MC68040
Text: or An else TRAP CCR MOVE USP,An MOVE An,USP USP MOVE16 (Ax)+, (Ay)+(5) MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVE1 6 Source block MOVEC If supervisor , register. 4. List refers to control registers only. 5. MOVE16 (ax)+, (ay)+ is functionally the same as MOVE16 (ax), (ay)+ when ax = ay. The address register is only incremented once, and the line is copied , per bus transfer. Transfer Type TT1,TT0 Indicates the general transfer type: normal, MOVE16


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PDF WC32P040-XXM 33MHz 32-Bit, 68030-Compatible 68881/68882-Compatible WC32P040 68000-compatible, 32-bit scx 15 dn DY 127 fmt 150 FPN 82 transistor tip 41a WC32P040-XXM MC68040
1998 - MC68040

Abstract: WC32P040-XXM FPN 82
Text: else TRAP Registers ± Destination Source ± Registers Source ± Destination 7 MOVE16 (Ax)+, (Ay)+(5) MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC Rc,Rn MOVEC Rn,Rc , precision. 3. List refers to register. 4. List refers to control registers only. 5. MOVE16 (ax)+, (ay)+ is functionally the same as MOVE16 (ax), (ay)+ when ax = ay. The address register is only incremented , , MOVE16 , alternate logical function code, and acknowledge. Transfer Modifier TM2-TM0 Indicates


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PDF WC32P040-XXM 33MHz WC32P040 68000-compatible, 32bit 68030compatible MC68040 WC32P040-XXM FPN 82
2013 - Not Available

Abstract: No abstract text available
Text: TRAP MOVE USP,An MOVE An,USP MOVE1 6 Source block  Destination block MOVE16 (Ax)+, (Ay)+(5) MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC If supervisor , precision. 3. List refers to register. 4. List refers to control registers only. 5. MOVE16 (ax)+, (ay)+ is functionally the same as MOVE16 (ax), (ay)+ when ax = ay. The address register is only incremented , Type TT1,TT0 Indicates the general transfer type: normal, MOVE16 , alternate logical function code


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PDF WC32P040-XXM 33MHz WC32P040 68000-compatible, 32-bit 68030-compatible 68881/68882-compatible
2007 - transistor tip 41a

Abstract: WC32P040-XXM MC68040 41 bb FPN 82 gigabyte diagram
Text: MOVE USP,An MOVE An,USP USP MOVE1 6 Source block MOVE16 (Ax)+, (Ay)+(5) MOVE16 (xxx).L, (An) MOVE16 (An), (xxx).L MOVE16 (An)+, (xxx).L MOVEC If supervisor state then Rc MOVEM , only. 5. MOVE16 (ax)+, (ay)+ is functionally the same as MOVE16 (ax), (ay)+ when ax = ay. The address , Indicates the general transfer type: normal, MOVE16 , alternate logical function code, and acknowledge


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PDF WC32P040-XXM 33MHz 32-Bit, 68030-Compatible 68881/68882-Compatible WC32P040 68000-compatible, 32-bit transistor tip 41a WC32P040-XXM MC68040 41 bb FPN 82 gigabyte diagram
2001 - MC68060

Abstract: NM27P040 NM27P210 NM27P512
Text: Applications Information Page 11-20 - Table 11-4 Support Devices & Products lists National Semiconductor Part REPROM with Burst Capability with an incorrect part number: NM27P6841. Part number needs to be changed to NM27P210, for a one-meg EPROM with burst capability, or NM27P040 for a 4 meg EPROM with burst, or NM27P512 for a 512K EPROM with burst. PN,7/19/94 * Exception Processing Page 8-23 . The SIZE field should read as follows: 00 - LONG 01 - BYTE 10 - WORD 11 - MOVE16 or Double


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PDF NM27P6841. NM27P210, NM27P040 NM27P512 MOVE16 40MHz EC060 060tspec MC68060 NM27P210
snoop filter

Abstract: M68040 MC68040 MC68040V MC68EC040 MC68LC040 "snoop filter"
Text: transfer. Transfer Type TT1,TT0 Indicates the general transfer type: normal, MOVE16 , alternate logical , normal and MOVE16 accesses can be snooped. Table 5-2 lists the definition of the transfer-type encoding , TT1 TT0 Transfer Type 0 0 Normal Access 0 1 MOVE16 Access 1 0 Alternate Logical Function Code Access 1 , normal and MOVE16 transfers, and Table 5-4 lists the encoding for alternate access transfers. For , Reserved * MOVE16 accesses use only these encodings. Table 5-4. Alternate Access Transfer Modifier Encoding


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PDF M68040. MC68040 M68040 MC68LC040 MC68EC040. snoop filter MC68040V MC68EC040 "snoop filter"
PBE1

Abstract: MC68060 NM27P040 NM27P210 NM27P512
Text: follows: 00 - LONG 01 - BYTE 10 - WORD 11 - MOVE16 or Double Precision JG, 8/2/94 * Exception


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PDF NM27P6841. NM27P210, NM27P040 NM27P512 MOVE16 060tspec 40MHz EC060 PBE1 MC68060 NM27P210
1995 - 74xx373

Abstract: D31A0 XCF5102PV20A "LCK"
Text: . 5-4 Normal and MOVE16 Access Transfer Modifier Encoding . 5-5 Alternate


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PDF MCF5102 74xx373 D31A0 XCF5102PV20A "LCK"
1995 - 74xx373

Abstract: EQUIVALENT replacement for Tip 41C motorola databook XCF5102PV20A MCF5102 M68040 M68000 USPA AC tea 1010 motorola cmos databook
Text: . 5-4 Normal and MOVE16 Access Transfer Modifier Encoding . 5-5 Alternate


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PDF MCF5102 74xx373 EQUIVALENT replacement for Tip 41C motorola databook XCF5102PV20A M68040 M68000 USPA AC tea 1010 motorola cmos databook
1995 - EQUIVALENT replacement for Tip 41C

Abstract: 74xx373 M68000 M68040 MCF5102 xcf5102pv20a 9222L 2375L
Text: . 5-4 Normal and MOVE16 Access Transfer Modifier Encoding . 5-5 Alternate


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PDF MCF5102 EQUIVALENT replacement for Tip 41C 74xx373 M68000 M68040 xcf5102pv20a 9222L 2375L
296Bytes

Abstract: No abstract text available
Text: use any of the addressing modes listed in Table 2. The MC68LC040 instruction set includes MOVE16 , a , : normal access, MOVE16 access, alternate access, and interrupt acknowledge access. Normal accesses identify normal memory references; MOVE16 accesses are memory accesses by a MOVE16 instruction; and , bus transfer. Indicates the general transfer type: normal, MOVE16 , alternate logical function code


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PDF MC68LC040/D LC040 32-Bit MC68LC040 MC68040 M68000-compatible, MC68040-compatible 296Bytes
MC68EC040 pinout

Abstract: MC68040DH
Text: use any of the addressing modes of Table 2. The MC68EC040 instruction set includes MOVE16 , a new user , , TTO) that define four types of bus transfers: normal access, MOVE16 access, alternate access, and interrupt acknowledge access. Normal accesses identify normal memory references; MOVE16 accesses are memory accesses by a MOVE16 instruction; and alternate accesses identify accesses to the undefined address spaces , 32 bits of data per bus transfer. Indicates the general transfer type: normal, MOVE16 , alternate


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PDF MC68EC040 32-Bit MC68EC040 M68000-compatible, MC68040-compatible C68EC040/D 1ATX30112-3 MC68EC040 pinout MC68040DH
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