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Part Manufacturer Description Datasheet Download Buy Part
TMS320C28342ZFET Texas Instruments Delfino™ 32-bit MCU with 300 MIPS, FPU, 196 KB RAM, EMIF 256-BGA -40 to 105
TMS320F28334PTPS Texas Instruments Delfino™ 32-bit MCU with 150 MIPS, FPU, 256 KB Flash, EMIF, 12b ADC 176-HLQFP
TMS320F28332PTPS Texas Instruments Delfino™ 32-bit MCU with 150 MIPS, FPU, 128 KB Flash, EMIF, 12b ADC 176-HLQFP
TMS320C28343ZFEQ Texas Instruments Delfino™ 32-bit MCU with 200 MIPS, FPU, 260 KB RAM, EMIF 256-BGA -40 to 125
TMS320C28346ZFETR Texas Instruments Delfino™ 32-bit MCU with 300 MIPS, FPU, 516 KB RAM, EMIF 256-BGA -40 to 105
TMS320C28344ZFET Texas Instruments Delfino™ 32-bit MCU with 300 MIPS, FPU, 260 KB RAM, EMIF 256-BGA -40 to 105

MIPS R3000A Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1996 - MIPS R3000A

Abstract: R3000A VR3000 53C710 82596CA NCR53C710 R3010A VME controller
Text: monitors. The features of the PULSAR 3000 include: · 25 MHz MIPS R3000A processor (CPU) · 25MHz , Evaluation Boards Omnibyte PULSAR 3000" VME R3000A Single Board Computer Standard Features t VME single board computer featuring on-board Ethernet and SCSI controllers t 128k of , software to facilitate code development The Pulsar 3000 is a R3000A RISC-based, high performance, VME , battery back-up CPUs Supported R3000A · Dynamic big-endian and little-endian byte switching


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PDF R3000A 53C710. 32-bit 82596CA. 32-pin MIPS R3000A VR3000 53C710 82596CA NCR53C710 R3010A VME controller
MIPS R3000A

Abstract: toshiba R3900 microprocessor TX3900 R3000A TMPR3904F TX39 toshiba r3900 UPS Technologies
Text: Core as the CPU, which is a RISC CPU core Toshiba developed based on the MIPS ® R3000A architecture , TOSHIBA TMPR3904F 32-bit MIPS RISC Microprocessor Peripheral Features Description The , Built­in TX3900 Processor Core - Developed based on the R3000A architecture - Instruction cache 4KB and , . TMPR3904F 32-bit MIPS RISC Microprocessor Table 1. Pin Assignment Pin No. Signal 1 XIN 2 VDD 3 , SCS[3]* SCS[2]* SCS[1]* SCS[0]* VSS PIO0[0] PIO0[1] PIO0[2] 2 TMPR3904F 32-bit MIPS RISC


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PDF TMPR3904F 32-bit TMPR3904F TX39/H R3000A TX3900 MIPS R3000A toshiba R3900 microprocessor TX39 toshiba r3900 UPS Technologies
1996 - MIPS R3000A

Abstract: R3052 R3051 MIPS R3081 R3081 Pal programming R3000A IDT79R3081 IDT79R3051 R3051-BASED
Text: , enabling these devices to offer higher performance at lower cost. · MIPS R3000A compatible integer CPU , MIPS R3000A CPU. This RISC core is widely recognized as an extremely highperformance execution engine , operating systems, and other software tools developed around the standard R3000A work without modification , inherent capabilities of the MIPS coprocessor architecture. Specifically, if the kernel marks the , IDT/c allows the best capabilities of the MIPS compiler toolchain to be integrated with efficient


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PDF R3051-BASED AN-113 IDT79R3051TM R3051TM R3051 R3081 MIPS R3000A R3052 MIPS R3081 Pal programming R3000A IDT79R3081 IDT79R3051
1999 - MIPS R3000A

Abstract: TOSHIBA TC160G verilog code 16 bit CISC CPU TC160G TC180G TMPR3903AF verilog code for cisc processor microcontroller tlcs R3900 interface TC190G Toshiba R3900
Text: applications developed by Toshiba based on the MIPS R3000A architecture. The TX39 family can be used as a , communicators (PIC) g R3000A is a trademark of MIPS Technologies, Inc. s TX39 Family ASSP Products , by Toshiba based on the MIPS R3000A architecture. The TX19 family added support for MIPS16TM , Functions for Embedded Applications q R3000A architecture q High-performance: 42 MIPS (at 40 MHz , operations g R3000A and MIPS16 are trademarks of MIPS Technologies, Inc. ASIC Support q Implemented


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PDF 4594C-9904 MIPS R3000A TOSHIBA TC160G verilog code 16 bit CISC CPU TC160G TC180G TMPR3903AF verilog code for cisc processor microcontroller tlcs R3900 interface TC190G Toshiba R3900
1996 - MIPS R3000A

Abstract: AN-138 R3000A R3041
Text: IDT R3041 is a 32-bit RISC microprocessor designed for embedded applications. It is based on the MIPS R3000A microprocessor and is highly integrated, with large on-chip caches. There are 2 KBytes of Instruction cache and 512 Bytes of Data Cache. At 10 MHz it has a compute engine of about 8 MIPS . It is also


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PDF R3041 AN-138 R3041 MIPS R3000A AN-138 R3000A
1996 - MIPS R3000A

Abstract: SN00174 SN00177 R3000A R3000 PR31500ABC PR31500 LQFP208 CS4216 philips monochrome monitor
Text: configurations · Memory Management Unit ­ MIPS R3000A MMU contains on-chip TLB with: 32×64 bit wide entries , INTEGRATED CIRCUITS MIPS PR31500 Poseidon embedded processor Preliminary specification , specification MIPS PR31500 Poseidon embedded processor Version 0.1 GENERAL DESCRIPTION FEATURES · , /accumulator Instruction · R3000A memory management unit with on-chip TLB · Supports Big/Little Endian , , low-cost, integrated embedded processor consisting of MIPS R3000 core and system support logic to


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PDF PR31500 32-bit R3000 R3000A PR31500 MIPS R3000A SN00174 SN00177 PR31500ABC LQFP208 CS4216 philips monochrome monitor
2002 - R3000A

Abstract: MIPS R3000A dynamic LED traffic light signs details R3000a Performance Semiconductor YG6260 TX39 MIPS16 IEC825-1 1000H RFT Semiconductors
Text: 32-Bit TX System RISC TX19 Core Architecture MIPS16, application Specific Extensions and R3000A are a trademark of MIPS Technologies, Inc. The information contained herein is subject to change without notice. The information contained herein is presented only as a guide for the applications of our , Among TX19, the TX39 and R3000A Architectures," provides comparisons between the three RISC processor , . C-3 Appendix D Compatibility Among TX19, TX39 and R3000A


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PDF 32-Bit MIPS16, R3000A MIPS R3000A dynamic LED traffic light signs details R3000a Performance Semiconductor YG6260 TX39 MIPS16 IEC825-1 1000H RFT Semiconductors
MIPS R3000A

Abstract: R3000A 1000H MIPS16 TX39 TX39 Family Hardware
Text: -bit instructions of the TX39, which is based on MIPS Technologies, Inc.'s R3000A architecture. Thus the TX19 , instruction Upward compatible with the MIPS R3000A except for some of the coprocessor and TLB instructions , 16-bit extension of the full 32-bit MIPS architecture. The 32-bit ISA has 85 instructions, the 16 , registers of the full MIPS architecture. Additionally, certain instructions can use r24 (t8), r29 (sp) and , does not generate a MIPS machine instruction on its own, but instead contributes the 11-bit immediate


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PDF 900/L1 32-bit 16-bit 32-bit R3000A MIPS R3000A 1000H MIPS16 TX39 TX39 Family Hardware
IDT7RS101

Abstract: MIPS R3000A R3000A mips r3000 pin diagram 7RS301 R3010 mips processor R3000 mips
Text: ) CPU, based on the MIPS R3000 RISC processor, and supplied on a small fully-tested high-density plug-in , for the R3000 can be created on a MIPS develop ment system, on IDT's MacStationTM system, orusing IDT , 7RS101F66A20A 7RS101F66A25A 7RS101F66A30A 7RS101N66A16A 7RS101N66A20A 7RS101N66A25A 7RS101N66A30A CPU R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A FPA R3010A R3010A R3010A R3010A None None None None


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PDF R3000 IDT7RS101 32-blt IDT7RS101 7RS101F66A16A 7RS101F66A20A 7RS101F66A25A MIPS R3000A R3000A mips r3000 pin diagram 7RS301 R3010 mips processor R3000 mips
1998 - Not Available

Abstract: No abstract text available
Text: TMPR3907F is a 32-bit MIPS RISC microprocessor of the TX39 family. The TMPR3907F uses the TX39/H Processor Core as the CPU, which is a RISC CPU core Toshiba developed based on the MIPS® R3000A architecture , based on the R3000A architecture - Instruction cache 4KB and Data cache 1KB - Built-in Debug Support , COMPONENTS, INC. TMPR3907F 32-bit MIPS RISC Microprocessor ROM / Flash Control ROM / Flash Clock , TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC. 2 TMPR3907F 32-bit MIPS RISC Microprocessor Table 1


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PDF TMPR3907F 32-bit TX39/H R3000A R3000A
R3000A

Abstract: mips r3000 pin diagram P9103 R3000 MIPS R3000A R3010A R3010 mips processor r3000 instruction clock cycle R3010A Integrated Device Technology R3000 processor
Text: SYSTEMS: The IDT7RS103 is a family of interchangeable RISC CPU SubSystem modules, based on the MIPS R3000 , 7RS103F55A25A 7RS103N66A16A 7RS103N66A20A 7RS103N66A25A 7RS103N66A16A 7RS103N66A20A 7RS103N66A25A CPU R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A FPA NONE NONE NONE R3010A R3010A R3010A NONE NONE NONE R3010A R3010A R3010A NONE NONE NONE


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PDF R3000 IDT7RS103 7RS103-44) 7RS103-55) 7RS103-66) R3010 IDT7RS103 R3000A mips r3000 pin diagram P9103 MIPS R3000A R3010A R3010 mips processor r3000 instruction clock cycle R3010A Integrated Device Technology R3000 processor
1998 - MIPS R3000A

Abstract: R3000A TMPR3912U lcd 16*4 TMPR3922U TX39 toshiba DVD power supply pcmcia toshiba TC351
Text: · Built-in TLCS3920 Processor Core - Developed based on the MIPS RISC R3000A architecture - , a registered trademark and R3000A is a trademark of MIPS Technologies, Inc. www.toshiba.com/taec , TOSHIBA PRELIMINARY Description The TMPR3922U 32-bit MIPS ® RISC processor is a single-chip , terminals (WBT). The TMPR3922U is an enhanced version of the TMPR3912U 32-bit MIPS RISC microprocessor , -bit MIPS ® RISC Microprocessor · Interrupt and I/O Modules · Timer Module · Bus Interface Unit (BIU) -


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PDF TMPR3922U 32-bit TMPR3912U MIPS R3000A R3000A lcd 16*4 TX39 toshiba DVD power supply pcmcia toshiba TC351
7RS110

Abstract: AR3010 R3010 mips processor 7RS110N55A33A mips r3000 pin diagram 7RS110F54A25A 7RS310 R3000 processor R3001 R3000
Text: instruction set (RISC) SubSystem , based on the MIPS R3000 RISC processor, and supplied on a sm all , Analyzer. Code for the R3000 can be created on a MIPS develop ment system, on IDT's MacStationTM system, or , 7RS110F54A25A CPU R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3001 R3001 R3001 R3001 R3001


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PDF R3000 IDT7RS110 R3010 IDT7RS110 7RS110N54A16A 7RS110N54A20A 7RS110N54A25A 7RS110N54A33A 7RS110 AR3010 R3010 mips processor 7RS110N55A33A mips r3000 pin diagram 7RS110F54A25A 7RS310 R3000 processor R3001
mips r3000 pin diagram

Abstract: MIPS R3000A PB109 R3000A R3010 mips processor r3000 idt MIPS-R3000 R3020
Text: SYSTEMS: The IDT7RS109 is a complete reduced instruction set computer (RISC) CPU, based on the MIPS R3000 , Analyzer. Code for the R3000 can be created on a MIPS develop ment system, on IDT's MacStationTM system, or , 7RS107N66A33A 7RS109F66A16A 7RS109F66A20A 7RS109F66A25A 7RS109F66A33A CPU R3000A R3000A R3000A R3000A R3000A R3000A R3000A R3000A FPA NONE NONE NONE NONE R3010A R3010A R3010A R3010A l-cache 64K 64K 64K 64K 64 K 64


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PDF R3000 IDT7RS109 R3010 IDT7RS109 Floa66A25A mips r3000 pin diagram MIPS R3000A PB109 R3000A R3010 mips processor r3000 idt MIPS-R3000 R3020
motorola 68020 instruction set

Abstract: tc85r4400 CQFP-208 TC85R4000SC CQFP208 R4000SC R3000A TC85R4000PC-50 PGA44 MIPS R3000A
Text: TC85R4000SC-50 contains tested multiprocessor functionality. R3000A , R4000, R4400 are trade marks ol MIPS , R3081TM functional compatible · R3000A + I -Cache+D-Cache+R/W Buffer · l-Cache 8 or t6K Byte · D-Cache 8 , D-Cache 16K Byte · Secondary Cache Controller · Multiprocessor capability 64-bit RISC Processor · MIPS


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PDF TDS68DVLP TLCS-68000 32-bit 67MHz 16K-byte /68TM) 70M-byte 655K-byte motorola 68020 instruction set tc85r4400 CQFP-208 TC85R4000SC CQFP208 R4000SC R3000A TC85R4000PC-50 PGA44 MIPS R3000A
1995 - 3.3v to 5v buffer latch

Abstract: MIPS R3000A R3000A OPTi viper R3052 74FCT3245 74FCT163244 R3051 R3081 74FCT3373
Text: trademarks of Integrated Device Technology, Inc. MIPS is a registered trademark of MIPS Computer Systems , binary- 447 PGA compatible with the R3000A . Combines CPU, floating-point and 179 PGA 32KBof cache, capable of over 80 VAX mips sustained performance Fax Data Doc. Book Avail. No. Page NOW 2884 J 5.6 , compatible with the R3000A optimized for low-cost systems. 208 MQUAD Combines CPU, floating-point and 32KB of cache. IDT79RV3041 RISController, 2.5KB cache, R3000A core, 4-deep read/write buffers, low-cost


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PDF IDT54/74FCT163374/A/C 16-Bit IDT54/74FCT163501/A/C 18-Bit IDT54/74FCT163646/A/C IDT54/74FCT163652/A/C IDT54/74FCT163827/A/C 20-Bit 3.3v to 5v buffer latch MIPS R3000A R3000A OPTi viper R3052 74FCT3245 74FCT163244 R3051 R3081 74FCT3373
1999 - TMPR3903AF

Abstract: TMPR3901AF-70 tlcs 9000 Shenzhen Itron Electronics TX39 MIPS R3000A R3000A TMPR3904F 404 MIPS TMPR3907F
Text: processors based on the R3000A architecture designed by MIPS Technologies, Inc. Using the high-speed TX39/H , developed by Toshiba, based on the MIPS Group's R3000A architecture. The TMPR3901AF uses the TX39/H core , systems. High-performance core based on RISC technology R3000A architecture TX39/H processing performance: 74 MIPS (at 70 MHz) TX39 processing performance: 52 MIPS (at 50 MHz) Equivalent to Dhrystone , : TC200C-equivalent performance 2 TX System RISC Road Map Dhrystone 2.1 MIPS 300 TX79* Core Family


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PDF 32-Bit R3000A TX39/H VAX-11/780 TMPR3903AF TMPR3901AF-70 tlcs 9000 Shenzhen Itron Electronics TX39 MIPS R3000A TMPR3904F 404 MIPS TMPR3907F
TC85R4000

Abstract: TC85R4400 MIPS R3000A As3000
Text: multiprocessor functionality. R3000A , R4000, R4400 are trade marks of MIPS Technology Inc. R3081 is a trade mark , compatible · R3000A + I -Cache+D-Cache+R/W Buffer · l-Cache 8 or 16K Byte · D-Cache 8 or 4K Byte · 4 deep R/W , Cache Controller · Multiprocessor capability 64-bit RISC Processor · MIPS Architecture · l-Cache 16K


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PDF SW87AS0-TPE TLCS-870 SW90RS0-TPE TLCS-90 SW90AS0-TPE SW90CSO-TPE SW90RS1-TPE SW90RS2-TPE SW90RSA-TPE SW90RSC-TPE TC85R4000 TC85R4400 MIPS R3000A As3000
TX39

Abstract: VDD06 R3000A MIPS R3000A
Text: 66038 RC2160997 Frame 2 Page 1 Thursday, October 30, 1997 11:31 AM TOSHIBA TMP3912U 32-Bit MIPS , Toshiba and third party partners. The TMP3912U integrates a high performance, low power MIPS RISC , overall code requirements. Features · TX39 Core based on R3000A architecture · 74MHz performance · , Page 2 Thursday, October 30, 1997 11:31 AM TMP3912U 32-Bit MIPS RISC Processor Data TX39 RISC , Thursday, October 30, 1997 11:31 AM TMP3912U 32-Bit MIPS RISC Processor Electric Characteristics


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PDF RC2160997 TMP3912U 32-Bit RC32160997 TX39 VDD06 R3000A MIPS R3000A
R3000A

Abstract: mips r3000 pin diagram R3010 mips processor MIPS R3000A
Text: IDT7RS107 is a complete reduced instruction set computer (RISC) CPU, based on the MIPS R3000 RISC processor , Analyzer. Code for the R3000 can be created on a MIPS develop ment system, on IDT's MacStationTM system , S107F66A 33A CPU R 3000A R3000A R 3000A R3000A R3000A R 3000A R3000A R3000A FPA NONE NONE NONE NONE R3010A


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PDF R3000 IDT7RS107 R3010 IDT7RS107 7RS107F66A25A S107F66A R3000A mips r3000 pin diagram R3010 mips processor MIPS R3000A
1995 - inkjet cartridge chip

Abstract: pinout cartridge printer MIPS R3000A ink cartridge chip R36100 R3000A PROCESS CONTROL TIMER BASED TOPICS IDT79R36100TM FCT260 R4700
Text: five-stage pipeline. The purpose R3000A MIPS RISC CPU core and integrates CPU core contains an integer ALU , Instruction set compatible with the IDT RISController Family MIPS RISC CPUs · System-level integration , Memory, DMA and I/O controllers - System peripherals · 24 MIPS / 42K Dhrystone-2.1 at 25 MHz · Improved , highly integrated member of the R3000A CPU. By integrating the system functionality IDT RISController , Core The R36100 RISController is based on the R3000A embedded applications. The high level of


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PDF IDT79R36100TM MQUAD-208 inkjet cartridge chip pinout cartridge printer MIPS R3000A ink cartridge chip R36100 R3000A PROCESS CONTROL TIMER BASED TOPICS IDT79R36100TM FCT260 R4700
R3051

Abstract: 79r3001 MIPS R3051 R3052 MIPS Translation Lookaside Buffer TLB R3000 embedded microprocessors IDT79R3051 79R3052E 79R3052 79R3051
Text: IDT79R3000A and IDT79R3001 MIPS RISC CPUs • High level of integration minimizes system cost, power , interface to R3720/21/22 RISChipset 35 MIPS , over 64,000 Dhrystones at 40 MHz Low cost 84-pin PLCC , processing applications. The R3051 family is designed to bring the high-performance inherent in the MIPS RISC , the integer engine. Thus, the R3051 family is able to offer 35 MIPS of integer performance at 40 MHz , TLB file) as the R3052"E", and R3000A . • The R3051 incorporates 4kB of Instruction Cache, and uses


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PDF IDT79R3051 79R3051â 79R3051E 79R3052â 79R3052E IDT79R3000A IDT79R3001 79R3000A /79R3001 R3051 79r3001 MIPS R3051 R3052 MIPS Translation Lookaside Buffer TLB R3000 embedded microprocessors 79R3052E 79R3052 79R3051
R1900

Abstract: MIPS Technologies MIPS R3000A
Text: Operating Frequency: 20 MHz Package: 160pinQ FP · MIPS is a registered trademark and MIPS 16, Application Specific Extensions and R3000A are trademarks of MIPS Technologies, Inc. TMP1 9 0 4 A F 1997 - 5-8 - , TOSHIBA TENTATIVE R1900 PRODUCT DATA SHEET TMPR1 9 0 4 A F FEATURES R1900 Processor Core with Caches and RAM · Toshiba has uniquely developed this on the basis of the R3000ATM architecture and MIPS16TM Application Specific ExtensionsTM of MIPS Technologies, Inc. · 4kbytes of Instruction Cache (2


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PDF R1900 R3000ATM MIPS16TM MIPS Technologies MIPS R3000A
MIPS R3051

Abstract: No abstract text available
Text: compatible with IDT79R3000A and IDT79R3001 MIPS RISC CPUs • High level of integration minimizes system , Single clock input Direct interface to R3720/21/22 RISChipset 35 MIPS , over 64,000 Dhrystones at 40 MHz , applications. The R3051 family is designed to bring the high-performance inherent in the MIPS RISC ar , performance of the integer engine. Thus, the R3051 family is able to offer 35 MIPS of integer performance at , features the same full function MMU (including TLB file) as the R3052”E”, and R3000A . • The R3051


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PDF IDT79R3051 79R3051â 79R3051E 79R3052â 79R3052E IDT79R3000A IDT79R3001 79R3000A /79R3001 R3051 MIPS R3051
1996 - inkjet cartridge chip

Abstract: ink cartridge chip IDT79R36100 pin diagram of Dual core cpu R4700 MIPS R3000A R3052 R3081 R36100 R4650
Text: market. The R36100 Integrated RISController is based upon the general purpose R3000A MIPS RISC CPU core , -208 packaging · Instruction set compatible with the IDT RISController Family MIPS RISC CPUs · System-level , on-chip - Memory, DMA and I/O controllers - System peripherals · 24 MIPS / 42K Dhrystone-2.1 at 25 MHz , around the R3000A CPU. By integrating the system functionality onto a single chip, dramatic reductions , R36100 Integrated RISController is based on the R3000A CPU core. The R3000A is a full 32-bit RISC


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PDF IDT79R36100TM MQUAD-208 PQFP-208 208-pin IDT79R36100 25MHz 33MHZ IDT79RV36100 inkjet cartridge chip ink cartridge chip pin diagram of Dual core cpu R4700 MIPS R3000A R3052 R3081 R36100 R4650
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