The Datasheet Archive

Top Results (4)

Part ECAD Model Manufacturer Description Datasheet Download Buy Part
TS5MP645NYFPR TS5MP645NYFPR ECAD Model Texas Instruments 4-data lane 2:1 MIPI switch (10-channel, 2:1 analog switch) 36-DSBGA -40 to 85
TS5MP645YFPR TS5MP645YFPR ECAD Model Texas Instruments 4-data lane 2:1 MIPI switch (10-channel, 2:1 analog switch) 36-DSBGA -40 to 85
TS5MP646NYFPR TS5MP646NYFPR ECAD Model Texas Instruments 4-data lane, 2:1 MIPI switch (10-channel, 2:1 analog switch) 36-DSBGA -40 to 85
TS5MP646YFPR TS5MP646YFPR ECAD Model Texas Instruments 4-data lane, 2:1 MIPI switch (10-channel, 2:1 analog switch) 36-DSBGA -40 to 85

MIPI 1 lane Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2015 - MIPI 4 lanes

Abstract: No abstract text available
Text: fps 1 976 x 1 200 F2.4 640 x 480 F3.0 3 pcs. 61 1 pcs. 48 RAW ( Mipi , 2 lanes) 2.8/1.8/ 1.2 (I/O: 1.8 or 2.8) UYVY 2.8/1.8 (Parallel/ (I/O: 1.8 Mipi , 1 lane ) or 2.8 , 4 016 F2.0 6 pcs. 64 RAW 3.0/2.5/ ( Mipi , 4 lanes) 1.8/1.1 12.0 x 12.0 x 6.52 1 , 1 /2.8 type 0.56 cc Built-in high-speed auto focus function 9.5 x 9.5 x 6.15 1 /2.4 type 0.94 cc , 1 /2.8 type 0.56 cc Built-in high-speed auto focus function 9.5 x 9.5 x 6.15 RJ63AC500


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PDF RJ63EC200 RJ63GC900 RJ63AC500 RJ63ACL00 RJ63ACA00 25WL-CSP MIPI 4 lanes
2013 - LH154Q01

Abstract: LCD MIPI PANEL sharp
Text: , G6, B6) Interface MIPI 1-lane 24-bits (D-PHY version 0.92, DSI version 1.01 r11) Power , Configuration Pin Signal I/O Description 1 CLKP I/O MIPI Clock 2 VDD - 3.0V , Specification 1 . GENERAL DESCRIPTION The LH154Q01 is a Color Active Matrix Liquid Crystal Display with Light , and Blue sub-pixels or dots which are arranged in vertical stripes. Block Diagram Mipi D0+ R G B Mipi D0Mipi CLK+ User Connector (12 Pin) Mipi CLK- TFT-LCD Panel (240×RGB×240) VDD


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PDF LH154Q01 LH154Q01 LCD MIPI PANEL sharp
LR0G956

Abstract: TV SHARP driver sharp CCD Image Sensor LR35503 rj2361 LR35501
Text: 2.99 RAW ( Mipi , 2 lanes) F2.4 3 pcs. 61 F2.8 2 pcs. 47 UYVY ( Mipi , 1 lane ) F3.0 1 pcs. 48 UYVY (Parallel/ Mipi , 1 lane ) 2.8/1.8/ 1.2 (I/O: 1.8 or 2.8) 2.8/1.8 , Modules Road Map ~2012 2013 RJ63AC400 2014 RJ63AC500 1 /3.06 type 0.75 cc 13M ★RJ63ACL00 1 /3.06 type 0.45 cc Built-in optical image stabilization and auto focus functions 11.0 x 11.0 x 6.18 Built-in auto focus function 8.5 x 8.5 x 6.18 RJ63AC100 RJ63AC200 1 /3 type


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PDF RJ63AC400 RJ63AC500 RJ63ACL00 RJ63AC100 RJ63AC200 RJ63VC200 RJ64VC300 RJ64VC100 LR0G956 TV SHARP driver sharp CCD Image Sensor LR35503 rj2361 LR35501
2015 - RJ2361

Abstract: No abstract text available
Text: fps 1 976 x 1 200 F2.4 640 x 480 F3.0 3 pcs. 61 1 pcs. 48 RAW ( Mipi , 2 lanes) 2.8/1.8/ 1.2 (I/O: 1.8 or 2.8) UYVY 2.8/1.8 (Parallel/ (I/O: 1.8 Mipi , 1 lane ) or 2.8 , 4 016 F2.0 6 pcs. 64 RAW 3.0/2.5/ ( Mipi , 4 lanes) 1.8/1.1 12.0 x 12.0 x 6.52 1 , 1 /2.8 type 0.56 cc Built-in high-speed auto focus function 9.5 x 9.5 x 6.15 1 /2.4 type 0.94 cc , 1 /2.8 type 0.56 cc Built-in high-speed auto focus function 9.5 x 9.5 x 6.15 RJ63AC500


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PDF RJ63EC200 RJ63GC900 RJ63AC500 RJ63ACL00 RJ63ACA00 RJ2361
2013 - MIPI HDMI bridge

Abstract: No abstract text available
Text: -2: Two lane MIPI . c. MIPI -4: Four lane MIPI . d. LVDS- 1 : One channel LVDS. e. LVDS-2: Two channel LVDS , path input and outputs are: • Input – MIPI 2- lane • Output – RGB and LVDS- 1 Control path , – MIPI 2- lane and LVDS- 1 Control path input and outputs are: • Input – I2C and/or MIPI DBI , is a display interface bridge device enabling the connection of a MIPI 2- lane or MIPI 4- lane , €¢ Input – MIPI 2- lane • Output – MIPI 2- lane and RGB Control path input and outputs are: â


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PDF 1920x1200 MIPI HDMI bridge
2012 - MIPI SCI-2

Abstract: MIPI 1 lane
Text: . MIPI “video mode” only. b. MIPI -4: Four lane MIPI . c. MIPI -2: Two lane MIPI . • © 2012 , Reset MUX DBI to VEE DBI MUX Reg Bus Control 4- Lane MIPI DSI Client DBI DBI Slave VEE to DBI I2C Slave DPI DPHY DPI DPI 4- Lane MIPI DSI Client DEMUX Figure , SPI Master PWM Use Case Data path input and outputs are: • Input – MIPI 4- lane • Output – MIPI 4- lane Control path input and outputs are: • Input – I2C and/or MIPI display bus


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2012 - MIPI to RGB

Abstract: BX5A3B RGB to MIPI
Text: is a display interface bridge device enabling the connection of a RGB, MIPI 2- lane , or MIPI 4- lane processor with a RGB, MIPI 2- lane , MIPI 4- lane , LVDS 1-lane , or LVDS 2- lane display, with up to a maximum , MIPI -4a LVDS-2b 1920 x 1200 Smartphones and tablet computers c BX5A1D RGB LVDS- 1 , and tablet computers BX5B1D MIPI -2d LVDS- 1 1280 x 720 Smartphones and tablet computers , . MIPI -4: Four lane MIPI interface. b. LVDS-2: Dual link LVDS interface (eight data differential pairs


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PDF 1920x1200 MIPI to RGB BX5A3B RGB to MIPI
2010 - Not Available

Abstract: No abstract text available
Text: FSA641 – 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Description , The FSA641 is a 2: 1 MIPI switch made for 2-data lane and 1 -data lane modules. This part is configured , Switch, featuring 2-Data and 1 -Data Lane Configuration May 2012 FSA641 – 2: 1 MIPI Switch , Channel-to-Channel Skew CON Package Ordering Information 2: 1 MIPI , DPHY 2.65 to 4.3V 0 to VCC 7Ω Typical , Phones, Smartphones  Displays Typical Application FSA641 CLK MIPI Module # 1 (Higher


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PDF FSA641 -50dB -40dB 20-Lead FSA641UMX FSA641 FSA641ne 20-Lead,
2010 - Not Available

Abstract: No abstract text available
Text: FSA641 – 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Description , The FSA641 is a 2: 1 MIPI switch made for 2-data lane and 1 -data lane modules. This part is configured , Switch, featuring 2-Data and 1 -Data Lane Configuration May 2012 FSA641 – 2: 1 MIPI Switch , Channel-to-Channel Skew CON Package Ordering Information 2: 1 MIPI , DPHY 2.65 to 4.3V 0 to VCC 7Ω Typical , Phones, Smartphones  Displays Typical Application FSA641 CLK MIPI Module # 1 (Higher


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PDF FSA641 -50dB -40dB 20-Lead FSA641UMX FSA641 20-Lead,
2010 - MIPI CSI-2 Parallel bridge

Abstract: mipi dbi lcd panel MIPI bridge toshiba MIPI dbi
Text: 3- lane , CLK 1-lane with data rates up to 500 Mbps/ lane • MIPI DPI synchronous port • MIPI DBI , with a MIPI Display Serial Interface (DSI). The bridge supports an MDDI 1.2 Type 1 with up to 800 , of MDDI. The bridge supports MIPI DSI on the panel side with up to 500 Mbps per data lane times , /taec 1 The TC358760XBG bridge supports only the serial interfaces: MDDI and MIPI DSI interfaces , scenarios: Use Case 1 : MDDI to MIPI DSI Use Case 4: MIPI DPI to MIPI DSI Use Case 2: MDDI to MIPI DBI


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PDF TC358760/1 TC358760XBG TC358761XBG MIPI CSI-2 Parallel bridge mipi dbi lcd panel MIPI bridge toshiba MIPI dbi
2010 - MIPI

Abstract: MIPI camera module DSI to vga MO-248 MIPI CSI specification MIPI DSI specification MIPI 1 lane MIPI Specification MIPI switch FSA641UMX
Text: FSA641 ­ 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration September 2012 FSA641 ­ 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Features Switch Type Signal , . 1.0.3 www.fairchildsemi.com FSA641 ­ 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration , www.fairchildsemi.com FSA641 ­ 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration © 2010 Fairchild , Information 2: 1 MIPI , DPHY 2.65 to 4.3 V 0 to VCC 7 Typical HS MIPI 10 Typical LS MIPI 0.75 Typical HS & LS


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PDF FSA641 20-Lead FSA641UMX FSA641 20-Lead, MIPI MIPI camera module DSI to vga MO-248 MIPI CSI specification MIPI DSI specification MIPI 1 lane MIPI Specification MIPI switch FSA641UMX
2010 - TC358764

Abstract: LVDS to mipi bridge MIPI DSI version 1.01 MIPI DSI LCD panel driver MIPI DSI version 1.02 MIPI alliance TC358765
Text: 1.02, Dec 2008 • DSI Receiver – MIPI DSI-RX Data 4- lane , CLK 1-lane with data rates up to 800 , 4- lane MIPI DSI with data rates up to 800 Mbps per lane , for maximum total bandwidth of 3.2 Gbps , mobile product platforms such as MIDs, netbooks, smartbooks and eBooks. Data Lane 1 Baseband , CLK Lane LVDSClk ClkSel RSTX TEST www.Toshiba.com/taec 1 TC358764/5 Display Bridge (MIPI , Product Brief TC358764/5 Display Bridge ( MIPI DSI to LVDS) ® Highlights • Display


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PDF TC358764/5 TC358764 TC358765 LVDS to mipi bridge MIPI DSI version 1.01 MIPI DSI LCD panel driver MIPI DSI version 1.02 MIPI alliance
2010 - Db1n

Abstract: No abstract text available
Text: FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Features Description      The FSA641 is a 2: 1 MIPI switch made for 2-data lane and 1 , FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration June 2014 FSA641 CLK , www.fairchildsemi.com 2 FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Typical , www.fairchildsemi.com 5 FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration DC Electrical


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PDF FSA641 FSA641 com/dwg/UM/UMLP20B Db1n
2012 - Not Available

Abstract: No abstract text available
Text: -2: Two lane MIPI . c. MIPI -4: Four lane MIPI . © 2012 QuickLogic Corporation â , -4 to MIPI -4 and RGB Figure 1 : BX6B3E Architecture Use Case Data path input and outputs are: • Input – MIPI 4- lane • Output – MIPI 4- lane and RGB Control path input and outputs are: â , Data path input and outputs are: • Input – MIPI 2- lane • Output – MIPI 2- lane and RGB , internal registers and look-up tables (LUT). NOTE: The MIPI interface can also be used instead of I2C


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PDF 120-ball,
2014 - DPCD

Abstract: displayport 1.3 STANDARD TC358767AXBG edp transmitter
Text: Bi-direction support on Data Lane 0.  Maximum speed at 1 Gbps/ lane .  Supports Burst as well as , is from MIPI DSI Host.  MODE P21: TC358767AXBG uses DisplayPort Tx as single 2- lane DisplayPort , / 21 2014-04-10 TC358767AXBG REFERENCES 1 . MIPI DSI, " MIPI Alliance Specification for DSI , from 1 to 4- Lane configurations at bit rate up to 1 Gbps per lane . Host can transmit video in , ‚² Maximum speed at 1 Gbps/ lane .  Supports Burst as well as Non-Burst Mode Video Data. - Video data


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PDF TC358767AXBG TC358767AXBG P-VFBGA81-0505-0 DPCD displayport 1.3 STANDARD edp transmitter
2010 - 5 Display Bridge (MIPI® DSI to LVDS)

Abstract: Product Brief LVDS to mipi bridge TC358764 TC358764XBG LVDS to MIPI DSI TC358765 MIPI DSI LCD panel driver LVDS to rgb888 TC358765XBG
Text: panels. The TC358764/5 bridge can be configured to have up to a 4- lane MIPI DSI with data rates up to 800 , Data 4- lane , CLK 1-lane with data rates up to 800 Mbps/ lane ­ Video input frame sizes: Up to WXGA (1366 , pixel · RGB888 24 bits per pixel TxA_CLK Data Lane 0 Data Lane 1 Baseband/ Application Processor , Application Processors with a Mobile Industry Processor Interface ( MIPI ) Display Serial Interface. · Solutions are based on the latest versions of the industry-standard MIPI DSI 1.01 interface to ensure high-speed


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PDF TC358764 TC358765 TC358764/5 5 Display Bridge (MIPI® DSI to LVDS) Product Brief LVDS to mipi bridge TC358764XBG LVDS to MIPI DSI MIPI DSI LCD panel driver LVDS to rgb888 TC358765XBG
2009 - MIPI csi-2 spec

Abstract: MIPI spec MIPI DSI specification MIPI DSI spec MIPI dsi MIPI DSI version 1.01 MIPI MIPI D-PHY MIPI datasheet mipi DSI protocol
Text: analyzer 1 4 N4851A/B probe Differential flying lead probe MIPI D-PHY digital acquisition and stimulus system Probes between the N4851A/B and the. 1 . MIPI D-PHY probes 2. Method to create , lead probe MIPI D-PHY digital acquisition system Probes between the N4851A/B and the. 1 . MIPI , Agilent MIPI D-PHY Protocol Test Solutions N4851A/B MIPI D-PHY Acquisition Probe N4861A/B MIPI D-PHY Stimulus Probe Data Sheet · Accelerate your MIPI D-PHY test development · Simplify your


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PDF N4851A/B N4861A/B 5989-5063EN 5989-7921EN MIPI csi-2 spec MIPI spec MIPI DSI specification MIPI DSI spec MIPI dsi MIPI DSI version 1.01 MIPI MIPI D-PHY MIPI datasheet mipi DSI protocol
2010 - Not Available

Abstract: No abstract text available
Text: FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Description , Pitch FSA641UMX The FSA641 is a 2: 1 MIPI switch made for 2-data lane and 1 -data lane modules. This , www.fairchildsemi.com FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration September 2013 , €” 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Absolute Maximum Ratings All , . 1.0.4 www.fairchildsemi.com 5 FSA641 — 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane


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PDF FSA641 20-Lead FSA641UMX FSA641 com/dwg/UM/UMLP20B 20-Lead,
2010 - Not Available

Abstract: No abstract text available
Text: FSA641 – 2: 1 MIPI Switch, Featuring 2-Data and 1 -Data Lane Configuration Description , FSA641UMX The FSA641 is a 2: 1 MIPI switch made for 2-data lane and 1 -data lane modules. This part is , www.fairchildsemi.com FSA641 – 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration September 2012 , €“ 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration Absolute Maximum Ratings All , www.fairchildsemi.com 4 FSA641 – 2: 1 MIPI Switch, featuring 2-Data and 1 -Data Lane Configuration DC Electrical


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PDF FSA641 20-Lead FSA641UMX FSA641 20-Lead,
2012 - IMX139

Abstract: CXD4135gg sony image sensor 720p sony exmor CXD4135 exmor Sony CMOS image sensor IMX140 74-PIN IMX136
Text: 812 mV MIPI 1 , 2 lane MIPI 2, 4 lane MIPI 2, 4 lane Control communication interface I2C , standard interface simplifies connection to DSPs. The IMX137LQK provides a 1 or 2- lane connections while , IMX139LQJ is 594 Mbps/ lane . (See table 1 .) Package The image sensors are provided in an LGA (Land Grid , IMX137LQK, HD and Full HD High Picture Quality IMX139LQJ, CMOS Image Sensors with MIPI IMX140LQJ , Industry Processor Interface ( MIPI ). They use 2.8 µm and 3.75 µm square pixels developed for industrial


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PDF IMX137LQK, IMX139LQJ, IMX140LQJ IMX137LQK IMX140LQJ, IMX076LQZâ IMX104LQJâ IMX136LQJâ 94-pin IMX139 CXD4135gg sony image sensor 720p sony exmor CXD4135 exmor Sony CMOS image sensor IMX140 74-PIN IMX136
2009 - MIPI DSI specification

Abstract: No abstract text available
Text: operation Clock input = 1 /2 bit rate Clock input = 1 /10 bit rate 9 www.agilent.com/find/ MIPI , Samtec probes Logic analyzer 1 4 N4851A/B probe Differential flying lead probe MIPI D-PHY digital acquisition and stimulus system Probes between the N4851A/B and the… 1 . MIPI D-PHY probes , analyzer 1 4 N4851A/B probe Differential flying lead probe MIPI D-PHY digital acquisition system Probes between the N4851A/B and the… 1 . MIPI probes (One per Tx/Rx pair) 2. Logic


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PDF N4851A/B N4861A/B 5989-5063EN 5989-7921EN MIPI DSI specification
2010 - TC358762 De-serializer Display Bridge

Abstract: Product Brief DSI DBI RGB666
Text: Interface. • Solutions are based on the latest versions of industry standard MIPI DSI 1.01 interface to ensure high speed data rates of up to 800 Mbps per lane . • Legacy interfaces such as MIPI , display panel. The TC358762XBG bridge supports MIPI DSI dual lane with up to 800 Mbps per data lane , transfer from input port to output port as shown in the following use case scenarios: Use Case 1 : MIPI , DSI-RX Data 2- lane , CLK 1-lane with data rates up to 800 Mbps/ lane – Video input frame rates: Up to


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PDF TC358762 TC358762XBG TC358762 De-serializer Display Bridge Product Brief DSI DBI RGB666
2010 - TC358763 Serializer Display Bridge

Abstract: Product Brief
Text: applications. Features • LCD module interface – MIPI DSI-TX Data 3- lane , CLK 1-lane with data rates up to 500 Mbps/ lane – Support for XGA size LCD panel when MIPI DPI is selected as Host interface â , rates of up to 500 Mbps per lane . • Legacy interfaces such as MIPI DPI and MIPI DBI are supported , output port (Display Interface) as shown in the following use case scenarios: Use Case 1 : MIPI DPI to MIPI DSI Use Case 2: MIPI DBI to MIPI DSI www.Toshiba.com/taec 1 TC358763 Serializer Display


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PDF TC358763 TC358763XBG TC358763 Serializer Display Bridge Product Brief
2011 - SPCA7002A

Abstract: No abstract text available
Text: Sensor Interface Advanced Still Image Processing Peripherals  1 /2/4- lane MIPI /LVDS interface , baud rate  1-lane MIPI /LVDS interface for front camera  Zero shutter lag  GPIO pins  1G bps data rate for each MIPI /LVDS lane  On-the-fly bad pixel compensation ï , window  1 /2/4- lane MIPI /LVDS interface to the host processor  3D LUT color correction  1Gbps data rate for each MIPI /LVDS lane  Wide dynamic range  I2C interface for host control


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PDF SPCA7002A SPCA7002A SPCA7002Aâ 30fps 30fp64-1600
2014 - Not Available

Abstract: No abstract text available
Text: minimize the power consumption in the target system. Features ● LCD module interface - MIPI DSI-TX Data 3- lane , CLK 1-lane with data rates up to 500Mbps/ lane  Support up to XGA size LCD panel , 2014-05-29 TC358763XBG REFERENCES 1 . 2. 3. 4. MIPI Alliance Specification for D-PHY, Version , DSI-TX Data 3- lane , CLK 1-lane with data rates up to 500Mbps/ lane  Support up to XGA size LCD panel , Negative Input/Output DSI Data Lane 1 Positive Output DSI Data Lane 1 Negative Output DSI Data Lane 2


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PDF TC358763XBG TC358763XBG P-VFBGA72-0404-0
Supplyframe Tracking Pixel