The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
NS16C2552TVAX/NOPB Texas Instruments Dual UART with 16-byte FIFO and up to 5 Mbit/s Data Rate 44-PLCC -40 to 85
TPS2552DBV Texas Instruments IC 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, PLASTIC, SOT-23, 6 PIN, Power Management Circuit
NS16C2552TVSX/NOPB Texas Instruments Dual UART with 16-byte FIFO and up to 5 Mbit/s Data Rate 48-TQFP -40 to 85
TPS2552DRV Texas Instruments 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, GREEN, PLASTIC, SON-6
TPS2552DBV-1 Texas Instruments 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, PLASTIC, SOT-23, 6 PIN
NS16C2552TVA/NOPB Texas Instruments Dual UART with 16-byte FIFO and up to 5 Mbit/s Data Rate 44-PLCC -40 to 85

MAXQ612X-2552+ datasheet (1)

Part ECAD Model Manufacturer Description Type PDF
MAXQ612X-2552+ MAXQ612X-2552+ ECAD Model Maxim Integrated Integrated Circuits (ICs) - Embedded - Microcontrollers - IC MCU MICROPROCESSOR Original PDF

MAXQ612X-2552+ Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2009 - Not Available

Abstract: No abstract text available
Text: SIDE ENTRY SINGLE ROW PCB SOCKET 2552 SERIES. 2.54mm(0.100”). For PCB Solder Features  ï , 27 28 29 30 31 32 33 34 35 36 37 38 39 40 2552 -T021 2552 -T031 2552 -T041 2552 -T051 2552 -T061 2552 -T071 2552 -T081 2552 -T091 2552 -T101 2552 -T111 2552 -T121 2552 -T131 2552 -T141 2552 -T151 2552 -T161 2552 -T171 2552 -T181 2552 -T191 2552 -T201 2552 -T211 2552 -T221 2552 -T231 2552 -T241 2552 -T251 2552 -T261 2552 -T271 2552 -T281 2552 -T291 2552 -T301 2552 -T311 2552 -T321 2552 -T331 2552 -T341 2552


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2012 - 3m 2552

Abstract: No abstract text available
Text: Damping Foil 2552 Technical Data January, 2012 Product Description 3M™ Damping Foil 2552 consists of a room temperature pressure sensitive viscoelastic polymer on a dead soft aluminum , Damping Properties The high-energy dissipative polymer used in 3M damping foil 2552 can afford , in 3M damping foil 2552 converts vibration to negligible heat. Vibration amplitudes and , the results of 3M damping foil 2552 being tested per ASTM E756-83. A sample was applied to a 8.0 inch


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PDF 225-3S-06 3m 2552
2000 - ST16C2552

Abstract: No abstract text available
Text: FIFOs The ST16C2552 ( 2552 ) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 , either crystal or external clock input. The 2552 is available in 44, pin PLCC packages. The 2552 provides , the control registers for both UARTS concurrently. The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an advanced CMOS process to achieve low drain power and high speed


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PDF ST16C2552 16-Byte ST16C2552 NS16C552 NS16C552. DAN-107 DAN-108 AN2552
16-BYTE

Abstract: ST16C450 ST16C2552IJ44 ST16C2552CJ44 ST16C2552 NS16C552 NS16C550 INS8250 16C450 ST16C550
Text: ( 2552 ) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 byte FIFO's, a modem , . The 2552 is available in 44, pin PLCC packages. The 2552 provides block mode data transfers (DMA , UARTS concurrently. The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an , the 2552 or the 2552 and the CPU for a channel selected by CHSEL. Bit-0 of the MF Register overrides


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PDF ST16C2552 16-BYTE ST16C2552 NS16C552 ST16C450 ST16C2552IJ44 ST16C2552CJ44 NS16C550 INS8250 16C450 ST16C550
ST16C25521

Abstract: ST16C2552IQ48 ST16C2552IJ44 ST16C2552CQ48 ST16C2552CJ44 ST16C2552 NS16C552 NS16C550 INS8250 16C450
Text: ( 2552 ) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem , . The 2552 is available in 44, pin PLCC packages. The 2552 provides block mode data transfers (DMA , ARTS concurrently. The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an , between the user CPU and the 2552 or the 2552 and the CPU for a channel selected by CHSEL. Bit-0 of the MF


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PDF ST16C2552 16-BYTE ST16C2552 NS16C552 ST16C25521 ST16C2552IQ48 ST16C2552IJ44 ST16C2552CQ48 ST16C2552CJ44 NS16C550 INS8250 16C450
1990 - 16-BYTE

Abstract: ST16C450 ST16C2552IJ44 ST16C2552CJ44 ST16C2552 NS16C552 NS16C550 INS8250 16C450 ST16C550
Text: ST16C2552 DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFOS DESCRIPTION The ST16C2552 ( 2552 , version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem , . The 2552 is available in 44, pin PLCC packages. The 2552 provides block mode data transfers (DMA , UARTS concurrently. The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an , to be transferred between the user CPU and the 2552 or the 2552 and the CPU for a channel selected


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PDF ST16C2552 16-BYTE ST16C2552 NS16C552 ST16C450 ST16C2552IJ44 ST16C2552CJ44 NS16C550 INS8250 16C450 ST16C550
Not Available

Abstract: No abstract text available
Text: ST16C2552 ( 2552 ) is a dual universal asynchronous receiver and transmitter (UART). The ST16C2552 is an improved version of the NS16C552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a , crystal or external clock input. The 2552 is available in 44, pin PLCC packages. The 2552 provides block , the control registers for both U ARTS concurrently. The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an advanced CMOS process to achieve low drain power and high speed


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PDF ST16C2552 16-BYTE ST16C2552 NS16C552
1999 - 20MHZ

Abstract: 49C465 IDT49C465 IDT49C465A error correction code mlc L9908
Text: CONTROL System Checkbit Generator Byte Mux Mux SLE PLE MERR CBO0­7 2552 drw 01 , , Inc. 11.7 MAY 1999 DSC- 2552 /8 1 IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND , SD27 BE3 SD28 VCC VCC SD4 BE0 VCC PIN CONFIGURATION 2552 drw 02 PQFP TOP VIEW , ) 2552 drw 03 TOP VIEW 11.7 3 INTERNAL FINAL SYNDRO ME 8 8 MUX 8 SYNDROME , PCBI0­7 2552 drw 04 4 MILITARY AND COMMERCIAL TEMPERATURE RANGES 4 IDT49C465/A 32


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PDF L9908-04 49C465/A 64-bit IDT49C465/A 32-BIT 49C465 20MHZ 49C465 IDT49C465 IDT49C465A error correction code mlc L9908
2001 - INS8250

Abstract: No abstract text available
Text: Programmable character lengths (5, 6, 7, 8) with Even, odd, or no parity The ST16C2552 ( 2552 ) is a dual , UART. The 2552 provides enhanced UART functions with 16 byte FIFO's, a modem control interface, and , Mbps. The Baud rate generator can be configured for either crystal or external clock input. The 2552 is available in 44, pin PLCC packages. The 2552 provides block mode data transfers (DMA) through FIFO controls , . The 2552 is functionally compatible with the NS16C552. The 2552 is fabricated in an advanced CMOS


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PDF ST16C2552 AN2552 DAN-107 DAN-108 16-Byte NS16C552 INS8250, NS16C550 24MHz NS16C552. INS8250
1997 - E20A

Abstract: LM6118 LM6118N LM6218AN LM6218N
Text: www.national.com DS010254 PrintDate=1997/07/16 PrintTime=07:55:48 2552 ds010254 Rev. No. 1 Proof 1 1 , PrintTime=07:55:49 2552 ds010254 Rev. No. 1 2 Proof 2 Absolute Maximum Ratings Junction , voltage range is (V+ - 1V) to (V-). 3 PrintDate=1997/07/16 PrintTime=07:55:51 2552 ds010254 Rev. No , /16 PrintTime=07:55:52 2552 ds010254 Rev. No. 1 DS010254-33 4 Proof 4 Typical , =07:55:52 2552 ds010254 Rev. No. 1 DS010254-42 www.national.com Proof 5 Typical


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PDF LM6118 ds010254 E20A LM6118 LM6118N LM6218AN LM6218N
1995 - G1442

Abstract: 20MHZ IDT49C465 IDT49C465A SD10 SD12 SD13 SD031
Text: CBO0­7 SLE PLE 2552 drw 01 CONTROL CONTROL The IDT logo is a registered trademark and , 2552 drw 02 PQFP TOP VIEW 11.7 2 IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND , internally PGA (CAVITY UP) 2552 drw 03 TOP VIEW 11.7 3 11.7 CODE ID 0,1 MODE0 , MUX 2552 drw 04 4 IDT49C465/A 32-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT , EXT.BUFFER EXT. BUFFER CBI CPU BUS CHECKBITS CBO 2552 drw 07 2552 drw 05 Figure 3


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PDF IDT49C465 IDT49C465A 32-BIT IDT49C465/A 32-bit, 64-bit IDT49C465/A 49C465 G1442 20MHZ IDT49C465 IDT49C465A SD10 SD12 SD13 SD031
1995 - S 21 MD 4v

Abstract: ic xnor 20MHZ IDT49C465 IDT49C465A SD10 SD12 SD13
Text: CONTROL CONTROL System Checkbit Generator Byte Mux Mux SLE PLE MERR CBO0­7 2552 , SD24 SD25 SD26 SD27 BE3 SD28 VCC VCC SD4 BE0 VCC PIN CONFIGURATION 2552 drw 02 , PGA (CAVITY UP) 2552 drw 03 TOP VIEW 11.7 3 INTERNAL FINAL SYNDRO ME 8 8 , GENERATOR CBO0­7 CBOE 8 PCBI0­7 2552 drw 04 4 MILITARY AND COMMERCIAL TEMPERATURE RANGES , EXT. BUFFER EXT.BUFFER EXT. BUFFER CBI CPU BUS CHECKBITS CBO 2552 drw 07 2552 drw


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PDF IDT49C465 IDT49C465A 32-BIT 64-bit 100mA 20MHZ 144-pin IDT49C465/A S 21 MD 4v ic xnor 20MHZ IDT49C465 IDT49C465A SD10 SD12 SD13
U 2554 b

Abstract: u 2555 b MTA-156 358e
Text: 5-641 255-2 5-641255-1 5-641 255-0 4-641 255- 4-641 255-E 4-641 255-7 4-641 255-6 4-641 233-5 4-641255-4 4-641 255-5 4-641 255-2 4-641255-1 4-641 235-0 5-641255-9 5-641 255-E 3-641255-7 5-641255-6 5-641255-5 5-641255-4 5-641255-5 5-641255-2 -641 255-4 -641 255-5 2-641 255-2 -641255-1 -641 255-0 -641 255-9 -641 255-E -641 255-7 -641 255-6 -641 255-5 -641 233-4 -641 255-5 -641 255-2 -641 255-0 341 255-9 641 255-7 641


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PDF UL94V-2 WITHOM07 255-E 51VcoEIÂ MTA-156 U 2554 b u 2555 b 358e
tea 1633

Abstract: SOLI ELECTRONICS INDUSTRY soli capacitors
Text: 13×24 1125 16×28 1344 16×33 1421 18×36 1699 22×43 1744 25×52 2430 3300 332 13×27 1150 13×27 1288 16×28 1454 16×33 1611 18×36 1640 22×43 2027 25×52 2309 4700 472 13×27 1354 16×28 1552 16×33 1650 18×36 1881 22×43 2280 25×43 2347 25×52 2710 6800 682 16×28 1762 16×33 1930 18×36 2040 18×42 2170 22×43 2470 25×52 2650 10000 103 16×36 2062 18×36 2122 18×42 2503 22×43 2893 25×52 3180 Frequency coefficient of allowable ripple current Freq


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PDF 120Hz) tea 1633 SOLI ELECTRONICS INDUSTRY soli capacitors
Not Available

Abstract: No abstract text available
Text: 18×36 1699 22×43 1744 25×52 2430 3300 332 13×27 1150 13×27 1288 16×28 1454 16×33 1611 18×36 1640 22×43 2027 25×52 2309 4700 472 , 25×52 2710 6800 682 16×28 1762 16×33 1930 18×36 2040 18×42 2170 22×43 2470 25×52 2650 10000 103 16×36 2062 18×36 2122 18×42 2503 22×43 2893 25×52 3180 AXIAL TYPE E.CAP.No1 2007 7 -


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soli capacitors

Abstract: SOLI ELECTRONICS INDUSTRY D1664
Text: 1051 13×24 1125 16×28 1344 16×33 1421 18×36 1699 22×43 1744 25×52 2430 3300 332 13×27 1150 13×27 1288 16×28 1454 16×33 1611 18×36 1640 22×43 2027 25×52 2309 4700 472 13×27 1354 16×28 1552 16×33 1650 18×36 1881 22×43 2280 25×43 2347 25×52 2710 6800 682 16×28 1762 16×33 1930 18×36 2040 18×42 2170 22×43 2470 25×52 2650 10000 103 16×36 2062 18×36 2122 18×42 2503 22×43 2893 25×52 3180 Frequency coefficient of allowable ripple current Freq.(Hz) Cap. (µF) 60


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PDF 120Hz) soli capacitors SOLI ELECTRONICS INDUSTRY D1664
ACS8520

Abstract: ocxo tcxo ACS8530 ACS8527 ACS8526 ACS8525 ACS8522 ACS8515 ACS8510 2.048 MHz
Text: , 25.52 MHz · · · · · · · · · · · · · · · · · · · , 6.48, 19.44, 25.52 , 38.88, 51.84, 77.76 MHz 1.544 MHz or 2.048 MHz (E1 or DS1) · · · · · , · · · · · · · · · · · · · · · 25.52 MHz 38.88 MHz, 51.84 , · · · · · · · · · 6.48 MHz, 25.52 MHz 19.44 MHz · 38.88 MHz


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PDF ACS8515 ACS8525 ACS8526 ACS8527 ACS8520 ocxo tcxo ACS8530 ACS8527 ACS8526 ACS8525 ACS8522 ACS8515 ACS8510 2.048 MHz
2003 - soket

Abstract: No abstract text available
Text: sure that pin 1 on both sides are correctly aligned. V H8S/2556,H8S/ 2552 ,H8S/2506 Groups FP , (HS2556ECH61H) for the Renesas's original microcomputer H8S/2556, H8S/ 2552 , and H8S/2506 groups. The HS2556ECH61H is a user system interface cable that connects an H8S/2556, H8S/ 2552 , and H8S/2506 groups E6000 , for the H8S/2556, H8S/ 2552 , and H8S/2506 groups MCU on the user system. i Contents Section , using the H8S/2556, H8S/ 2552 , and H8S/2506 groups E6000 emulator, turn on the emulator according to the


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PDF HS2556ECH61H) H8S/2556 H8S/2552H8S/2506 FP-144J E6000 H8S/2552 H8S/2506 soket
1997 - IRD 10

Abstract: sanyo brushless dc MM3097 MFP16FS LB1666 LB1663M LB1663 DIP16F Sanyo LB1663M ird sat
Text: Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN N3097HA(II)/7037KI/6197TA,TS No. 2552 - 1/6 , +125 °C * Note: 20 × 30 × 1.5 mm3 glass epoxy board No. 2552 - 2/6 LB1663, 1663M, 1666 , 0.2 3.9 0.39 0.83 0.48 Unit V V V V V V mV nA V µA µA V V No. 2552 - 3/6 , µF. *2: Use a less leaky capacitor. No. 2552 - 4/6 LB1663, 1663M, 1666 Truth Table IN­ C , proper. The lock detect time can be set by changing the capacitor constant. GND Ground No. 2552


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PDF 2552C LB1663, 1663M, DIP10S LB1663] LB1663M, LB1666 IRD 10 sanyo brushless dc MM3097 MFP16FS LB1663M LB1663 DIP16F Sanyo LB1663M ird sat
sanyo led display sl

Abstract: SL-2572-01K SL2572-01K SL-2572 SL-2552 O312 SL-1524 SL254
Text: LED Display TM SANYO S E M I C O N D U C T O R CO RP S3E D 7c H7D7b GG G ' m S S « » tits mA 5 -1 0 1 0 -1 5 5 -1 0 1 0 -1 5 5 -1 0 1 0 -1 5 5 -1 0 1 0 -1 5 17T TSAJ7*y/*33 5 ffirLEDl& ^ SETF « « Type No. « K « Drawing No. nm (Color) L-37 L 37 SL-1552 SL- 2552 SL-1572 SL-2572-01K SL , : mm L -37 Pin No 20 SL-1541 SL-2541 L -38 SL-1552 SL- 2552 M ax ¿ T 4 0 5_5 Min, Common Cathode SL-1552, SL- 2552 *8*3*1507975-% . M îW r3SISlS23806Ç iíSSJr*IB1507975-S§-, S S f S


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PDF SL-1552 SL-2552 SL-1572 SL-2572-01K SL-1524 SL-2524 SL-1541 SL-2541 sanyo led display sl SL2572-01K SL-2572 O312 SL254
Not Available

Abstract: No abstract text available
Text: output on the SD outputs. MEMORY I/O CPU i/o CHECKBITS 2552 drw 07 2552 drw 05 Figure , C m jj a a a SD MEMORY OUTPUTS MD EDC CBI CHECKBITS CPU BUS CBO 2552 drw , , the parity is odd. Inputs 0-7 CODE ID1,0 2552 IW 01 4AE5771 QOnTflT ^ST 11.7 7 , 15 0 7 6 5 4 8 7 3 2 1 0 0 2552 d iw 12 DIAGNOSTIC FEATURES â , , operation in this mode is identical to “Normal” Mode operation. 2552 tbl 03 ■4 Ô 2 5 7 7 1


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PDF 32-BIT IDT49C465 IDT49C465A 64-bit 100mA 20MHz 144-pin IDT49C4NOTES: IDT49C465/A
JG0-0129NL

Abstract: jw0-0009nl 553-1367-ND J00-0065NL JG0 Series 3, C JG0-0025NL JK0-0014NL Gigabit PulseJack 7499010122
Text: /100BASE-TX Dual Row Multiport G-Y-G/Y CMT 7 11 T,C T,C 1CT:1CT 1CT:1CT 32.00 x 31.50 x 25.52 G/Y-G/Y - 7 11 T,C T,C 1CT:1CT 1CT:1CT 32.00 x 31.50 x 25.52 G-Y CMT 7 11 T,C T,C 1CT:1CT 1CT:1CT 32.00 x 59.44 x 25.52 G/Y-G/Y - 7 11 T,C T,C 1CT:1CT 1CT:1CT 32.00 x 59.44 x 25.52 G-Y CMT 7 8 T,C T,C 1CT:1 1CT:1 32.00 x 115.31 x 25.52 Power over Ethernet (PoE) 10/100Base , Gigabit 1CT:1 1CT:1 31.65 x 17.53 x 25.52 - Gigabit(11) 10 10 Gigabit Gigabit 1CT:1 1CT:1 28.95 x


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PDF 75ohm 732-1649-ND 732-1650-ND 732-1654-ND 732-1646-ND 732-1647-ND 732-1648-ND 732-1651-ND 732-1653-ND 732-1652-ND JG0-0129NL jw0-0009nl 553-1367-ND J00-0065NL JG0 Series 3, C JG0-0025NL JK0-0014NL Gigabit PulseJack 7499010122
"msm 561"

Abstract: dpi 510 2565 nec LC7257 PD57C nec 2565 SL-1514 Tottori Sanyo Electric SL2541 D03D
Text: -25-65 10-15 2.05 15 200 15 10 565 SL-1552 L-25 o 15 60 3 1.3 -25-65 5-10 1.9 5 100 5 10 700 SL- 2552 , lüiiüi u D« L—25 SL-1552 SL- 2552 .jpitch aoxn-zao -t Fin Connect ion Tolerance :±036 Unit , a * 16 Dl Common Cathode B D3 Common Cathode Com. Cothode SL- 1552, 2552 7. 6. 3. 1J4JI22. î> C d « f 9 9 9 9 9 ! ?! ' ! 1} H '.} '! '] D2 10. Colon 13. LSI 1552 » 2552 B A 618 f AP057C


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PDF SL-1541 SL-2541 SL-1552 SL-2552 SL-1514 SL-2514 7257F SL-1582 SL-2582 SL-1582 "msm 561" dpi 510 2565 nec LC7257 PD57C nec 2565 Tottori Sanyo Electric SL2541 D03D
2557T

Abstract: MIPS R3000A
Text: generate-only mode for CPU I/O SD MD ^ MEMORY I/O EDC CBI CHECKBITS CBO 2552 drw 05 Figure , MEMORY ro c m 30 ii a a SD MD EDC CBI MEM O RY INPUTS MEM O RY OUTPUTS CHECKBITS CBO 2552 , ) UPPER EDC (CODE ID 1,0 = 11) (D ETEC T AND CORRECT) 2552 drw 10 Figure 6. 64-Bit M ode - 2 Cascaded , B IT S -O U T UPPER 32 BITS (3 2 -6 3 ) 32 SDO-31 EDC 2552 drw 11 Figure 7. 64-Bit "G , -bit cascade (01) 64-bit "C heckbit-generate-only" unit (11) Upper slice of a 64-bit cascade 2552 tbl 01


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PDF 32-BIT IDT49C465 IDT49C465A 64-bit 100mA 20MHz 144-pin IDT49C465/A 32-bit, 2557T MIPS R3000A
2000 - ST16C2552CJ44-F

Abstract: marking AFR PC16552
Text: -107, Interfacing 16Cxxx UARTs to a CPU Version 1.0.0 August 1999 32.43 KB Description The ST16C2552 ( 2552 ) is , of the PC16552 UART. The 2552 provides enhanced UART functions with 16 byte FIFOs, a modem control , . The 2552 provides block mode data transfers (DMA) through FIFO controls. DMA transfer monitoring is , ability to write the control registers for both UARTs concurrently. The 2552 is available in the 44 , 2006 REV. 4.2.1 GENERAL DESCRIPTION The ST16C2552 ( 2552 ) is a dual universal asynchronous receiver


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PDF ST16C2552 PC16552 ST16C2552CJ44-F marking AFR PC16552
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