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MAS-1/4 datasheet (1)

Part ECAD Model Manufacturer Description Type PDF
MAS-1/4 MAS-1/4 ECAD Model Greenlee Textron Miscellaneous, Undefined Category, MASONRY 1/4 BIT Original PDF

MAS-1/4 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
sdc 7500

Abstract: c2sc MAS-1202 MAS-0801 MAS-1001 MAS-1001-1 MAS 35 cbn -0001
Text: internal clock pulses, gated on during the conversion period. POWER REQUIREMENTS + 14 .SV to , * • Storage °C -55 to +85 * * PHYSICAL CHARACTERISTICS Case Diailyl Phthalate per M1L-M- 14 Type , 13 BIT 7 OUT 361. +5V POWER IN 14 BIT 8 OUT PIN FUNCTION PIN FUNCTION 1 DATA READY 16 BIT 10 OUT , BIT 7 OUT 34 -15V POWER IN 14 BIT 8 OUT 35 +15V POWER IN 15 BIT 9 OUT 36 +5V POWER IN ORDERING


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PDF 12-Bit MAS-0801, MAS-1202 sdc 7500 c2sc MAS-0801 MAS-1001 MAS-1001-1 MAS 35 cbn -0001
THC-0300

Abstract: THS-0060 MAS-1001 235S MAS-0801 MAS-1202
Text: * * TEMPERATURE RANGE Operating Storage PHYSICAL CHARACTERISTICS Case Diallyl Phthalate per MIL-M- 14 Type SDC-F , OUT 34 -15V POWER IN 12 BIT 6 OUT 35 +15V POWER IN 13 BIT 7 OUT 36 +5V POWER IN 14 BIT 8 OUT PIN , UNIPOLAR ZERO 12 BIT 6 OUT 33 POWER GROUND 13 BIT 7 OUT 34 -15V POWER IN 14 BIT 8 OUT 35 +15V POWER IN , & HOLD CONVERTER 74S74 12 20 20 13 T 33 14 r 1 DATA READY STROBE


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PDF 12-Bit MAS-1202 THC-0300 MAS-0801 MAS-1001 1900ns 1940ns 100ns l-40nsTYP 100ns THS-0060 235S
TRANSISTOR D400 data sheet download

Abstract: 3843 Power Supply IC Data Sheet f10 SC4 3843 Power Supply IC TRANSISTOR D400 MAS3507D transistor BD400 PI13 44E-2 mas3507
Text: Output Interface (PIO) 13 13 13 13 14 14 14 14 14 14 15 15 15 16 16 16 16 17 17 3 , : Schematic timing of the SDI (MPEG) input Vh SOC Vl Vh SOD SOI 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Vl Vh Vl left 16-bit audio sample , register bit assignment1) 15 14 13 12 11 10 09 08 07 06 05 04 03 02 , register bit assignment 3.2.2. Conventions for the Command Description 15 14 13 12 11 10


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PDF 6251-459-2PD 3507D TRANSISTOR D400 data sheet download 3843 Power Supply IC Data Sheet f10 SC4 3843 Power Supply IC TRANSISTOR D400 MAS3507D transistor BD400 PI13 44E-2 mas3507
Not Available

Abstract: No abstract text available
Text: Output Interface (PIO) 13 13 13 13 14 14 14 14 14 14 15 15 15 16 16 16 16 17 17 3 , : Schematic timing of the SDI (MPEG) input Vh SOC Vl Vh SOD SOI 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Vl Vh Vl left 16-bit audio sample , 3507D. Table 3–3: Control register bit assignment1) 15 14 13 12 11 10 09 08 , . Conventions for the Command Description 15 14 13 12 11 10 09 08 m 07 06 05


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PDF 3507D 6251-459-2PD
chn 521

Abstract: BA 7277 chn 548 SCR 2122 chn233 Integrated 7246 CHN 65 MICRONAS BSP carrier detect phase shift filter mcl 0 105
Text: [ 14 3D RXC Basic Mode - RS-232C Interlace BASIC BASIC IET Œ • 2ÏÏ1 TXC GNDD Œ • 4Ö1 , Interface Mode Control INT - 14 O Interrupt LOP 6 - I Local Analog Loop OSP 8 - I Overspeed Control PSK4 21 - O Received PSK Signal Quality QUA 14 - o PSK Mode Select RD - 12 I Read REL - 18 o Relay , GNDA1 2 - - Analog Ground GNDA2 3 - - Analog Ground GNDD 1 22 - Digital Ground MCI ,2 23,24 14 I Mode , Signal TXS4 14 9 I Transmitted Signal to Filters VDDA 17 11 — +5 Vdc Supply Voltage VDDD 16 10 - +5


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PDF RS-232C 22-PIN 28-PIN 40-PIN SF-02771 chn 521 BA 7277 chn 548 SCR 2122 chn233 Integrated 7246 CHN 65 MICRONAS BSP carrier detect phase shift filter mcl 0 105
g.729 codec chip

Abstract: No abstract text available
Text: 11 12 12 12 13 13 14 14 14 14 14 15 15 15 15 16 16 16 17 Section 1. 1.1. 1.2. 1.2.1. 1.2.2. 2. 2.1 , Vh SOD 15 14 13 12 11 10 9 8 Vl 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 , value For further details, see `write D0 memory' command. 14 Micronas ADVANCE INFORMATION , to 0 Default (hex) 8000 Name DCCF bit[16: 14 ,9] output voltage / internal voltage monitor (PUP , bit[19:15] bit[ 14 ] not used, set to 0 output clock signal 0 standard timing 1 inverted timing not used


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PDF MAS3504D 6251-522-2AI 3504D 3504D g.729 codec chip
2003 - Not Available

Abstract: No abstract text available
Text: BENEFITS · · · · · · Compact footprint ( 14 x 15 mm) Supports high density / small device applications High , designation: Material Mating sleeve None External parts Metal 5.3 4 14 10.6 MAS Universal Flange , parts Metal (20.5) 14 MAS E-2000TM (16.65) Order Number ø 2.5 165 - 331 - 905 V 001 (20.8) (15.9) 14 Type designation: Material Mating sleeve Zirconia MAS SC (16.65) ø 2.5 11.65 14.5 External parts Metal / Plastic Order Number 112 - 331 - 904 V 001 15 (13.4) 14 2


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PDF E-2000TM, F-3000TM F-3000TM)
2004 - portable dvd player schematic diagrams

Abstract: MC 1310 stereo endecoder fm stereo MAS3539F g.729 codec chip MC 1310 stereo decoder 12 v dc - 24 v dc step-up converter schematic g.729 codec
Text: page 14 ) ­ Volume-optimized solution. DC/DC 1 (e.g. 2.7 V) supplies controller, flash and MAS 35x9F audio parts, DC/DC 2 generates e.g. 2.2 V for the MAS 35x9F DSP (see Fig. 2­9 on page 14 ). ­ Minimized , Fig. 2­10 on page 14 ). ­ External power supply. All components are powered by an external source, no DC/DC converter is used (see Fig. 2­11 on page 14 ). battery voltage monitor to I2C interface DCCF , : Solution 4: External power supply 14 June 30, 2004; 6251-505-1DS Micronas DATA SHEET MAS


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PDF 35x9F 6251-505-1DS 35x9F portable dvd player schematic diagrams MC 1310 stereo endecoder fm stereo MAS3539F g.729 codec chip MC 1310 stereo decoder 12 v dc - 24 v dc step-up converter schematic g.729 codec
2001 - Not Available

Abstract: No abstract text available
Text: 19 with flange 2 7 3 13,6 1 1 19,6 12,1 ø 14 ,9 MAB 3 S 28,5 22,2 Panel-mounted socket 3,2 4 19 with flange 2 7 3 ø 14 ,9 4 13,6 1 19,6 12,1 , ¸ 14 ,9 4 MAB 5 28,5 22,2 Panel-mounted socket 3,2 5 19 with flange 7 4 5 1 3 13,6 1 19,6 12,1 ø 14 ,9 2 MAB 5 S 28,5 22,2 Panel-mounted socket 3,2 6 19 with flange 6 3 7 2 5 13,6 1 19,6 12,1 4 1 ø 14 ,9


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2004 - Not Available

Abstract: No abstract text available
Text: BENEFITS · · · · · · Compact footprint ( 14 x 15 mm) Supports high density / small device applications High , designation: Material Mating sleeve None External parts Metal 5.3 4 14 10.6 MAS Universal Flange , parts Metal (20.5) 14 MAS E-2000TM (16.65) Order Number ø 2.5 165 - 331 - 905 V 001 (20.8) (15.9) 14 Type designation: Material Mating sleeve Zirconia MAS SC 14.5 External parts , ) 14 2 / 2.2 Type designation: Mating sleeve Zirconia Zirconia MAS FC Order Number 110 - 331 -


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PDF E-2000TM, F-3000TM F-3000TM)
matrix 1000 w ups schematic diagram

Abstract: lm 317 soc 8 Zetec
Text: 10 10 10 11 11 11 13 13 13 13 14 14 14 14 14 14 15 15 15 16 16 16 16 17 17 Section 1. 1.1. 1.2. 1.2.1 , 14 13 12 11 10 9 8 7 4 3 15 iH 11 10 8 7 SOI 1 left 16-bit audio , bit assignment1) 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 X X X X X X X , for the Command Description 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 m I The , 13.10 DCFR (4 bits) 0 (reset) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Function DC/DC converter output


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PDF 3507D 3507D matrix 1000 w ups schematic diagram lm 317 soc 8 Zetec
2001 - G.729 10ms chip

Abstract: g.729 codec chip SIPRO
Text: ) Example 2:32 Bit/Sample (Inverted SOI) 12 12 12 13 13 14 14 14 14 14 15 15 15 16 16 16 , `write to memory' command (see Section 3.3. on page 14 ) into an area of internal RAM. A `run' command , . 2­5. Vh SOC Vl Vh SOD V l SOI 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 , positions within a transmission where this may happen are indicated by 'Wait' in Section 3.3. on page 14 , ' command. 14 Micronas MAS 3504D 3.3.5. Read Register 3.3.7. Read D1 Memory 1) send command


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PDF 6251-522-1DS 3504D G.729 10ms chip g.729 codec chip SIPRO
2000 - F1A36

Abstract: MAS3507D PI13 Zetec F995B Schematic mpeg 1 MAS 35 BFC00 FF986 17C63
Text: Output Interface (PIO) 13 13 13 13 14 14 14 14 14 14 15 15 15 16 16 16 16 17 17 3 , : Schematic timing of the SDI (MPEG) input Vh SOC Vl Vh SOD SOI 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Vl Vh Vl left 16-bit audio sample , register bit assignment1) 15 14 13 12 11 10 09 08 07 06 05 04 03 02 , register bit assignment 3.2.2. Conventions for the Command Description 15 14 13 12 11 10


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PDF 6251-459-2PD 3507D F1A36 MAS3507D PI13 Zetec F995B Schematic mpeg 1 MAS 35 BFC00 FF986 17C63
2000 - "missing fundamental"

Abstract: g.729 codec chip 3509F
Text: 8 8 9 9 9 9 10 10 10 10 10 11 11 13 14 14 14 14 14 14 14 15 15 15 15 16 16 16 Section 1. 1.1. 1.2. 2 , software uses the inputs for PCM data, the interface acts as a I2S-type with SI(B)I as a word strobe. 14 , Subaddress (hex) 6A Function Name Control Register (reset value = 3000hex) bit[15: 14 ] Code 00 01 10 11 , Register (reset = 5050hex) DC/DC Converter 2 bit[15] bit[ 14 :11] PUP2: Voltage monitor 2 flag (readback , DCFR bit[ 14 ] bit[13:10] bit[9:8] The result is stable after 1 ms after enabling. The setup


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PDF 3509F 6251-505-1AI 3509F "missing fundamental" g.729 codec chip
2004 - g.729 codec chip

Abstract: g729 3509F MC 1310 stereo decoder mp3 player schematic diagram MPEG 1 Audio Compression SOD 23 3539F
Text: , DC/DC 2 (e.g. 2.7 V) supplies controller and flash (see Fig. 2­8 on page 14 ) If only one DC/DC , MAS 35x9F audio parts, DC/DC 2 generates e.g. 2.2 V for the MAS 35x9F DSP (see Fig. 2­9 on page 14 ). , remains off (see Fig. 2­10 on page 14 ). ­ External power supply. All components are powered by an external source, no DC/DC converter is used (see Fig. 2­11 on page 14 ). battery voltage monitor , V e.g. 2.2 V Analog Parts Fig. 2­9: Solution 2: Volume-optimized 14 AVDD0/1 e.g. 2.7


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PDF 6251-505-1DS 35x9F 35x9F g.729 codec chip g729 3509F MC 1310 stereo decoder mp3 player schematic diagram MPEG 1 Audio Compression SOD 23 3539F
2002 - PQFN64

Abstract: PI14 MAS3587F
Text: Supplement: No. 4/ 6251-548-3PDS Edition: Jan. 14 , 2002 PQFN64 Package Specification for MAS , 12 VDD SUPPLY X DSP supply 13 XVDD SUPPLY X Digital output supply 14 , X I2C clock 25 I2CD IN/OUT X I2C data page 2 of 4 Jan. 14 , 2002 , Micronas Jan. 14 , 2002; 6251-548-3PDS page 3 of 4 MAS 35x9F, MAS 3587F Pin No. Pin Name , . page 4 of 4 Jan. 14 , 2002; 6251-548-3PDS Micronas -


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PDF 35x9F, 3587F PQFN64 6251-505-1PD, 3587F, 6251-542-2PD, 6251-548-3PDS 35x9F PI14 MAS3587F
G.729 10ms

Abstract: SDS0604 3504D g.729 codec chip 17C63
Text: 3504D Contents Page 4 4 5 5 5 6 6 6 6 6 6 6 6 6 7 7 8 8 8 8 9 9 10 10 10 11 11 12 12 12 13 13 14 14 14 14 14 15 15 15 15 16 16 16 17 Section 1. 1.1. 1.2. 1.2.1. 1.2.2. 2. 2.1. 2.2. 2.2.1. 2.2.2. 2.3. 2.4 , data by 1 clock cycle is shown in Fig. 2­5. Vh SOC Vl Vh SOD 15 14 13 12 11 10 9 8 Vl 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 SOI Vh Vl left 16-bit audio sample , ' command. 14 Micronas ADVANCE INFORMATION MAS 3504D 3.3.7. Read D1 Memory Not supported in


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PDF 3504D 6251-522-1AI 3504D G.729 10ms SDS0604 g.729 codec chip 17C63
TRANSISTOR D400 data sheet download

Abstract: transistor BD400 E3400 ic 3843 external data sheet TRANSISTOR D400 TRF 840 PI13 MAS 35 d7220
Text: 13 13 14 14 15 15 16 2. 2.1. 2.2. 2.3. 2.4. 2.4.1. 2.4.2. 2.4.3. 2.5. 2.6. 2.6.1 , interface in 16 bit/sample mode is shown in Fig. 2­6. . Vh SOC Vl Vh SOD SOI 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Vl Vh Vl left 16 , timing of the SDO interface in 32 bit/sample mode 14 Micronas MAS 3507D PRELIMINARY DATA


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PDF 6251-459-3PD 3507D TRANSISTOR D400 data sheet download transistor BD400 E3400 ic 3843 external data sheet TRANSISTOR D400 TRF 840 PI13 MAS 35 d7220
g.729 codec chip

Abstract: DSA003669
Text: 11 12 12 12 13 13 14 14 14 14 14 15 15 15 15 16 16 16 17 Section 1. 1.1. 1.2. 1.2.1. 1.2.2. 2. 2.1 , Vh SOD 15 14 13 12 11 10 9 8 Vl 7 6 5 4 3 2 1 0 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 , value For further details, see `write D0 memory' command. 14 Micronas ADVANCE INFORMATION , to 0 Default (hex) 8000 Name DCCF bit[16: 14 ,9] output voltage / internal voltage monitor (PUP , bit[19:15] bit[ 14 ] not used, set to 0 output clock signal 0 standard timing 1 inverted timing not used


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PDF MAS3504D 6251-522-2AI 3504D 3504D g.729 codec chip DSA003669
transistor D0030

Abstract: g.729 codec chip
Text: 10 11 11 11 11 11 12 12 14 15 15 15 15 15 15 15 16 16 16 16 17 17 17 2. 2.1 , given in Fig. 2­9 on page 14 . The DC/DC converters are designed to generate an output voltage between , . 14 Micronas ADVANCE INFORMATION 2.8. Interfaces The MAS 35x9F uses an I2C control , -µH inductor and, furthermore, to the sense pin VSENSn via a Schottky diode (see Fig. 2­9 on page 14 ). , (hex) Function Name 6A Control Register (reset value = 3000hex) CONTROL bit[15: 14


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PDF 6251-505-2AI 35x9F 35x9F transistor D0030 g.729 codec chip
2001 - MAS3587F

Abstract: 16 Bit, 16 x Fs PCM Audio DAC "audio recorder" BIT1612
Text: 8 9 9 9 9 9 9 9 10 10 10 10 11 11 11 11 11 13 13 14 14 14 14 14 14 14 15 , recommended to hold the SIBC Pin low. 14 Micronas MAS 3587F ADVANCE INFORMATION 2.12. MPEG , (reset value = 3000hex) CONTROL bit[15: 14 ] Analog Supply Voltage Range Code 00 01 10 11 , /DC Converter 2 bit[15] PUP2: Voltage monitor 2 flag (readback) bit[ 14 :11] Voltage between , [ 14 ] Number of battery cells 0 1 cell (range 0.8.1.5 V) (reset) 1 2 cells (range 1.6.3.0 V


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PDF 6251-542-1AI 3587F MAS3587F 16 Bit, 16 x Fs PCM Audio DAC "audio recorder" BIT1612
2003 - digital dts dolby 5.1 ic amplifier circuits

Abstract: 5.1 home theatre basic diagram 7.1 channel assembled home theater circuit diagram 5.1 home theatre audio system diagram for making 5.1 home theatre schematic diagram dolby digital dts decoder MSP44x0G prologic II 5.1 circuit diagram 5.1 home theatre circuit diagram dolby digital 5.1 surround sound dolby pcb
Text: 9 10 10 10 11 11 11 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 14 15 , configuration. The required setup must be done by the controller in D0:13ED and D0:13EE. 14 The Virtual


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PDF 35xyH 6251-589-2PD 6251-598-2PD digital dts dolby 5.1 ic amplifier circuits 5.1 home theatre basic diagram 7.1 channel assembled home theater circuit diagram 5.1 home theatre audio system diagram for making 5.1 home theatre schematic diagram dolby digital dts decoder MSP44x0G prologic II 5.1 circuit diagram 5.1 home theatre circuit diagram dolby digital 5.1 surround sound dolby pcb
2003 - digital dts dolby 5.1 ic amplifier circuits

Abstract: 5.1 home theatre circuit diagram digital dts dolby 5.1 ic 5.1 home theatre basic diagram 2.1 to 5.1 home theatre circuit diagram 5.1 surround sound dolby circuits BEST BASS TREBLE for home theater 5.1 home theatre audio system diagram for making 5.1 home theatre schematic diagram 5.1 channel surround sound IC
Text: 9 10 10 10 11 11 11 11 11 11 11 12 12 12 12 13 13 13 13 14 14 14 14 14 15 , configuration. The required setup must be done by the controller in D0:13ED and D0:13EE. 14 The Virtual


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PDF 35xyH 6251-589-1PD 6251-598-2PD digital dts dolby 5.1 ic amplifier circuits 5.1 home theatre circuit diagram digital dts dolby 5.1 ic 5.1 home theatre basic diagram 2.1 to 5.1 home theatre circuit diagram 5.1 surround sound dolby circuits BEST BASS TREBLE for home theater 5.1 home theatre audio system diagram for making 5.1 home theatre schematic diagram 5.1 channel surround sound IC
Power management portable DVD player schematic diagram

Abstract: transistor D0030 g.729 codec chip
Text: 10 11 11 11 11 11 12 12 14 15 15 15 15 15 15 15 16 16 16 16 17 17 17 2. 2.1 , given in Fig. 2­9 on page 14 . The DC/DC converters are designed to generate an output voltage between , . 14 Micronas ADVANCE INFORMATION 2.8. Interfaces The MAS 35x9F uses an I2C control , -µH inductor and, furthermore, to the sense pin VSENSn via a Schottky diode (see Fig. 2­9 on page 14 ). , (hex) Function Name 6A Control Register (reset value = 3000hex) CONTROL bit[15: 14


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PDF 6251-505-2AI MAS35x9F 35x9F 35x9F Power management portable DVD player schematic diagram transistor D0030 g.729 codec chip
930 015-517

Abstract: MAS 8100 S mab5sh 933 175-100 mak 60 mas 30 931 744-200
Text: Panel-mounted socket 3,2 3 19 with flange 2 7 3 13,6 1 1 19,6 12,1 ø 14 ,9 MAB 3 S 28,5 22,2 Panel-mounted socket 3,2 4 19 with flange 2 7 3 ø 14 ,9 , 5 13,6 1 19,6 12,1 ø 14 ,9 4 MAB 5 28,5 22,2 Panel-mounted socket 3,2 5 19 with flange 7 4 5 1 3 13,6 1 19,6 12,1 ø 14 ,9 2 MAB 5 S , 19,6 12,1 4 1 ø 14 ,9 MAB 6 28,5 22,2 Panel-mounted socket 3,2 7 19


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