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LVDCI18 Datasheets Context Search

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2001 - Not Available

Abstract: No abstract text available
Text: _15, LVDCI_18 , LVDCI_25, and LVDCI_33. IOB R Z0 Virtex-II DCI UG002_c2_047_120400 Figure 2-96 , LVDCI_15 LVDCI_18 LVDCI_25 LVDCI_33 LVDCI_DV2_15 LVDCI_DV2_15 LVDCI_DV2_25 LVDCI_DV2_33 The following , _15, LVDCI_18 , LVDCI_25, LVDCI_33 Using these buffers configures the outputs as controlled impedance drivers


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PDF UG002
2001 - LVDS-25

Abstract: LVDS25 16X1S LVDSEXT25 LVDSEXT-25
Text: _33 (1) LVDCI_25 (1) LVDCI_DV2_25 (1) LVDCI_18 (1) LVDCI_DV2_18 (1) LVDCI_15 (1) LVDCI_DV2_15 (1) GTL_DCI , (I & II), LDT, ULVDS, BLVDS LVCMOS18, GTL, GTLP, LVDCI_18 , LVDCI_DV2_18 HSTL (I, II, III, & IV , , BLVDS, ULVDS_25 1.8V LVCMOS18, LVDCI_18 , LVDCI_DV2_18, LVDS_33, LVDS_25, LDT, ULVDS_25 1.5V LVCMOS15 , _33, LVDS_25, LVDSEXT_25, LDT, BLVDS, ULVDS_25 LVCMOS18, LVDCI_18 , LVDCI_DV2_18, LVDS_33, LVDS_25, LDT , _25, LVDCI_DV2_25, LVDS_33, LVDSEXT_33, LVDS_25, LVDSEXT_25, LDT, BLVDS, ULVDS_25 LVCMOS18, LVDCI_18


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PDF DS031-2 LVCMOS33 LVCMOS25 LVCMOS18 LVCMOS15 DS031-1, DS031-3, DS031-2, DS031-4, LVDS-25 LVDS25 16X1S LVDSEXT25 LVDSEXT-25
2002 - LVDCI25

Abstract: LVDCI18 HSTL_
Text: are: LVDCI_15, LVDCI_18 , LVDCI_25, and LVDCI_33. Figure 2-97 illustrates a controlled impedance driver , following are valid DCI attributes for output drivers: · · · · 342 LVDCI_15 LVDCI_18 LVDCI_25 LVDCI , . LVDCI_15, LVDCI_18 , LVDCI_25, LVDCI_33 Using these buffers configures the outputs as controlled


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PDF LVCMOS25 LVCMOS25 LVCMOS33 LVCMOS33 UG012 LVDCI25 LVDCI18 HSTL_
2001 - LVDSEXT-25

Abstract: 16x1D LVPECL33 16X1S LVDCI25 LVDCI18 LVDS-33 LVDSEXT25 LVDS-25 LVDCI15
Text: 2.5 N/A Series LVDCI_DV2_25 (1) 2.5 2.5 N/A Series LVDCI_18 (1) 1.8 1.8 , _25, LVDCI_DV2_25, SSTL2_DCI (I & II), LDT, ULVDS, BLVDS 1.8 V LVCMOS18, GTL, GTLP, LVDCI_18 , LVDCI_DV2 , _25, LVDS_33, LVDSEXT_33, LVPECL_33, LVDS_25, LVDSEXT_25, LDT, BLVDS, ULVDS_25 LVCMOS18, LVDCI_18 , _25, SSTL2_I_DCI, SSTL2_II_DCI LVCMOS18, LVDCI_18 , LVDCI_DV2_18, LVDS_33, LVDSEXT_33, LVPECL_33, LVDS , _33, LVPECL_33, LVDS_25, LVDSEXT_25, LDT, BLVDS, ULVDS_25 LVCMOS18, LVDCI_18 , LVTTL, LVDCI


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PDF DS031-2 LVCMOS33 LVCMOS25 DS031-1, DS031-3, DS031-4, DS031-2, LVDSEXT-25 16x1D LVPECL33 16X1S LVDCI25 LVDCI18 LVDS-33 LVDSEXT25 LVDS-25 LVDCI15
2004 - SPARTAN-3 XC3S400

Abstract: SPARTAN-3 XC3S400 PQ208 XC3S400 XC3S1500 SPARTAN-3 BOARD SPARTAN-3 XC3S400 tq144 UG112 XC3S50 XC3S200 SPARTAN-3 XC3S1000
Text: - 0.20VCCO 0.70VCCO LVCMOS18, LVDCI_18 , LVDCI_DV2_18(4) 1.7 1.8 1.9 - - , LVCMOS12(4) 24 ­24 Note 3 Note 3 LVDCI_15, LVDCI_DV2_15 LVCMOS18(4) LVDCI_18 , _25 0.18 0.21 ns LVCMOS18 0.24 0.28 ns RSDS_25 0.43 0.50 ns LVDCI_18 , HSTL_II_DCI_18 0.75 0.86 ns LVDCI_18 0.81 0.94 ns HSTL_III_18 0.28 0.32 ns


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PDF DS099-3 DS099-1, DS099-2, DS099-3, DS099-4, SPARTAN-3 XC3S400 SPARTAN-3 XC3S400 PQ208 XC3S400 XC3S1500 SPARTAN-3 BOARD SPARTAN-3 XC3S400 tq144 UG112 XC3S50 XC3S200 SPARTAN-3 XC3S1000
2003 - SPARTAN-3 XC3S400 PQ208

Abstract: SPARTAN-3 XC3S400 tq144 BLVDS-25 XC3S400 xc3s200 LVDSEXT25 XC3S400 FG1156 XC3S400 PQ208 dcm xc3s50 LVDS25
Text: _18, HSTL_II_DCI_18 HSTL_III_18, HSTL_III_DCI_18 LVCMOS12(3) LVCMOS15, LVDCI_15, LVDCI_DV2_15(3) LVCMOS18, LVDCI_18 , _18 LVCMOS12(4) 2 4 6 LVCMOS15(4) 2 4 6 8 12 LVDCI_15, LVDCI_DV2_15 LVCMOS18(4) 2 4 6 8 12 16 LVDCI_18 , , LVDCI_15, LVDCI_DV2_15 LVCMOS18, LVDCI_18 , LVDCI_DV2_18 LVCMOS25, LVDCI_25, LVDCI_DV2_25 LVCMOS33, LVDCI , 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA LVDCI_18 LVDCI_DV2_18 LVCMOS25 ­0.18 ­0.15 ­0.15 ­0.13 0.08 0.07 , Timing Measurement at I/Os (Continued) Inputs VREF Signal Standard LVCMOS18 LVDCI_18 LVDCI_DV2


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PDF DS099-3 DS099-1, DS099-2, DS099-3, DS099-4, SPARTAN-3 XC3S400 PQ208 SPARTAN-3 XC3S400 tq144 BLVDS-25 XC3S400 xc3s200 LVDSEXT25 XC3S400 FG1156 XC3S400 PQ208 dcm xc3s50 LVDS25
2004 - SPARTAN-3 XC3S400 PQ208

Abstract: SPARTAN-3 XC3S400 tq144 XC3S400 HSLVDCI33 FG320 LVPECL25 xc3s200 HSLVDCI18
Text: _15, LVDCI_DV2_15(4) LVCMOS18, LVDCI_18 , LVDCI_DV2_18(4) LVCMOS25(4,5), LVDCI_25, LVDCI_DV2_25(4) LVCMOS33, LVDCI , _18 LVCMOS12(4) 2 4 6 LVCMOS15(4) 2 4 6 8 12 LVDCI_15, LVDCI_DV2_15 LVCMOS18(4) 2 4 6 8 12 16 LVDCI_18 , _15 LVCMOS18 LVDCI_18 LVDCI_DV2_18 LVCMOS25 0.44 0.36 0.51 0.29 0.51 0.51 0.51 0.37 0.36 0.39 0.45 0.63 0.42 , 1.51 1.32 Slow 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA Fast 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA LVDCI_18 LVDCI_DV2 , _15 LVDCI_DV2_15 LVCMOS18 LVDCI_18 LVDCI_DV2_18 LVCMOS25 LVDCI_25 LVDCI_DV2_25 LVCMOS33 LVDCI_33 LVDCI_DV2


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PDF DS099-3 DS099-1, DS099-2, DS099-3, DS099-4, SPARTAN-3 XC3S400 PQ208 SPARTAN-3 XC3S400 tq144 XC3S400 HSLVDCI33 FG320 LVPECL25 xc3s200 HSLVDCI18
2003 - XC3S400 pin inputs

Abstract: XC3S400 SPARTAN-3 XC3S400 pin BLVDS-25 LVDSEXT25 XC3S200 TMS 3450 DS099 DS099-3 LVDSEXT-25
Text: _18, HSTL_III_DCI_18 LVCMOS12(3) LVCMOS15, LVDCI_15(3) LVCMOS18, LVDCI_18 (3) LVCMOS25, LVDCI_25(3,4) LVCMOS33, LVDCI , _18 HSTL_II_18, HSTL_II_DCI_18 HSTL_III_18, HSTL_III_DCI_18 LVCMOS12(3) LVCMOS15, LVDCI_15(3) LVCMOS18, LVDCI_18


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PDF DS099-3 DS099-1, DS099-2, DS099-3, DS099-4, XC3S400 pin inputs XC3S400 SPARTAN-3 XC3S400 pin BLVDS-25 LVDSEXT25 XC3S200 TMS 3450 DS099 DS099-3 LVDSEXT-25
2002 - ibis format

Abstract: hyperlynx Device Reliability report XILINX
Text: impedance controlled driver. The results shown in Figure 4-42 show the waveforms from an LVDCI_18 driver


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PDF FG256 FG456 FF672 FF896 XC2VP20 ibis format hyperlynx Device Reliability report XILINX
2004 - XC3S400

Abstract: HSLVDCI25 xc3s200 XC3S50 XC3S400FT SPARTAN-3 XC3S400 PQ208 Spartan-3 FPGA Family XC3S200 minimum system LVCMOS25 HSLVDCI18
Text: ) LVCMOS15, LVDCI_15, LVDCI_DV2_15(4) LVCMOS18, LVDCI_18 , LVDCI_DV2_18(4) LVCMOS25(4,5), LVDCI_25, LVDCI_DV2 , _18 LVCMOS12(4) 2 4 6 LVCMOS15(4) 2 4 6 8 12 LVDCI_15, LVDCI_DV2_15 LVCMOS18(4) 2 4 6 8 12 16 LVDCI_18 , LVDCI_15 LVDCI_DV2_15 LVCMOS18 LVDCI_18 LVDCI_DV2_18 LVCMOS25 LVDCI_25 LVDCI_DV2_25 0.44 0.36 0.51 0.29 , 6 mA 8 mA 12 mA 16 mA LVDCI_18 LVDCI_DV2_18 LVCMOS25 Slow 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA 24 mA Fast


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PDF DS099-3 desi8/24/04 DS099-1, DS099-2, DS099-3, DS099-4, DS312, DS313, DS314-1, XC3S400 HSLVDCI25 xc3s200 XC3S50 XC3S400FT SPARTAN-3 XC3S400 PQ208 Spartan-3 FPGA Family XC3S200 minimum system LVCMOS25 HSLVDCI18
2010 - XQR5VFX130

Abstract: XQR5VFX130C Virtex-5QV XQR5VFX130-CF1752 UG198 XQR5V UG190 UG193 UG203 diode 226
Text: VCCO ­ 0.4 Note (2) Note (2) LVCMOS18, LVDCI18 ­0.3 35% VCCO 65% VCCO VCCO + 0.3 , LVDCI_33 0.92 2.13 2.13 ns LVDCI_25 0.92 2.16 2.16 ns LVDCI_18 1.00


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PDF DS692 UG190, UG191, UG193, UG198, XQR5VFX130 XQR5VFX130C Virtex-5QV XQR5VFX130-CF1752 UG198 XQR5V UG190 UG193 UG203 diode 226
2010 - XQR5VFX130-CF1752

Abstract: XQR5VFX
Text: , LVDCI18 –0.3 35% VCCO 65% VCCO VCCO + 0.3 0.45 VCCO – 0.45 Note (3) Note (3 , LVDCI_33 1.11 2.51 2.51 ns LVDCI_25 0.92 2.40 2.40 ns LVDCI_18 1.00


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PDF DS692 DS192, UG520, UG190, UG191, XQR5VFX130-CF1752 XQR5VFX
2001 - xc2v1000

Abstract: XC2V6000-ff1152 XC2V80
Text: _18 HSTL IV_18 SSTL2 I SSTL2 II SSTL3 I SSTL3 II AGP LVDCI_33 LVDCI_25 LVDCI_18 0.00 0.00 0.11 0.42 0.98 , _33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2_33 LVDCI_DV2_25 LVDCI_DV2_18 LVDCI_DV2_15 GTL_DCI GTLP_DCI , LVDCI25 LVDCI18 3.3 1.2 1.5 0.75 0.75 1.5 1.5 0.9 0.9 1.8 1.8 1.5 1.5 1.25 1.25 0.9 0.9 0 3.3 LVDCI15 HSTL


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PDF DS031-3 xc2v1000 XC2V6000-ff1152 XC2V80
2001 - Virtex-II

Abstract: XC2V80 XC2V6000-ff1152 LVPECL25 XAPP623 XC2V1500 XC2V250 XC2V3000 XC2V40 XC2V500
Text: _18 LVDCI_18 0.42 0.43 0.49 ns Data Input Delay Adjustments Standard-specific data input , ns TOLVDCI_18 LVDCI_18 0.84 0.87 0.95 ns TOLVDCI_15 LVDCI_15 1.82 1.88 , 3.3 LVDCI25 1M 0 1.25 0 PCI-X - rising edge 25 0 0.94 LVDCI18 1M 0


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PDF DS031-3 Virtex-II XC2V80 XC2V6000-ff1152 LVPECL25 XAPP623 XC2V1500 XC2V250 XC2V3000 XC2V40 XC2V500
2010 - XQR5VFX130

Abstract: XQR5VFX130-CF1752 XQR5VFX130C FPGA Virtex 6 Ethernet CF1752 UG203 UG198 UG193 UG191 DS692
Text: 0.7 1.7 VCCO + 0.3 0.4 VCCO ­ 0.4 Note (2) Note (2) LVCMOS18, LVDCI18 ­0.3 , LVDCI_33 1.11 2.51 2.51 ns LVDCI_25 0.92 2.40 2.40 ns LVDCI_18 1.00


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PDF DS692 DS192, UG520, UG190, UG191, XQR5VFX130 XQR5VFX130-CF1752 XQR5VFX130C FPGA Virtex 6 Ethernet CF1752 UG203 UG198 UG193 UG191 DS692
2009 - XC6VLX550T

Abstract: XC6VLX130T XC6VSX475T XC6VLX240T XC6VSX315T XC6VLX75T XC6VLX760 ds152 XC6VLX365T XC6VLX760-FF1760
Text: ) LVCMOS18, LVDCI18 ­0.3 35% VCCO 65% VCCO VCCO + 0.3 0.45 VCCO ­ 0.45 Note(4) Note , _25 0.54 0.61 0.70 2.05 2.14 2.26 2.05 2.14 2.26 ns LVDCI_18 0.58 0.65


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PDF DS152 XC6VLX550T XC6VLX130T XC6VSX475T XC6VLX240T XC6VSX315T XC6VLX75T XC6VLX760 ds152 XC6VLX365T XC6VLX760-FF1760
2001 - 2V3000

Abstract: power supply module for calculator SR 51 II XC2V1000 2V1000 ULVDS-25 2V4000 XC2V80 PCI33 LVCMOS33 XC2V1000 Pin-out
Text: _18 LVDCI_18 0.39 0.43 0.49 ns Data Input Delay Adjustments Standard-specific data input , ns TOLVDCI_18 LVDCI_18 1.40 1.54 1.77 ns TOLVDCI_15 LVDCI_15 2.96 3.26


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PDF DS031-3 DS031-1, DS031-2, DS031-3, DS031-4, 2V3000 power supply module for calculator SR 51 II XC2V1000 2V1000 ULVDS-25 2V4000 XC2V80 PCI33 LVCMOS33 XC2V1000 Pin-out
2003 - XC2VP7FF896

Abstract: LVDCI25 XC2VP30-FF896 Xilinx XC2VP30-FF896 XC2VP20FF896 LVDCI33 XC2VP100FF1704 XC2VP4FF672 xc2vp70ff1517 XC2VP100
Text: _18 HSTL_III_18 HSTL_IV_18 SSTL2_I SSTL2_II LVDCI_33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2_25 LVDCI_DV2 , 12 mA 16 mA LVDCI_33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2_25 LVDCI_DV2_18 LVDCI_DV2_15 GTL_DCI


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PDF DS083-3 XC2VP7FF896 LVDCI25 XC2VP30-FF896 Xilinx XC2VP30-FF896 XC2VP20FF896 LVDCI33 XC2VP100FF1704 XC2VP4FF672 xc2vp70ff1517 XC2VP100
2002 - LVDCI25

Abstract: rocket battery 150 XC2VP20 XC2VP50
Text: I SSTL3 II LVDCI_33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2_25 LVDCI_DV2_18 LVDCI_DV2_15 GTL_DCI , Standard LVCMOS15, Fast, 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA LVDCI_33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2


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PDF DS083-3 LVDCI25 rocket battery 150 XC2VP20 XC2VP50
2010 - Not Available

Abstract: No abstract text available
Text: , LVDCI18 –0.3 35% VCCO 65% VCCO VCCO + 0.3 0.45 VCCO – 0.45 Note (3) Note (3 , _25 0.92 2.40 2.40 ns LVDCI_18 1.00 2.89 2.89 ns LVDCI_15 1.10 2.69


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PDF DS692 DS192, UG520, UG190, UG191of
2002 - XC2V1000

Abstract: 2V3000 2V1500 XC2V1000 Pin-out 2V4000
Text: I SSTL3 II AGP LVDCI_33 LVDCI_25 LVDCI_18 0.00 0.00 0.10 0.39 0.91 0.55 0.55 0.55 0.00 0.00 0.00 , , 2 mA 4 mA 6 mA 8 mA 12 mA 16 mA LVDCI_33 LVDCI_25 LVDCI_18 LVDCI_15 LVDCI_DV2_33 LVDCI_DV2


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PDF DS031-3 XC2V6000 DS031-1, DS031-2, DS031-3, DS031-4, XC2V1000 2V3000 2V1500 XC2V1000 Pin-out 2V4000
2004 - DS1103

Abstract: LVCMOS25 XC2VPX70 LVDCI33 XAPP689 XAPP659 XAPP653 XAPP623 LVCMOS33 XC2VPX20
Text: TILVDCI18 LVDCI_18 0.09 0.09 ns TILVDCI15 LVDCI_15 0.15 0.17 ns TILVDCI_DV2


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PDF DS110-3 DS1103 LVCMOS25 XC2VPX70 LVDCI33 XAPP689 XAPP659 XAPP653 XAPP623 LVCMOS33 XC2VPX20
2001 - 16x1D

Abstract: No abstract text available
Text: N/A Series LVDCI_18 1.8 1.8 N/A Series LVDCI_DV2_18 1.8 1.8 N/A , _25, SSTL2_DCI (I & II), LDT, ULVDS, BLVDS 1.8 V LVCMOS18, GTL, GTLP, LVDCI_18 , LVDCI_DV2_18 1.5 V , LVDCI_18 LVDCI_DV2_18 1.5 V LVDCI_15 LVDCI_DV2_15 Controlled Impedance Drivers (Parallel


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PDF DS031-2 DS031-2, DS031-3, DS031-1, DS031-4, 16x1D
2000 - LVDCI18

Abstract: LVDCI25 CLB 2711
Text: _25 LVDCI_DV2_25 LVDCI_18 LVDCI_DV2_18 LVDCI_15 LVDCI_DV2_15 GTL_DCI GTLP_DCI HSTL_I_DCI HSTL_II_DCI , _25, SSTL2_DCI (I & II), LDT, ULVDS, BLVDS LVCMOS18, GTL, GTLP, LVDCI_18 , LVDCI_DV2_18 HSTL (I, II, III, & IV , _25 LVDCI_18 LVDCI_15 DCI Half Impedance LVDCI_DV2_33 LVDCI_DV2_25 LVDCI_DV2_18 LVDCI_DV2_15 SSTL2 Class


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PDF DS031 18-Kbit LVDCI18 LVDCI25 CLB 2711
2000 - wireless encrypt

Abstract: BF957
Text: _25 LVDCI_DV2_25 LVDCI_18 LVDCI_DV2_18 LVDCI_15 LVDCI_DV2_15 GTL_DCI GTLP_DCI HSTL_I_DCI HSTL_II_DCI , _25, SSTL2_DCI (I & II), LDT, ULVDS, BLVDS LVCMOS18, GTL, GTLP, LVDCI_18 , LVDCI_DV2_18 HSTL (I, II, III, & IV , _25 LVDCI_18 LVDCI_15 DCI Half Impedance LVDCI_DV2_33 LVDCI_DV2_25 LVDCI_DV2_18 LVDCI_DV2_15 SSTL2 Class


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PDF DS031 18-Kbit wireless encrypt BF957
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