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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
SN74LS196D Texas Instruments 50/30/100-Mhz Presettable Decade OR Binary Counters/Latches 14-SOIC 0 to 70
SN74LS196J Texas Instruments LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP14, CERAMIC, DIP-14
SN74LS196J-00 Texas Instruments LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, CDIP14
SN74LS196FN Texas Instruments LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PQCC20
SN74LS196N-00 Texas Instruments IC LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDIP14, Counter
SN74LS196N-10 Texas Instruments LS SERIES, ASYN NEGATIVE EDGE TRIGGERED 3-BIT UP DECADE COUNTER, PDIP14
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Search Stock (69)

  You can filter table by choosing multiple options from dropdownShowing 46 results of 69
Part Manufacturer Supplier Stock Best Price Price Each Buy Part
1LS196 Honeywell Sensing and Control Master Electronics 2 $189.06 $158.63
54LS196/BCA Rochester Electronics - - -
54LS196/BDA Rochester Electronics - - -
54LS196W/B Rochester Electronics - - -
74LS196D Rochester Electronics - - -
74LS196N Rochester Electronics - - -
74LS196N Signetics Bristol Electronics 75 $3.36 $1.68
ABLS-19.6608MHZ-20-B-T Abracon Corporation Future Electronics - $0.16 $0.16
ABLS-19.6608MHZ-B2-T Abracon Corporation Future Electronics 13 $0.33 $0.21
ABLS-19.6608MHZ-B2-T Abracon Corporation Sager - - -
ABLS-19.6608MHZ-B2-T Abracon Corporation Richardson RFPD - - -
ABLS-19.6608MHZ-B2-T Abracon Corporation Farnell element14 853 £0.42 £0.28
ABLS-19.6608MHZ-B2-T Abracon Corporation Chip1Stop 1,000 $1.29 $0.20
ABLS-19.6608MHZ-B2-T Abracon Corporation Avnet - €0.42 €0.31
ABLS-19.6608MHZ-B2-T Abracon Corporation element14 Asia-Pacific 853 $0.59 $0.27
ABLS-19.6608MHZ-B2-T Abracon Corporation New Advantage Corporation 1,000 $0.28 $0.28
ABLS-19.6608MHZ-B2-T Abracon Corporation Future Electronics 2,000 $0.19 $0.19
ABLS-19.6608MHZ-B2-T2 Abracon Corporation Chip1Stop 500 $0.31 $0.23
ABLS-19.6608MHZ-B4-T Abracon Corporation Avnet 5,000 $0.17 $0.15
ABLS-19.6608MHZ-B4-T Abracon Corporation Chip1Stop 941 $0.22 $0.16
ABLS-19.6608MHZ-L4Q-T Abracon Corporation Chip1Stop 1,000 $0.31 $0.27
MTMM-104-05-L-S-196 Samtec Inc Avnet - - -
MTMM-104-05-L-S-196 Samtec Inc Samtec 303 $0.43 $0.23
MTMM-104-05-L-S-196 Samtec Inc Newark element14 100 $1.32 $0.59
MTMM-106-02-L-S-196 Samtec Inc Avnet - - -
MTMM-106-02-L-S-196 Samtec Inc Sager - $0.67 $0.40
MTMM-150-02-L-S-196 Samtec Inc Samtec - $4.56 $2.51
MTSW-106-07-L-S-196 Samtec Inc Samtec 332 $0.34 $0.19
MTSW-106-07-L-S-196 Samtec Inc Newark element14 100 $1.05 $0.47
MTSW-110-21-L-S-196-RA Samtec Inc Sager - $0.94 $0.57
MTSW-122-22-L-S-196-RA Samtec Inc Newark element14 100 $3.20 $1.45
MTSW-122-22-L-S-196-RA Samtec Inc Samtec 38 $1.51 $0.83
MTSW-208-07-L-S-196 Samtec Inc Avnet - $1.10 $0.85
NTE74LS196 NTE Electronics Inc Master Electronics 10 $2.80 $1.87
SN54LS196FK Rochester Electronics - - -
SN54LS196W Rochester Electronics - - -
SN74LS196D Texas Instruments Chip One Exchange 1,818 - -
SN74LS196FN . Bristol Electronics 95 - -
SN74LS196N Motorola Semiconductor Products Bristol Electronics 10 $2.40 $2.40
TW-02-05-L-S-196-048 Samtec Inc Sager - $0.27 $0.16
TW-02-05-L-S-196-048 Samtec Inc Avnet - $0.29 $0.23
TW-08-03-L-S-196-SM-TR Samtec Inc Sager - $1.30 $0.81
TW-10-02-L-S-196-SM Samtec Inc Sager - $1.44 $0.87
TW-12-02-L-S-196-SM Samtec Inc Sager - $1.73 $1.04
TW-12-02-L-S-196-SM Samtec Inc Samtec - $1.57 $0.86
TW-12-02-L-S-196-SM Samtec Inc Avnet - $1.89 $1.39

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LS196 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
LS196

Abstract: LS197
Text: a divide-by-five counter ( LS196 ) or a divide-by-two and a divide-by-eight counter (LS197). THese , COUNT CONFIGURATIONS LS196 The output of flip-flop A is not internally connected to the succeeding , INPUTS 2 3 4 5 2 3 4 5 Die Size .062 x .074 (both typesi LS196 FUNCTION TABLES DECADE (BCD) (See , /load VCC-MAX, V-I=7.OV 0.1 0.1 Clear, clock 1 0.2 0.2 mA Clock 2 of LS196 0.4 0.4 , 40 40 Clock 2 of LS196 80 80 Clock 2 of LS197 40 40 l|L Data, count/load


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PDF LS197 LS196) LS197) LS197 LS196
1996 - LS196

Abstract: 74ls196 LS197 cdq8 6CP-15 751A-02 SN74LSXXXN SN74LSXXXD SN54LSXXXJ 522Q2
Text: HIGH CP1 ( LS196 ) SN54LSXXXJ SN74LSXXXN SN74LSXXXD 7 GND PIN NAMES CP0 ORDERING , Q0 Q1 Q2 Q3 LS196 P0 13 P1 4 P2 10 P3 3 11 MR PL 1 J SD Q J , 12 Q3 SN54/74LS196 · SN54/74LS197 FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronously presettable decade and binary ripple counters. The LS196 Decade Counter is partitioned into , Q0 the least significant output and Q3 the most significant output. The LS196 Decade Counter can


Original
PDF SN54/74LS196 SN54/74LS197 SN54/74LS196 SN54/74LS197 modulo-16 LS196 74ls196 LS197 cdq8 6CP-15 751A-02 SN74LSXXXN SN74LSXXXD SN54LSXXXJ 522Q2
74LS196

Abstract: ls197 74LS197
Text: 3 11 CP0 C P ì ( LS196 ) C P ! (LS197) MR PL P0 - P 3 Q 0- Q 3 NOTES: C lock (Active LO W G oing , /74LS196 · SN54/74LS197 LOGIC DIAGRAM LS196 MR CP0 CPi L S I 97 V q c = PIN 14 G N D = , DESCRIPTION The LS196 and LS197 are asynchronously presettable de cade and binary ripple counters. The LS196 , significant output. The LS196 Decade Counter can be connected up to oper ate in two different count sequences , interstage gating delay within the divide-by-five section. The LS196 and LS197 have an asynchronous active


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PDF SN54/74LS196 SN54/74LS197 modulo-16 SN54/74LS196 SN54/74LS197 74LS196 ls197 74LS197
Not Available

Abstract: No abstract text available
Text: 1 CP-t ( LS196 ) C lock (Active LO W G oing Edge) CP-) (LS197) C lock (Active LO W G oing , DATA 5-229 SN54/74LS196 • SN54/74LS197 FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronously presettable de­ cade and binary ripple counters. The LS196 Decade C ounter is partitioned into , -16 counter, with Qq the least significant output and Q 3 the most significant output. The LS196 Decade , within the divide-by-five section. The LS196 and LS197 have an asynchronous active LOW Master Reset


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PDF SN54/74LS196 SN54/74LS197 SN54/74LS196 SN54/74LS197 modulo-16
Not Available

Abstract: No abstract text available
Text: . FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronously preset­ table decade and binary ripple counters. The LS196 Decade Counter is partitioned into divide-by-two and divide-by-five sections while , least significant output and Q3 the most significant output. The LS196 Decade Counter can be , LS196 and LS197 have an asynchro­ nous active LOW Master Reset input (MR) which overrides all other , LOGIC DIAGRAMS LS196 1 0— 0 6 —o K 10 3 1 1 PL P„ P, P ; CP» P, H R O


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PDF T54LS196/T74LS196 T54LS197/ T74LS197 modulo-16
LC1025

Abstract: lc10250 fz58
Text: lock (Active LOW G oing Edge) Input to D lvlde-by-Flve Section ( LS196 ) C lock (Active LOW G oing Edge , perature 0 °C to + 70 °C F U N C T IO N A L D E S C R IP T IO N The LS196 and LS197 are asynchronous p reset table decade and binary ripple counters. The LS196 Decade Counter is partitioned into , . The LS196 Decade Counter can be connecetd up to operate in two different count sequences, as in , within the divide-by-five section. The LS196 and LS197 have an asynchronous active LOW Master Reset input


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PDF T74LS196 T74LS196/197 LC1025 lc10250 fz58
74LS196

Abstract: LS196 ls 377 SN54/74LS196 751A-02 LS197 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
Text: INFORMATION Ceramic Plastic SOIC GND PIN NAMES LOADING (Note a) HIGH CP0 CP1 ( LS196 ) CP1 , 5 9 Q0 12 2 Q1 Q2 Q3 LS196 MR PL 13 P0 P1 4 P2 10 , DESCRIPTION significant output. The LS196 Decade Counter can be connected up to operate in two different , the interstage gating delay within the divide-by-five section. The LS196 and LS197 have an , the outputs. The LS196 and LS197 are asynchronously presettable decade and binary ripple counters


Original
PDF SN54/74LS196 SN54/74LS197 SN54/74LS196 SN54/74LS197 modulo-16 74LS196 LS196 ls 377 751A-02 LS197 SN54LSXXXJ SN74LSXXXD SN74LSXXXN
LS196

Abstract: CP 111 LS197 T74LS197
Text: type. FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronously preset-table decade and binary ripple counters. The LS196 Decade Counter is partitioned into divide-by-two and divide-by-five sections , TABLE output and Q3 the most significant output. The LS196 Decade Counter can be connected up to , of the interstage gating delay within the divide-by-five section. The LS196 and LS197 have an , Copyrighted By Its Respective Manufacturer LOGIC SYMBOLS AND LOGIC DIAGRAMS LS196 1 A 10 3 11 6—o S1


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PDF T54LS196/T74LS196 T54LS197/ T74LS197 modulo-16 LS196 CP 111 LS197
74LS196

Abstract: LS196 LS197
Text: , C P i (LS197) C P i ( LS196 ) Data, PL M R, CPq ( LS196 ) MR, CP0 , CP i (LS I 97) C P i ( LS196I Input , NAMES CPo CP1 ( LS196 ) CP1 (LS197) MR PL PO-P3 Qq -Q3 Clock (Active LOW Going Edge) Input to , SN54LS/74LS196 · SNS4LS/74LS197 LOGIC DIAG R AM LS196 © © ® CPri- iS D Q J SD Q , FUNCTIONAL DESCRIPTION - The LS196 and LS197 are asynchronously presettable decade and binary ripple counters. The LS196 Decade Counter is partitioned into divide-by-two and divide-by-five sections while the


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PDF SN54LS/74LS196 SN54LS/74LS197 modulo-16 54LS/74LS196 74LS196 LS196 LS197
T74LS197

Abstract: No abstract text available
Text: CARRIER PIN NAMES CPo CPi Clock (Active LOW Going Edge) Input to Divide-by-Five Section ( LS196 , /197XX Typ. 0 °C to + 70 °C XX a package type. FUNCTIONAL DESCRIPTION The LS196 and LS197 are asynchronous preset­ table decade and binary ripple counters. The LS196 Decade Counter is , LS196 Decade Counter can be connecetd up to operate in two different count sequences, as in­ dicated , the divide-by-five section. The LS196 and LS197 have an asynchronous active LOW Master Reset input


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PDF T74LS196 T74LS197 T74LS196 T74LS196/197 7RE1237 T74LS197
LS196

Abstract: BCD 8421
Text: LS196 National Semiconductor DM74LS196 Presettable Decade Counter General Description The ' LS196 decade ripple counter is partitioned into divideby-two and divide-by-five sections which can be , LS196 Absolute Maximum Ratings (N o te ) If Military/Aerospace specified devices are required , shorted at a time, and the duration should not exceed one second. 2-252 LS196 Switching , observed. 2 2-253 LS196 Logic Diagram PO P1 P2 P3 PL- cL/ ê io è li) J SD Q J SD Q


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PDF LS196 DM74LS196 LS196 BCD 8421
LS196

Abstract: ITT4
Text: LS196 and LS197 are asynchronously preset table decade and binary ripple counters. The LS196 Decade , -16 counter, with Qo the least significant output and Q3 the most significant output. The LS196 Decade Counter , LS196 and LS197 have an asynchro nous active LOW Master Reset Input (MR) which overrides all other , '2 3 - \ 3 Ì L v ITT4Ì-S196/197 ] TABLE A: LS196 COUNT SEQUENCES D EC A D E (N O TE 1 , H Current PL, P g ^ P i, P2, P 3 M R , C P0, C P ì (LS197) CP-i ( LS196 ) PL, P0, P i, P2, P 3 M R ,C


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PDF T54LS196/T74LS196 T54LS197/ T74LS197 modulo-16 LS196 ITT4
transistor S196

Abstract: transistor SN74LS196 SN74S197 SN74196 SN54S197 SN54S196 SN54LS197 SN54LS196 SN54197 501301-1
Text: 0-50 MHz 0-25 MHz ' LS196 ,'LS197 0-30 MHz 0-15 MHz 'S196, 'S197 0-100 MHz 0-50 MHz TYPICAL POWER , and a divide-by-five counter ('196, ' LS196 , 'S196I or a divide-by-two and a divide-by-eight counter , '196, ' ls196 , s196 '197, 'lsi 97, 's197 ctr c1 ct = 0 >+ DIV2 (5) id ^ div5 (9) s» ct/ , configurations '196, ' LS196 , and 'S196 typical count configurations and function tables are the same as those , those for '177. logic diagrams '196, ' LS196 , and 'S196 logic diagrams are the same as those for '176.


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PDF SN54196, SN54197, SN54LS196, SN54LS197, SN54S196, SN54S197, SN74196, SN74197, SN74LS196, SN74LS197, transistor S196 transistor SN74LS196 SN74S197 SN74196 SN54S197 SN54S196 SN54LS197 SN54LS196 SN54197 501301-1
sn74106

Abstract: s196 SN54LS196 SM74196 SN74S197 SN74S196 sh54
Text: Qb . Qc * arK* Q d ,ovw- ' LS196 , 'LS197 0-30 MHz asynchronous input: Low input to dear sets Q , divide-by-five counter ('196, ' LS196 , 'S I96) or a divide-by-two and a divide-by-eight counter ('197, 'LS197 , as those for '177. See page 7-260. functional block diagrams '196, ' LS196 , and 'S196 functional , , count/loed Clear, dock 1 Clock 2 of ' LS196 Clock 2 o f ' L S I 97 Data, count/load High-level I |H input current Clear, clock 1 Clock 2 of ' LS196 Clock 2 of 'LS197 Data, count/load Low-level l,L Input currant


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PDF SN5419S. SNS4197. SH54LS196. SHS4LS197 SNS4St86, SN54S197, SH74H9. SH74197. SR74LSW6. SN74LS197 sn74106 s196 SN54LS196 SM74196 SN74S197 SN74S196 sh54
Not Available

Abstract: No abstract text available
Text: Po< LS196 > M R . C i V c Ê l LS196 ) Data, PL MR. CP o ( LS196 ) P R . CPo, CP1 (LS197) CP^ ( LS196 ) Input LOW_Current Data, PL MR CP0 C P i (L S I 96) C P i (L S I 97) Short Circuit Current Power


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PDF odulo-16 SN54/74LS196 SN54/74LS197
ns 4248

Abstract: 74LS196N 54LS196 LS196 LS197 DM74LS196 DM54LS196 DM54 74LS197N 74LS196
Text: clock inputs are inactive. TYPICAL COUNT CONFIGURATIONS LS196 The output of flip-flop A is not , > CO _J S o (O o> r- —I ■t in 2 a ' LS196 Electrical Characteristics over recommended , . 4-244 This Material Copyrighted By Its Respective Manufacturer ' LS196 Switching Characteristics at , Function Tables LS196 Decada (BCD) (See Note A) Count Output Qd QC Qfi Qa 0 L L L L 1 L L L H 2 L , ls196 LS 197 COUNT/ID LOAD (1 CLEAR (10) DATA B- (3) (11) DATA D - =o preset -O.T Oft


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PDF DM54LS196/DM74LS196, DM54LS197/DM74LS197 ls196 ns 4248 74LS196N 54LS196 LS196 LS197 DM74LS196 DM54LS196 DM54 74LS197N 74LS196
transistor S196

Abstract: LS196 SN74196 SN74LS197 SN74LS196 SN54S197 SN54LS197 SN54LS196 SN54197 SN54196
Text: MHz 0-25 MHz ' LS196 , LS197 0-30 MHz 0-15 MHz 'S196,'S197 0-100 MHz 0-50 MHz TYPICAL POWER , and a divide-by-five counter ('196, ' LS196 , S196) or a divide-by-two and a divide-by-eight counter , * 196. ' LS196 , S196 •197, LS197, S197 CTR CI CT = 0 h r DIV2 ID DIVE > + tn TT y , PRESETTABLE DECADE OR BINARY COUNTERS/LATCHES typical count configurations '196, ' LS196 , and 'S196 typical , count configurations and function tables are the same as those for '177. logic diagrams '196r ' LS196


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PDF SDLS077 SN54196, SN54197, SN54LS196, SN54LS197, SN54S19B, SN54S197, SN74196, SN74197, SN74LS196, transistor S196 LS196 SN74196 SN74LS197 SN74LS196 SN54S197 SN54LS197 SN54LS196 SN54197 SN54196
ap 5200

Abstract: No abstract text available
Text: re 2 : D E C A D E ( N O T E 11 COUNT 0 1 2 3 4 5 6 7 8 9 q 3 L L L L L L L L q LS196 C O U N T , -| Input to 0 2 Outpul C P i Inputto Q 3 Outpul Data to Output 30 L IM IT S LS196 TYP 40 8 .0 LS197 MAX , - LO W Data Hold Time - H IG H Data Hold Time - L O W Recovery Time 20 L IM IT S LS196 TYP MAX


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PDF
multiplexers 74 LS 150

Abstract: 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS221 LS386 ls95b 74LS191
Text: 30 MHz 70 X X 9 L.S/54 LS/74 LS196 4-bit presettable decade counter 35 MHz 60 X X 9LS/54LS


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PDF 9LS/54LS/74LS 9LS/54LS/74LS190 9LS/54LS/74LS191 9LS/54LS/74LS192 9LS/54LS/74LS193 LS/54 LS/74 9LS/54LS/74LS195A LS196 multiplexers 74 LS 150 74LS255 74LS190 up down decade counter 74LS190 pins bcd counter 74 90 74LS192 pins 74LS221 LS386 ls95b 74LS191
ls197

Abstract: No abstract text available
Text: , please refer to the ' LS196 data sheet. Features High counting rates-Typically 70 MHz Asynchronous


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PDF LS197 DM74LS197 LS197 modulo-16 TL/F/10180-4 TL/F/10100-2
1995 - C1995

Abstract: DM74LS197 DM74LS197M DM74LS197N LS196 LS197 M14A N14A
Text: when PL is HIGH For detail specifications and functional description please refer to the ' LS196 data


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PDF DM74LS197 LS197 modulo-16 C1995 DM74LS197M DM74LS197N LS196 M14A N14A
BCD 8421

Abstract: binary to BCD 8421 DM74 DM74LS196 DM74LS196M DM74LS196N LS196 M14A N14A
Text: National Semiconductor DM74LS196 Presettable Decade Counter General Description The ' LS196 decade ripple counter is partitioned into divide-by-two and divide-by-five sections which can be combined to count either in BCD (8421) sequence or in a bi-quinary mode producing a 50% duty cycle output. Both circuit types have a Master Reset (MR) input which overrides all other inputs and asynchronously forces all outputs LOW. A Parallel Load input (PL) overrides clocked operations and asynchronously loads


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PDF DM74LS196 LS196 TL/F/10179-4 TL/F/10179-5 BCD 8421 binary to BCD 8421 DM74 DM74LS196 DM74LS196M DM74LS196N M14A N14A
1998 - LS196

Abstract: No abstract text available
Text: interconnected to provide either a divide-by-two and a divide-by-five counter ('196, ' LS196 , 'S196) or a


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PDF SNJ54LS197FK SNJ54LS197J 7601501CA SNJ54LS197W 7601501DA LS196
Not Available

Abstract: No abstract text available
Text: PL is HIGH. For detail spec ifications and functional description, please refer to the ' LS196 data


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PDF DM74LS197 LS197 modulo-16
register file

Abstract: quad-2-input NOT gate LS298 Inverter ls390 LS164 segment
Text: LS168 LS169 LS190 LS191 LS192 LS193 LS196 LS197 LS290 LS293 LS390 LS393 LS490 Function Page 4


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PDF LS132 LS133 LS260 LS136 LS148 LS248 LS280 register file quad-2-input NOT gate LS298 Inverter ls390 LS164 segment
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