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SN74LS162AN Texas Instruments Synchronous decade counters 16-PDIP 0 to 70
SN74LS162AD Texas Instruments Synchronous decade counters 16-SOIC 0 to 70
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54LS162A/B2A Rochester Electronics - - -
54LS162A/BEA Rochester Electronics LLC Rochester Electronics 852 $84.36 $73.23
54LS162A/BEA Rochester Electronics LLC Avnet - $74.49 $68.19
54LS162A/BEA Rochester Electronics - - -
54LS162A/BFA Rochester Electronics - - -
54LS162AFK/B Rochester Electronics - - -
54LS162AJ/B Rochester Electronics - - -
54LS162AW/B Rochester Electronics - - -
74LS162AD Rochester Electronics - - -
74LS162AN Rochester Electronics - - -
74LS162APC National Semiconductor Corporation Rochester Electronics 2,658 $0.49 $0.40
DM74LS162AN National Semiconductor Corporation Bristol Electronics 875 $0.56 $0.18
SN74LS162AN Texas Instruments Avnet - $0.14 $0.12
SN74LS162AN Texas Instruments Rochester Electronics 9,259 $0.18 $0.15
SN74LS162AN ON Semiconductor Rochester Electronics 61,208 $0.18 $0.15
SN74LS162AN Texas Instruments Bristol Electronics 140 $0.56 $0.21
SN74LS162AN Motorola Semiconductor Products Bristol Electronics 2,193 $0.56 $0.16
SN74LS162AN Texas Instruments Bristol Electronics 18 - -

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74LS163

Abstract: LS163A LS160A SN54/74LS160A 74LS160 74LS162 SN54/74LS161A LS162A LS162 LS161A
Text: , frequency division and other applications. The LS160A and LS162A count modulo 10 (BCD). The LS161A and , that overrides, and is independent of, the clock and all other control inputs. The LS162A and LS163A , during the rising clock edge. BCD (Modulo 10) LS160A LS161A Synchronous Reset LS162A LOW , for LS162A and LS163A 1 2 3 4 5 6 7 CP P0 P1 P2 P3 CEP , = PIN 8 *MR for LS160A and LS161A *SR for LS162A and LS163A FAST AND LS TTL DATA 5-278 15


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PDF SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A LS160A LS162A LS161A LS163A 74LS163 SN54/74LS160A 74LS160 74LS162 SN54/74LS161A LS162
1996 - 74LS160

Abstract: 74LS162 74LS161A LS160A LS161A LS163A LS162A SN54LSXXXJ
Text: , frequency division and other applications. The LS160A and LS162A count modulo 10 (BCD). The LS161A and , that overrides, and is independent of, the clock and all other control inputs. The LS162A and LS163A , during the rising clock edge. BCD (Modulo 10) LS160A LS161A Synchronous Reset LS162A LOW , SOIC CASE 751B-03 16 *MR for LS160A and LS161A *SR for LS162A and LS163A 1 *R N SUFFIX , *R Q0 Q1 Q2 Q3 1 14 13 12 11 VCC = PIN 16 GND = PIN 8 *MR for LS160A and LS161A *SR for LS162A


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PDF SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A LS160A LS162A LS161A LS163A 74LS160 74LS162 74LS161A SN54LSXXXJ
2006 - LS160A

Abstract: SN74LS160ad
Text: for counting, memory addressing, frequency division and other applications. The LS160A and LS162A , inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input that overrides all other control , Reset LS160A LS162A Binary (Modulo 16) LS161A LS163A 16 1 http://onsemi.com BCD DECADE COUNTERS , SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC *MR for LS160A and LS161A *SR for LS162A and LS163A 1 *R , LS160A and LS161A *SR for LS162A and LS163A NOTES: a) 1 TTL Unit Load (U.L.) = 40 A HIGH/1.6 mA LOW. b


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PDF SN74LS160A LS160A/161A /162A /163A LS160A LS162A LS161A LS163A SN74LS160ad
74160 pin description

Abstract: 74160 pin diagram of 74163 74160 function table LS161A 74161 logic diagram of 74160 74163 74163 four bit binary counter LS161
Text: , LS161A, LS162A , LS163A A LOW level at the Master Reset (MR) input sets all four outputs of the , and CEP inputs (thus providing an asynchronous clear function). For the ' LS162A , '163, and LS163A , , 74161, 74163, LS160A, LS161A, LS162A , LS163A + Vcc PE Do Oj D2 DJ CEP 54/74LS162A OR CET 54 , Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A LOGIC DIAGRAMS LS160A 03 Oj D, o0 LD03030S , Specification Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A LOGIC DIAGRAMS December 4, 1985


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PDF 74LS160A, 74LS162A) 74LS161A, 74LS163A) LS160A, LS161A, LS162A, LS163A 74160 pin description 74160 pin diagram of 74163 74160 function table LS161A 74161 logic diagram of 74160 74163 74163 four bit binary counter LS161
ic 74160

Abstract: IC 74160 decade counter diagram ic 74163 IC 74161 pin diagram of ic 74163 lm 74161 diagram of IC 74160 of 74160 ic LM 74160 diagram of IC 74161
Text: Signetics 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A Counters Logic Products '160 , , LS160A, LSÌ61A, LS162A , LS163A A LOW level at the Master Reset (MR) input sets all four outputs of the , , CET and CEP inputs (thus providing an asynchro nous clear function). For the ' LS162A , '163, and LS163A , 15 LS161A CTR4 R 9 M 1 G3 10 G4 > C 2 /1 , 3 , 4 + S 3 1, 20 r 14 3 10 i_ r ^ 9 ' LS162A C T R , , LS162A , LS163A V cc TER M IN A L C OUNT * 6 AF02301S Figure 1 H «EN A BLECO U N T . L = D


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PDF LS160A, LS161A, LS162A, LS163A 74LS160A, 74LS162A) 74LS161 74LS163A) 54LS/74LS F08270S ic 74160 IC 74160 decade counter diagram ic 74163 IC 74161 pin diagram of ic 74163 lm 74161 diagram of IC 74160 of 74160 ic LM 74160 diagram of IC 74161
IC 74161

Abstract: IC 74160 lm 74161 IC 74160 decade counter diagram ic 74163 IC 74160 for decade counter 74160 LM 74160 pin diagram of ic 74163 74161/74160 function table
Text: (CEP, CET) inputs. Plastic SO NOTE: 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A '160 , P roduct S p ecification Counters 74160, 74161 74163, LS160A, LS161A, LS162A , LS163A A LOW , an asynchro nous clear function). For the ' LS162A , *163, and LS163A, the clear function is , Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A + Vcc TERM IN AL C O U N T» 6 , , LS162A , LS163A LOGIC DIAGRAMS LS160A 03 Oj D, 00 LD03030S ' 161 03 02 0, D0


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PDF 74LS160A, 74LS162A) 74LS161A, 74LS163A) 54LS/74LS IC 74161 IC 74160 lm 74161 IC 74160 decade counter diagram ic 74163 IC 74160 for decade counter 74160 LM 74160 pin diagram of ic 74163 74161/74160 function table
74163 four bit binary counter

Abstract: LS162A 74163 pin configuration pin diagram of 74160 counter diagram 74161 pin diagram of 74163 162 bcd 74160 function table LS160A 74LS163A equivalent
Text: S ig n e tic s 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A Counters Logic Products , Product Specification Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A A LOW level at , asynchro nous clear function). For the ' LS162A ,' 163, and LS163A, the clear function is synchronous. A LOW , _ 6 14 13 12 11 I 4CT» 0 " 14CT-1S 'LS161A LS162A 163 LS163A 9_ 7_ 10 , , 74163, LS160A, LS161A, LS162A , LS163A + Vcc PE Do Di Di D3 CEP CET CP


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PDF LS160A, LS161A, LS162A, LS163A 74LS160A, 74LS162A) 74LS161A, 74LS163A) 54LS/74LS S4LS/74LS 74163 four bit binary counter LS162A 74163 pin configuration pin diagram of 74160 counter diagram 74161 pin diagram of 74163 162 bcd 74160 function table LS160A 74LS163A equivalent
pin diagram of 74160

Abstract: 74160 function table pin diagram of 74163 74160 pin 74163 pin configuration 74ls161 counter pin configuration 74160 logic diagram of 74160 logic diagram 74160 74160 counter
Text: Signetics 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A Counters Logic Products , , LS161A, LS162A , LS163A A LOW level at the Master Reset (MR) input sets all four outputs of the , and CEP inputs (thus providing an asynchronous clear function). For the ' LS162A , '163, and LS163A , 74LS160A, 74LS161 A, 74LS162A and 74LS163A. •161 LS161A LS162A '163 'LSI 63 A 1 i 9 7_ 10 2 , Product Specification Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A + Vcc pe do d, u2 ih


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PDF LS160A, LS161A, LS162A, LS163A 74LS160A, 74LS162A) 74LS161 74LS163A) 54ls/74ls pin diagram of 74160 74160 function table pin diagram of 74163 74160 pin 74163 pin configuration 74ls161 counter pin configuration 74160 logic diagram of 74160 logic diagram 74160 74160 counter
Not Available

Abstract: No abstract text available
Text: 1 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A S ig n e lic s Counters Logic , , LS161A, LS162A , LS163A A LOW level at the Master Reset (MR) input sets all four outputs of the , and 74163, the following transitions should be avoided. For the ’ LS162A , '163, and LS163A, the , “ I _ ' LS162A CTR4 r 4_ S06300S IJ > R 1 _ T, 2D _ 14 _ T, 2D , Specification Signetics Logic Products Counters 74160, 74161, 74163, LS160A, LS161A, LS162A , LS163A


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PDF LS160A, LS161A, LS162A, LS163A 32MHz 74LS160A 74LS163A 74LS160tput S4LS/74LS
Not Available

Abstract: No abstract text available
Text: division and other applications. The LS160A and LS162A count modulo 10 (BCD); The LS161A and LS163A count , overrides, and is in- 7 dependent of, the clock and all other control inputs. The LS162A and LS163A , Reset LS162A C1 (Plastic Chip Carrier) LS163A ORDER C ODES : T74LSXXXX D1 T74LS X X XX C1 , state. The LS160Aand LS162Acount modulo 10following a binary coded decimal (BCD) sequence. They , the LS162A and LS163A acts as an edge-triggered control input, overriding CET, CEP and PE, and


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PDF LS160A/162A LS161A/163A LS160A/161 /162A/163A T74LS160A/161 /162A/163A
LS163A

Abstract: LS160A 74LS163A LS163 74LS162A 74LS161A pin diagram TTL 74 sl 90 LS161 LS161A LS162A
Text: 16) Asynchronous Reset LS160A LSI 61A Synchronous Reset LS162A LS163A ' SYNCHRONOUS COUNTING AND , . for Commençai (74) Temperature Ranges. STATE DIAGRAM LS160A • LS162A LS161A . LS163A LOGIC EQUATIONS Count Enable = CEP • CET • PE TC for LS160A & LS162A = CET • Qo -Ql • 02 • Q3 TC for , LS162A can be preset to anv state, but will not count bevond 9. If preset to state 10, 11, 12, 13, 14, or , •MR for LS 160A and LS161A •SR for LS162A and LS163A CONNECTION DIAGRAMS DIP (TOP VIEW) 'C * R ^


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PDF LS160A/161 2A/163A LS160A 63Acount SN54/74LS160A SN54/74LS161A SN54/74LS162A SN54/74LS163A LS163A 74LS163A LS163 74LS162A 74LS161A pin diagram TTL 74 sl 90 LS161 LS161A LS162A
LS160A

Abstract: No abstract text available
Text: applications. The LS160A and LS162A count modulo 10 (BCD). The LS161Aand LS163A count modulo 16 (binary). The , , the clock and all other control inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input , Modulo 10 Asynchronous Reset Synchronous Reset LS160A LS162A Binary (modulo 16) LS161A LS163A O RD , H ä | U 1M la. < i * M R for LS160A/161A · S R for LS162A /163A N C = No Internal Connection , T C for LS160A & LS162A = C E T · Qo · Qi · Q 2 · Q 3 TC for L S J6 1 A & LS163A = C E T · Qo · Q 1


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PDF T74LS160A/161A T74LS162A/163A LS160A/162A LS161A/163A LS160A/161 /162A/163A LS160A LS162A LS161Aand LS163A
Not Available

Abstract: No abstract text available
Text: ) ELECTRICALLY TESTED PER: MIL-M-38510/31511 H m in i The ’ LS162A is a high-speed 4-bit synchronous , counting, memory addressing, frequency division and other applications. The ' LS162A can count modulo 10 (BCD). The ’ LS162A has a Synchronous Reset (Clear) input that overrides all other control inputs , DIAGRAM LOGIC EQUATIONS Count Enable = Enp • Enj • Ld RC for LS162A = Enj • ¿ a • Q b • G , : The LS162A can be preset to any state, but will not count beyond 9. If preset to state 10,11,12, 13


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PDF MIL-M-38510/31511 LS162A JM38510/31511BXA 54LS162A/BXAJC 1N3064
DM74LS160

Abstract: No abstract text available
Text: LS160A* LS162A a National Semiconductor 54LS160A/DM74LS160A, 54LS162A/DM74LS162A , r'LS160 *5R for 'LS162 2-175 LS160A* LS162A Absolute Maximum Ratings (Note) If Military , duration should not exceed one second. 2-176 LS160A* LS162A Electrical Characteristics over , CET inhibits counting, The 'LS160A and ' LS162A use D-type edge-triggered flipf|ops and changing the , LS160A* LS162A Functional Description (Continued) The Terminal Count (TC) output is HIGH when CET is


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PDF LS160A LS162A 54LS160A/DM74LS160A, 54LS162A/DM74LS162A LS160 LS162 LS160, LS162, DM74LS160
74LS161A

Abstract: LS163 LS163 IC CP015
Text: . The LS160A and LS162A count modulo 10 (BCD). The LS161A and LS163A count modulo 16 (binary.) The , , the clock and all other control inputs. The LS162A and LS163A have a Synchronous Reset (Clear) input , odulo 10) A syn chro nous R eset S ynchro nous Reset LS160A LS162A Binary (M odulo 16) LS 161A LS 163A , , therefore, be HIGH only for one count state. The LS160A and LS162A count modulo 10 following a binary coded , LS162A and LS163A acts as an edge-triggered control input, overriding CET, CEP and PE, and resetting the


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PDF LS160A/161A/162A/163A LS160A LS162A LS161A LS163A 74LS161A LS163 LS163 IC CP015
1976 - SN74160

Abstract: SN74LS161A SDLS060
Text: high-speed counting designs. The '160, '162, 'LS160A, ' LS162A , and 'S162 are decade counters and the '161 , inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is synchronous and a , SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY SYNCHRONOUS


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A, SN74LS161A SDLS060
Not Available

Abstract: No abstract text available
Text: Clear) ELECTRICALLY TESTED PER: MIL-M-38510/31511 The ' LS162A is a high-speed 4 -b it syn ch ro n o u , pp licatio n s. The ' LS162A can co u n t m o d u lo 10 (BCD). The ' LS162A has a S yn ch ro n o us , -) Temperature Ranges. LOGIC EQUATIONS Count Enable = Enp » E nT * L d RC fo r LS162A = Enj · Qa · Q b * C c * Preset = _Ld*C P + (rising clock edge) Reset = C R · CP + (rising clock edge) NOTE: The LS162A can be , return to its norm al sequence w ith in two clock pulses. FU N CT IO N AL DESCRIPTION The ' LS162A is


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PDF MIL-M-38510/31511 LS162A 1N3064
1976 - Not Available

Abstract: No abstract text available
Text: , 'LS161A . SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY , application in high-speed Top counting designs. The '160, '162, 'LS160A, ' LS162A , and 'S162 are decade , , or enable inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is , , 'LS161A . SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY , application in high-speed Top counting designs. The '160, '162, 'LS160A, ' LS162A , and 'S162 are decade


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A,
ad 440J

Abstract: Am25LS161 LS161 74LS160A 74LS LS160A LS162A LS163A am25ls163 SYNCHRONOUS LOAD CLEAR ENABLE COUNTER
Text: Am25LS160A/161 A/162A/163A Am54LS/74LS160A/161 A/162A/163A Synchronous Four-Bit Counters DISTINCTIVE CHARACTERISTICS • Synchronous presettable counters • Decade ('LS160A and ' LS162A ) and binary ('LS161Aand 'LS163A) counters • Asynchronous ('LS160A and 'LS161A) and synchronous (' LS162A and 'LS163A , Motes: 1. Measured from clear input on 'LS160A and 'LS161 A. Measured from clock input on ' LS162A and 'LS1 63A. 2. Applies to ' LS162A and 'LS163A only. 3. Per industry convention, fmax is- the worst case


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PDF Am25LS160A/161 /162A/163A Am54LS/74LS160A/161 /162A/163A LS160A LS162A) LS161Aand LS163A) LS161A) ad 440J Am25LS161 LS161 74LS160A 74LS LS162A LS163A am25ls163 SYNCHRONOUS LOAD CLEAR ENABLE COUNTER
Not Available

Abstract: No abstract text available
Text: -38510/31511 The ' LS162A is a high-speed 4-bit synchronous counter. It is edgetriggered, synchronously , other applications. The ' LS162A can count modulo 10 (BCD). The ' LS162A has a Synchronous Reset (Clear , ) Temperature Ranges. LOGIC EQUATIONS Count Enable = Enp · Eny · Ld RC for LS162A = Enj · · O g · Qq · Q q Preset = Ld · CLK + (rising clock edge) Reset = CR · CLK + (rising clock edge) NOTE: The LS162A can be , ' LS162A acts as an edge-triggered control input, overriding E nT. En pa n d Ld, and resetting the


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PDF MIL-M-38510/31511 LS162A 54LS162A
1976 - SNJ54LS161AJ

Abstract: SN74LS160A sn74163
Text: look-ahead for application in high-speed counting designs. The '160, '162, 'LS160A, ' LS162A , and 'S162 are , , or enable inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is , SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY SYNCHRONOUS , carry look-ahead for application in high-speed counting designs. The '160, '162, 'LS160A, ' LS162A , and , , or enable inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A, SNJ54LS161AJ sn74163
1976 - Not Available

Abstract: No abstract text available
Text: SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY SYNCHRONOUS , '160, '162, 'LS160A, ' LS162A , and 'S162 are decade counters and the '161, '163, 'LS161A, 'LS163A, and , '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is synchronous and a low level at the clear input


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A,
74ls180

Abstract: 74LS161A
Text: ) Asynchronous Reset Synchronous Reset LS16QA LS162A Binary (Modulo 16) LS161A LS163A SN54/74LS160A SN54 , LS160A and LS161A *SR for LS162A and LS163A J Suffix - Case 620-09 Ceramic N Suffix - Case 648-08 , LS162A and LS163A acts as an edge-triggered control input, overriding C E T , C EP and P E , and , V c c = MAX, V|n = 0.4 V V c c = MAX V cc ~ m a x LS162A and LS163A DC CHARACTERISTICS OVER


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PDF LS160A LS163A 74ls180 74LS161A
1976 - Not Available

Abstract: No abstract text available
Text: , ' LS162A , 'LS163A, 'S162, 'S163 . FULLY SYNCHRONOUS COUNTERS q q q q q q Internal Look-Ahead for Fast , internal carry look-ahead for application in high-speed counting designs. The '160, '162, 'LS160A, ' LS162A , levels of clock, load, or enable inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A,
1976 - Not Available

Abstract: No abstract text available
Text: SYNCHRONOUS COUNTERS WITH DIRECT CLEAR '162, '163, ' LS162A , 'LS163A, 'S162, 'S163 . FULLY SYNCHRONOUS , high-speed counting designs. The '160, '162, 'LS160A, ' LS162A , and 'S162 are decade counters and the '161 , inputs. The clear function for the '162, '163, ' LS162A , 'LS163A, 'S162, and 'S163 is synchronous and a


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PDF SN54160 SN54163, SN54LS160A SN54LS163A, SN54S162, SN54S163, SN74160 SN74163, SN74LS160A SN74LS163A,
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