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2011 - Not Available

Abstract: No abstract text available
Text: Memory protection unit with multi-master protection ­ 16 -channel DMA controller, supporting up to 63 , ) ­ General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier , 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time clock · Communication interfaces ­ , .14 Voltage and current operating behaviors.14 Power mode transition operating behaviors. 16 , -regional limit, includes sum of negative injection currents or sum of positive injection currents of 16


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PDF K50P144M100SF2 MK50DN512ZCLQ10, MK50DN512ZCMD10 K50P144M100SF2
2010 - JESD22-A103

Abstract: JESD22-A114 MK50
Text: ­ Memory protection unit with multi-master protection ­ 16 -channel DMA controller, supporting up , input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64 , Two 2-channel quadrature decoder/general purpose timers ­ Periodic interrupt timers ­ 16 , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , injection currents or sum of positive injection currents of 16 contiguous pins · Negative current


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PDF K50P144M100SF2 MK50DN512ZCLQ10, MK50DN512ZCMD10 JESD22-A103 JESD22-A114 MK50
2012 - Not Available

Abstract: No abstract text available
Text: provide power optimization based on application requirements – 16 -channel DMA controller, supporting , timers – 16 -bit low-power timer – Carrier modulator transmitter – Real-time clock â , €“ General-purpose input/output • Analog modules – Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA , positive injection currents of 16 contiguous pins • Negative current injection • Positive current , . 3, 11/2012. 16 Freescale Semiconductor, Inc. General Table 6. Power consumption operating


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PDF K50P64M72SF1 MK50DX128CLH7 16-channel
2010 - JESD22-A103

Abstract: JESD22-A114 MK50 MK50DX256ZCLL10 MK50DN512ZCLL10
Text: protection ­ 16 -channel DMA controller, supporting up to 64 request sources ­ External watchdog monitor ­ , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64) integrated into , -channel quadrature decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier , injection currents or sum of positive injection currents of 16 contiguous pins · Negative current , continues on the next page. K50 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011. 16 Freescale


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PDF K50P100M100SF2 MK50DX256ZCLL10, MK50DN512ZCLL10 JESD22-A103 JESD22-A114 MK50 MK50DX256ZCLL10 MK50DN512ZCLL10
2010 - Not Available

Abstract: No abstract text available
Text: protection ­ 16 -channel DMA controller, supporting up to 64 request sources ­ External watchdog monitor ­ , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64) integrated into each , decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator , or sum of positive injection currents of 16 contiguous pins · Negative current injection · Positive , mA mA mA K50 Sub-Family Data Sheet Data Sheet, Rev. 5, 5/2011. 16 Preliminary Freescale


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PDF K50P121M100SF2 MK50DX256ZCMC10, MK50DN512ZCMC10 K50P121M100SF2
2012 - Not Available

Abstract: No abstract text available
Text: based on application requirements ­ Memory protection unit with multi-master protection ­ 16 -channel DMA , hardware touch sensor interface (TSI) ­ General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs , ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time , injection currents or sum of positive injection currents of 16 contiguous pins · Negative current injection , . K50 Sub-Family Data Sheet, Rev. 2, 12/2012. 16 Freescale Semiconductor, Inc. General Table 6


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PDF K50P100M100SF2V2 MK50DX256CLL10, MK50DN512CLL10 interfa-521-6274
2012 - Not Available

Abstract: No abstract text available
Text: optimization based on application requirements ­ Memory protection unit with multi-master protection ­ 16 , redundancy checks ­ 128-bit unique identification (ID) number per chip · Analog modules ­ Two 16 -bit SAR ADCs , ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time , positive injection currents of 16 contiguous pins · Negative current injection · Positive current injection , continues on the next page. K50 Sub-Family Data Sheet, Rev. 1, 6/2012. 16 Preliminary General


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PDF K50P121M100SF2V2 MK50DX256CMC10, MK50DN512CMC10
2010 - Not Available

Abstract: No abstract text available
Text: application requirements ­ Memory protection unit with multi-master protection ­ 16 -channel DMA controller , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (up to x64) integrated into each ADC ­ , decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator , Sub-Family Product Preview Data Sheet, Rev. 2, 3/2011. 16 Preliminary Freescale Semiconductor, Inc , 36 ns ns - - 12 36 ns ns 4 Min. 1.5 100 16 TBD 2 Max. - - - - - Bus clock cycles 3 Unit Bus


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PDF K50P100M100SF2 MK50X256CLL100, MK50N512CLL100
2012 - Not Available

Abstract: No abstract text available
Text: interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time clock · Communication , application requirements ­ 16 -channel DMA controller, supporting up to 63 request sources ­ External watchdog , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64) integrated into each , -regional limit, includes sum of negative injection currents or sum of positive injection currents of 16 , , 3/2012. 16 Preliminary Freescale Semiconductor, Inc. General Table 6. Power


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PDF K50P64M72SF1 K50P64M72SF1 16-bit MK50DX128CLH7
2012 - Not Available

Abstract: No abstract text available
Text: application requirements – Memory protection unit with multi-master protection – 16 -channel DMA , €“ General-purpose input/output • Analog modules – Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA , interrupt timers – 16 -bit low-power timer – Carrier modulator transmitter – Real-time clock â , positive injection currents of 16 contiguous pins • Negative current injection • Positive current , . 16 Freescale Semiconductor, Inc. General Table 6. Power consumption operating behaviors


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PDF K50P81M100SF2V2 MK50DX256CLK10
2012 - s10 k50

Abstract: No abstract text available
Text: based on application requirements ­ Memory protection unit with multi-master protection ­ 16 -channel DMA , hardware touch sensor interface (TSI) ­ General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs , ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time , .15 Power consumption operating behaviors. 16 EMC radiated emissions operating behaviors , injection currents or sum of positive injection currents of 16 contiguous pins · Negative current injection


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PDF K50P121M100SF2V2 MK50DX256CMC10, MK50DN512CMC10 interfa-521-6274 s10 k50
2011 - Not Available

Abstract: No abstract text available
Text: protection ­ 16 -channel DMA controller, supporting up to 63 request sources ­ External watchdog monitor ­ , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64) integrated into each , decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator , .15 Power consumption operating behaviors. 16 EMC radiated emissions operating behaviors , -regional limit, includes sum of negative injection currents or sum of positive injection currents of 16


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PDF K50P100M100SF2 MK50DX256ZCLL10, MK50DN512ZCLL10 K50P100M100SF2 cl00-521-6274
2010 - Not Available

Abstract: No abstract text available
Text: protection ­ 16 -channel DMA controller, supporting up to 64 request sources ­ External watchdog monitor ­ , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (up to x64) integrated into each ADC ­ , decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator , Sheet Data Sheet, Rev. 4, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. General · · , 36 ns ns 4 Min. 1.5 100 16 TBD 2 Max. - - - - - Bus clock cycles 3 Unit Bus clock cycles ns ns


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PDF K50P144M100SF2 MK50N512CLQ100, MK50N512CMD100 K50P144M100SF2
1986 - 4032 K50

Abstract: No abstract text available
Text: .111 3.7.1 3.7.2 3.7.3 3.7.4 3.7.5 3.7.6 16 -bit SAR ADC with PGA Configuration , .343 Chapter 16 Miscellaneous Control Module (MCM) 16.1 Introduction


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PDF MK50DN512ZCLQ10, MK50DN512ZCMD10 K50P144M100SF2RM 4032 K50
2010 - JESD22-A103

Abstract: JESD22-A114 MK50
Text: multi-master protection ­ 16 -channel DMA controller, supporting up to 64 request sources ­ External , General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (up to x64 , Two 2-channel quadrature decoder/general purpose timers ­ Periodic interrupt timers ­ 16 , Preview Data Sheet, Rev. 3, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. General · , glitch filter disa bled, analog filter disabled) - Asynchronous path 16 - ns 2 External


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PDF K50P121M100SF2 MK50X256CMC100, MK50N512CMC100 JESD22-A103 JESD22-A114 MK50
2012 - Not Available

Abstract: No abstract text available
Text: application requirements – Memory protection unit with multi-master protection – 16 -channel DMA , €“ Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA) (up to x64) integrated into each ADC â , -channel quadrature decoder/general purpose timers – Periodic interrupt timers – 16 -bit low-power timer â , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , —regional limit, includes sum of negative injection currents or sum of positive injection currents of 16


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PDF K50P144M100SF2V2 MK50DN512CLQ10, MK50DN512CMD10, MK50DX256CMD10 2013Freescale
2012 - MK50DN512CLL10

Abstract: VDDA14
Text: optimization based on application requirements ­ Memory protection unit with multi-master protection ­ 16 , redundancy checks ­ 128-bit unique identification (ID) number per chip · Analog modules ­ Two 16 -bit SAR ADCs , ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time , positive injection currents of 16 contiguous pins · Negative current injection · Positive current injection , continues on the next page. K50 Sub-Family Data Sheet, Rev. 1, 6/2012. 16 Preliminary General


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PDF K50P100M100SF2V2 MK50DX256CLL10, MK50DN512CLL10 MK50DN512CLL10 VDDA14
2012 - Not Available

Abstract: No abstract text available
Text: -channel quadrature decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier , power optimization based on application requirements ­ 16 -channel DMA controller, supporting up to 63 , General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64 , negative injection currents or sum of positive injection currents of 16 contiguous pins · Negative current , Notes 6 7 8 Table continues on the next page. K50 Sub-Family Data Sheet, Rev. 2, 4/2012. 16


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PDF K50P81M72SF1 K50P81M72SF1 MK50DX128CLK7, MK50DX256CLK7, MK50DX128CMB7, MK50DX256CMB7 16-bit
2010 - Not Available

Abstract: No abstract text available
Text: multi-master protection – 16 -channel DMA controller, supporting up to 64 request sources – External , €“ Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA) (up to x64) integrated into each ADC â , -channel quadrature decoder/general purpose timers – Periodic interrupt timers – 16 -bit low-power timer â , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , injection currents or sum of positive injection currents of 16 contiguous pins • Negative current


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PDF K50P144M100SF2 MK50DN512ZCLQ10, MK50DN512ZCMD10
2011 - Not Available

Abstract: No abstract text available
Text: Memory protection unit with multi-master protection ­ 16 -channel DMA controller, supporting up to 63 , ) ­ General-purpose input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier , 16 -bit low-power timer ­ Carrier modulator transmitter ­ Real-time clock · Communication interfaces ­ , .14 Voltage and current operating behaviors.14 Power mode transition operating behaviors. 16 , -regional limit, includes sum of negative injection currents or sum of positive injection currents of 16


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PDF K50P81M100SF2 MK50DX256ZCLK10, MK50DX256ZCMB10 K50P81M100SF2 inte800-521-6274
2010 - Not Available

Abstract: No abstract text available
Text: protection ­ 16 -channel DMA controller, supporting up to 64 request sources ­ External watchdog monitor ­ , Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (up to x64) integrated into each ADC ­ , decoder/general purpose timers ­ Periodic interrupt timers ­ 16 -bit low-power timer ­ Carrier modulator , operating behaviors. 16 Designing with radiated emissions in mind.17 Capacitance attributes , Preview Data Sheet, Rev. 2, 3/2011. 16 Preliminary Freescale Semiconductor, Inc. General


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PDF K50P144M100SF2 MK50N512CLQ100, MK50N512CMD100 K50P144M100SF2
2012 - Not Available

Abstract: No abstract text available
Text: application requirements – Memory protection unit with multi-master protection – 16 -channel DMA , €“ General-purpose input/output • Analog modules – Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA , interrupt timers – 16 -bit low-power timer – Carrier modulator transmitter – Real-time clock â , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , —regional limit, includes sum of negative injection currents or sum of positive injection currents of 16


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PDF K50P81M100SF2V2 MK50DX256CLK10 2013Freescale
2010 - Not Available

Abstract: No abstract text available
Text: multi-master protection – 16 -channel DMA controller, supporting up to 64 request sources – External , €“ Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA) (up to x64) integrated into each ADC â , -channel quadrature decoder/general purpose timers – Periodic interrupt timers – 16 -bit low-power timer â , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , injection currents or sum of positive injection currents of 16 contiguous pins • Negative current


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PDF K50P81M100SF2 MK50DX256ZCLK10, MK50DX256ZCMB10
2010 - Not Available

Abstract: No abstract text available
Text: requirements – Memory protection unit with multi-master protection – 16 -channel DMA controller , €“ Two 16 -bit SAR ADCs – Programmable gain amplifier (PGA) (up to x64) integrated into each ADC â , -channel quadrature decoder/general purpose timers – Periodic interrupt timers – 16 -bit low-power timer â , injection currents or sum of positive injection currents of 16 contiguous pins • Negative current , the next page. K50 Sub-Family Data Sheet Data Sheet, Rev. 6, 9/2011. 16 Freescale


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PDF K50P100M100SF2 MK50DX256ZCLL10, MK50DN512ZCLL10 32intended
2010 - K50 capacitor

Abstract: JESD22-A103 JESD22-A114 MK50 transimpedance amplifier 7.5 GHz
Text: ­ Memory protection unit with multi-master protection ­ 16 -channel DMA controller, supporting up , input/output · Analog modules ­ Two 16 -bit SAR ADCs ­ Programmable gain amplifier (PGA) (up to x64 , Two 2-channel quadrature decoder/general purpose timers ­ Periodic interrupt timers ­ 16 , consumption operating behaviors. 16 5.2.6 EMC radiated emissions operating behaviors , injection currents or sum of positive injection currents of 16 contiguous pins · Negative current


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PDF K50P81M100SF2 MK50DX256ZCLK10, MK50DX256ZCMB10 K50 capacitor JESD22-A103 JESD22-A114 MK50 transimpedance amplifier 7.5 GHz
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