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July 1997 datasheet (1)

Part ECAD Model Manufacturer Description Type PDF
July 1997 July 1997 ECAD Model Linear Technology LinearTechnology Chronicle Original PDF

July 1997 Datasheets Context Search

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1997 - c037

Abstract: s 404 p
Text: denoted by one or more of the following: a notch, a printed triangle, or a mold mark. July 1997 12-7 , one or more of the following: a notch, a printed triangle, or a mold mark. 12-8 July 1997 , , or a mold mark. July 1997 12-9 .410 Max Package Dimensions Micrel 1.250 MAX , following: a notch, a printed triangle, or a mold mark. 12-10 July 1997 Package Dimensions , following: a notch, a printed triangle, or a mold mark. July 1997 12-11 12 Package Dimensions


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PDF 14-Pin followi828) O-247 c037 s 404 p
1996 - 80960MX

Abstract: 272868 intel DOC UPPER20 I960 mx 271194
Text: 80960MX SPECIFICATION UPDATE Release Date: July , 1997 Order Number: 272868-002 The 80960MX , 708-296-9333 Copyright © 1996, 1997 , INTEL CORPORATION ii July , 1997 272868-002 80960MX , .14 272868-002 July , 1997 iii 80960MX SPECIFICATION UPDATE REVISION HISTORY Rev. Date Version July , 1997 002 July 20, 1996 Mar. 28, 1996 Nov. 16, 1994 Nov. 11, 1994 Sep , 1.01 1.00 272868-002 July , 1997 1 of 14 80960MX SPECIFICATION UPDATE PREFACE As of


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PDF 80960MX 80960MX 272868 intel DOC UPPER20 I960 mx 271194
1997 - PP-PE

Abstract: FAS366 DB6F parallel scsi port B757 STP2002QFP 946f CLK40M
Text: STP2002QFP.backup.frm Page 1 Monday, August 25, 1997 3:19 PM STP2002QFP July 1997 FEPS DATA , description of each of the major components. 2 July 1997 STP2002QFP.backup.frm Page 3 Monday, August , defined in the IEEE 802.3 MII specification. July 1997 3 STP2002QFP.backup.frm Page 4 Monday , chip. 4 July 1997 STP2002QFP.backup.frm Page 5 Monday, August 25, 1997 3:19 PM FEPS Fast , Figure 2. FEPS Functional Block Diagram July 1997 5 STP2002QFP.backup.frm Page 6 Monday, August


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PDF STP2002QFP STP2002QFP 10/100Base-T 64-bit 32-bit 20-Mbps FAS366 10-/100-Mbps PP-PE DB6F parallel scsi port B757 946f CLK40M
1997 - dps 298 cp

Abstract: stp2001qfp STP2002QFP STP2024QFP STP2202ABGA STP2210QFP STP1030 STP2002 dps 298 cp 4
Text: STP2202ABGA July 1997 DSC DATA SHEET Dual Processor System Controller DESCRIPTION The , July 1997 DSC Dual Processor System Controller STP2202ABGA XB1 (STP2230SOP) The three port , SlavIO, respectively, if the system utilizes PCI buses. July 1997 3 DSC Dual Processor System , , Mouse, Floppy Figure 1. Typical System Configuration 4 July 1997 DSC Dual Processor , 5V_REF JTAG_TDI JTAG_TRST_L Figure 2. DSC Block Diagram July 1997 5 DSC Dual


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PDF STP2202ABGA STP2202BGA Can24Y BOZ24Y BOZ24L dps 298 cp stp2001qfp STP2002QFP STP2024QFP STP2202ABGA STP2210QFP STP1030 STP2002 dps 298 cp 4
hosiden bc 52

Abstract: 1152x900 30 Pinout panel lcd
Text: STP3030 S un M ic r o e l e c t r o n ic s July 1997 Monochrome LCD Controller DATA , Figure 2. STP3030 Typical Application S un M icroelectronics July 1997 M onochrom e LCD , 57 Mise. Signals 4 30 TEST1 TEST2 Figure 3. Logical Pinout July 1997 S un M , M icroelectronics July 1997 M onochrom e LCD Controller M onochrom e LCD Controller P r e , chip test mode) Three-state enable mode (0 = three-states outputs, 1 = system mode) July 1997 S


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PDF STP3030 STP3030 L64825) 1152x900 68-Lead STP3030PLCC hosiden bc 52 30 Pinout panel lcd
1997 - STP2230SOP

Abstract: STP2230SOP-100 B546
Text: STP2230SOP July 1997 XB1 DATA SHEET Crossbar Switch DESCRIPTION The STP2230SOP crossbar , Figure 2. STP2230SOP Logic Diagram 2 July 1997 XB1 Crossbar Switch Processor Data Bus, B , Diagram July 1997 3 XB1 Crossbar Switch STP2230SOP SIGNAL DESCRIPTIONS I/O No. Pins , I/F Type LV TTL, 5-volt tolerant July 1997 XB1 Crossbar Switch STP2230SOP ELECTRICAL , capacitance Any output ­ 8 pF CIO Input/Output capacitance ­ 10 pF July 1997


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PDF STP2230SOP STP2230SOP 16-bit STP2230SOP-100 STP2230SOP-100 B546
1997 - intel 80c188 users manual

Abstract: 80L186EB13 82C59A 82C59A-2 272897 intel DOC
Text: Date: July , 1997 Order Number: 272897-003 The 80C186EB/80C188EB and 80L186EB/80L188EB embedded , 44-0-1793-421-333, other countries 708-296-9333 Copyright © 1997 , INTEL CORPORATION ii July , 1997 , .23 272897-003 July , 1997 iii 80x186EB/80x188EB MICROPROCESSORS SPECIFICATION UPDATE , date. July , 1997 1 of 24 80x186EB/80x188EB MICROPROCESSORS SPECIFICATION UPDATE PREFACE , release of the specification. 2 of 24 July , 1997 272897-003 80x186EB/80x188EB MICROPROCESSORS


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PDF 80C186EB/80C188EB 80L186EB/80L188EB 80L186EB/80L188EB 80L186EB13 80C186EB/80C188 16-Bit 80L186EB intel 80c188 users manual 80L186EB13 82C59A 82C59A-2 272897 intel DOC
1997 - mbus master circuit

Abstract: STP2011 MAD44 mbus 10 application MAD50 three phase ESC circuit diagrams
Text: STP2011PGA-50 July 1997 MSI DATA SHEET MBus-to-SBus Interface DESCRIPTION The STP2011 , SEL_ESC SEL_SEC Figure 2. STP2011 Logical Connections 2 July 1997 MSI MBus-to-SBus , Application July 1997 3 STP2011PGA-50 MSI MBus-to-SBus Interface SIGNAL DESCRIPTIONS MBus , . July 1997 MSI MBus-to-SBus Interface STP2011PGA-50 SBus Interface Signal Type , ) DBRI_BR Input DBRI_BG Output ESC_BR Input ESC_BG Output SYS_RESET July 1997


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PDF STP2011PGA-50 STP2011 STP2011PGA 279-Pin STP2011 mbus master circuit MAD44 mbus 10 application MAD50 three phase ESC circuit diagrams
1997 - TE28F160S5-70

Abstract: dt28f320s590 DT28F320S5-90 TE28F160S5-100 DT28F160S3-100 DT28F160S5-70 TE28F160S3-100 28F320S3 DT28F160S5-100 te28f160s570
Text: Release Date: July 1997 Order Number: 297849-002 The 28F160S3, 28F320S3, 28F160S5 and 28F320S5 may , property of their respective owners. ii July , 1997 297849-002 WORD-WIDE FlashFileTM MEMORY , .8 297849-002 July , 1997 iii WORD-WIDE FlashFileTM MEMORY FAMILY SPECIFICATION UPDATE REVISION , identifier information in this Document. 297849-002 Description July , 1997 1 WORD-WIDE , include typos, errors, or omissions from the current published specifications. 2 July , 1997


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PDF 28F160S3, 28F160S5 28F320S3, 28F320S5 28F160S5 28F320S5 DT28F160S3-100 DT28F320S3-110 TE28F160S5-70 dt28f320s590 DT28F320S5-90 TE28F160S5-100 DT28F160S3-100 DT28F160S5-70 TE28F160S3-100 28F320S3 DT28F160S5-100 te28f160s570
1997 - BY575

Abstract: 28BZ 8 PINS J-354W display 16119
Text: 501-4126 (3D) 501-4127 (2D) July 1997 FFB DATA SHEET High Performance UPA Based 24 , July 1997 FFB High Performance UPA Based 24-bit Frame Buffer 501-4126 (3D) 501-4127 (2D , Fonts (1, 8, 32 bit; 1D, 2D). · Viewport Clipping. · WID Clipping. · Z Buffering. July 1997 3 , multiplex ratio, and runs at a clock speed of 220 MHz. 4 July 1997 FFB High Performance UPA Based , 960 Standard Single buffered: Max height = 1024 Max width = 1280 July 1997 5


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PDF 24-bit BY575 28BZ 8 PINS J-354W display 16119
hosiden bc 52

Abstract: BT455 STP3010 sharp LCD Controller LCD Controller bt445 Color LCD 37 pin sharp crt lcd controller
Text: S un M icro electro nics July 1997 Color LCD Controller DATA SHEET D e s c r ip t io n , ), Figure 1. STP3031 Block Diagram 1024 S un M icro electro nics July 1997 Color LCD , Diagram Figure 3. STP3031 Typical Application July 1997 S un M icro electro nics Color LCD , Horizontal sync to backlight inverter 1026 S un M icro electro nics July 1997 Color LCD , ) CO LT ÎË S T July 1997 S un M icro electro nics 1027 Calor LCD Controller Color LCD


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PDF STP3031 STP3010) STP3031, BT445 aB02C APWR50N APWR120FF 84-Pin hosiden bc 52 BT455 STP3010 sharp LCD Controller LCD Controller Color LCD 37 pin sharp crt lcd controller
Not Available

Abstract: No abstract text available
Text: un M icroelectronics July 1997 Monochrome LCD Controller Monochrome LCD Controller 25 , Figure 3. Logical Pinout July 1997 S un M icroelectronics 3 Preliminary Monochrome LCD , July 1997 Monochrome LCD Controller Monochrome LCD Controller Preliminary STP3030 , Input Three-state enable mode (0 = three-states outputs, 1 = system mode) July 1997 S un M , M icroelectronics July 1997 Monochrome LCD Controller Monochrome LCD Controller


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PDF STP3030 STP3030 L64825) 1152x900 68-Lead
1998 - SOD80 footprint

Abstract: SOD87 footprint Soldering guidelines and SMD footprint design SMD footprint design SOD106 land pattern land pattern sot346 SOD110 footprint MLC745 SOD87 footprint pcb smd footprint
Text: Discrete Semiconductor Packages File under Discrete Semiconductors, SC18 July 1997 Philips , N and the total pull duration is not longer than 5 s. July 1997 The component may be mounted , semiconductor packages. July 1997 APPLYING SOLDER PASTE TO THE PCB Solder paste can be applied to the , correct position on the lands · With an acceptable height and shape. July 1997 2 3 4 5 , during reflow soldering. July 1997 A maximum placement deviation (P) of 0.25 mm is used in these


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PDF MGK391 MSC422 OT457 SC-74) MSC423 SOD80 footprint SOD87 footprint Soldering guidelines and SMD footprint design SMD footprint design SOD106 land pattern land pattern sot346 SOD110 footprint MLC745 SOD87 footprint pcb smd footprint
Not Available

Abstract: No abstract text available
Text: STP2200ABGA S un M ic r o e l e c t r o n ic s July 1997 use Uniprocessor System , Figure 1. USC Block Diagram 2 S un M icroelectronics July 1997 use U niprocessor System , Figure 2. USC Typical Application Diagram July 1997 S un M icroelectronics 3 use , rite buffer 4 S un M icroelectronics July 1997 use U niprocessor System Controller , Power and Ground Signal D escription V DD +3.3 V V SS G round July 1997 S un M


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PDF STP2200ABGA SS-10/S -20-type 128-MB
1997 - 8 Pinout monochrome lcd

Abstract: L64825 diagram LCD monochrome 14 pin 16bit pn sequence generator 15 Pinout monochrome lcd STP3030 hosiden lcd
Text: STP3030 July 1997 Monochrome LCD Controller Monochrome LCD Controller DATA SHEET , Application 2 July 1997 Monochrome LCD Controller Monochrome LCD Controller 25 17 37 51 , TRIDIS Figure 3. Logical Pinout July 1997 3 Preliminary Monochrome LCD Controller , . July 1997 Monochrome LCD Controller Monochrome LCD Controller Preliminary STP3030 , Input Three-state enable mode (0 = three-states outputs, 1 = system mode) July 1997 5


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PDF STP3030 STP3030 L64825) 1152x900 8-bit/10 16-bit/5 8 Pinout monochrome lcd L64825 diagram LCD monochrome 14 pin 16bit pn sequence generator 15 Pinout monochrome lcd hosiden lcd
1997 - upa64

Abstract: STP2001 STP2200ABGA STP2210QFP STP2220ABGA STP2222ABGA STP2230SOP AN/USC-43
Text: STP2200ABGA July 1997 USC Uniprocessor System Controller DATA SHEET DESCRIPTION The , Block Diagram 2 July 1997 USC Uniprocessor System Controller UPA_ADDRBUS1 STP2200ABGA , SIMMs Figure 2. USC Typical Application Diagram July 1997 3 USC Uniprocessor System , MWB_CTRL0 O Drain the XB1 write buffer 4 July 1997 USC Uniprocessor System Controller , Power and Ground Signal Description VDD +3.3 V VSS Ground July 1997 5 USC


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PDF STP2200ABGA SS-10/SS-20-type 128-MB DescriptionSTP2200ABGA-83 1997Document 802-7953-02ORDERINGINFORMATION 838MHz ControllerSTP2200ABGA-100 1008MHz upa64 STP2001 STP2200ABGA STP2210QFP STP2220ABGA STP2222ABGA STP2230SOP AN/USC-43
1997 - microsparc 1

Abstract: STP2001 STP2021PLCC
Text: STP2021 July 1997 PMC Power Management Controller DATA SHEET DESCRIPTION The STP2021 , . STOP July 1997 Output Processor clock stop mode. 3 Preliminary PMC Power Management , . JTAG_CLK Input JTAG clock input. JTAG_RST Input JTAG reset input 4 July 1997 , ­ 0.4 V IOL = -100 µA ­ ­ 0.8 V July 1997 Input current VIN = VCC or , three-state 70 pf ­ 27 ns 6 July 1997 Preliminary PMC Power Management Controller


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PDF STP2021 STP2021 STP2001 84-Lead STP2021PLCC 84-Pin microsparc 1 STP2021PLCC
schematic diagram apc UPS

Abstract: ICS633 schematic diagram UPS APC IC-S573 AT12L UPA audio analyzer AT12N apc ups schematic STP2002
Text: S un M icro electro nics July 1997 _DSC D A TA SH E E T D ual Processor System , ic s July 1997 DSC Dual Processor System Controller XB1 (STP2230SOP) The three port , SlavIO, respectively, if the system utilizes PCI buses. July 1997 S un M ic r o elec t r o n ic , S un M ic r o elec t r o n ic s July 1997 DSC Dual Processor System Controller SnD , July 1997 DSC Dual Processor System Controller F u n c t io n a l B l o c k s DSC is divided


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PDF STP2202BGA PINA02Y PINA02Y schematic diagram apc UPS ICS633 schematic diagram UPS APC IC-S573 AT12L UPA audio analyzer AT12N apc ups schematic STP2002
UltraSPARC ii

Abstract: PI-275 UltraSPARC IIIi
Text: S un M icroelectronics July 1997 FFB DATASHEET D e s c r ip t io n The Fast Frame Buffer , 1. UPA Based System Block Diagram 1060 S un M icroelectronics July 1997 FFB High , Buffering. July 1997 Sun M ic ro elec tro n ics 1061 FFB High Performance UPA Based 24 , runs at a clock speed of 220 MHz. 1062 S un M icroelectronics July 1997 FFB High , 1280 July 1997 S un M icroelectronics 1063 FFB High Performance UPA Based 24-bit Frame


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PDF 24-bit UltraSPARC ii PI-275 UltraSPARC IIIi
1997 - Genesis Gmz1

Abstract: motorola AN 240 Phase control MC141544DW Genesis Microchip osd gmz1 motorola 10 lcd pinout OSD ic rgb to yuv in microcontroller motorola gmz1 genesis video controller
Text: Interfacing the Motorola 141544DW On Screen Display to the gmZ1 MSD-0008-A July 1997 July 1997 200 , MSD-0008-A July 31 1997 Copyright 1997 , Genesis Microchip Inc. All Rights Reserved Genesis , omissions which may appear in this document. July 1997 -2- MSD-0008-A Genesis Microchip , Register 4 4 5 5 5 6 6 6 7 7 7 8 8 8 9 9 10 10 July 1997 -3- MSD-0008-A Genesis Microchip , Data O ut Green Data O ut Red Data O ut July 1997 -5- MSD-0008-A Genesis Microchip


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PDF 141544DW MSD-0008-A MSD-0008-A 12x18 24x18 Genesis Gmz1 motorola AN 240 Phase control MC141544DW Genesis Microchip osd gmz1 motorola 10 lcd pinout OSD ic rgb to yuv in microcontroller motorola gmz1 genesis video controller
1996 - A5028

Abstract: 272617 8XC251 step 8xC251SX 8XC251SQ 8XC251SP 8XC251SB 8XC251SA 8XC251 intel DOC
Text: 8XC251Sx (8XC251SA, SB, SP, SQ) SPECIFICATION UPDATE Release Date: July , 1997 Order Number , July , 1997 272836-004 8XC251 SA/SB/SP/SQ SPECIFICATION UPDATE CONTENTS CONTENTS , .21 272836-004 July , 1997 iii 8XC251 SA/SB/SP/SQ SPECIFICATION UPDATE REVISION , for erratum 9600008. July , 1997 5 of 21 8XC251 SA/SB/SP/SQ SPECIFICATION UPDATE PREFACE , specification or user documentation (datasheets, manuals, etc.). 272936-004 July , 1997 7 of 21


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PDF 8XC251Sx 8XC251SA, 8XC251Sx 74F541; A5028 272617 8XC251 step 8XC251SQ 8XC251SP 8XC251SB 8XC251SA 8XC251 intel DOC
STP3010

Abstract: CG-03 sharp LCD Controller sharp crt lcd controller PWR120FF
Text: STP3031 S un M ic r o e l e c t r o n ic s July 1997 Color LCD Controller DATA SH , s R1 (3:0), Figure 1. STP3031 Block Diagram 2 S un M icroelectronics July 1997 , Alternate chip select Three-state test pin (0 = Hi-Z outputs, 1 = system mode) July 1997 S un M , mA IQ[_= -10.0 mA 6 S un M icroelectronics July 1997 Color LCD Controller Color , July 1997 S un M icroelectronics 7 P re lim in a ry STP3D31 Color LCD Controller Color


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PDF STP3031 STP3031 STP3010) STP3031, BT445 STP3D31 84-Pin STP3031PQFP STP3010 CG-03 sharp LCD Controller sharp crt lcd controller PWR120FF
1997 - STP2014

Abstract: MK48T08-1 EBA11 STP2104 AmZ8 AD27 AD29 AD30
Text: STP2014.frm 1 Mon Jul 7 08:25:34 1997 STP2014 July 1997 SEC DATA SHEET SBus-to-EBus , FLOP_TC FLOP_EJECT CMPS_LED_WR DIAG_SW Figure 1. STP2014 Block Diagram 2 July 1997 , SEC SBus-to-EBus Controller Figure 2. STP2014 Logical Connections July 1997 3 , 2 Generic Figure 3. STP2014 Typical Application 4 July 1997 STP2014.frm 5 Mon Jul 7 , ] AUX1IN[1:0] AUX1OUT[3:0] July 1997 Type Input Output Input Output Description Auxiliary


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PDF STP2014 STP2014 STP2104 STP2014PQFP 160-Pin MK48T08-1 EBA11 AmZ8 AD27 AD29 AD30
Not Available

Abstract: No abstract text available
Text: 3 î P2230S S un M icroelectronics July 1997 XB1 DATA SHEET D e s c r ip t io n The , icroelectronics July 1997 XB1 Crossbar Switch Process«' Data Bus, B{143:0J Memory Data Bus, A[2B8:0 , SIMMs Figure 3. STP223QSOP Typical Application Diagram July 1997 S un M icroelectronics , LVTTL LVTTL 3.3-V PECL LVTTL 926 S un M icroelectronics July 1997 E l e c t r ic a l S p , input Any output ~ 6 8 10 pF pF PF _ July 1997 S un M icroelectronics 927 XB1


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PDF P2230S STP2230SOP 16-bit 48-Pin STP223QSOP-100
1997 - STP2000QFP

Abstract: SuperSPARC microsparc ncr92c990 STP2001 CLK32 NCR89C100 scsi T7213
Text: STP2000.frm 1 Mon Jul 7 08:11:43 1997 STP2000QFP July 1997 Master I/O 32-bit SBus Master , July 1997 STP2000.frm 3 Mon Jul 7 08:11:43 1997 Master I/O 32-bit SBus Master I/O Controller , GND Figure 3. STP2000 Logical Connections July 1997 s r o t a l l i c s O 6 3 , be used to select between the two. 4 July 1997 STP2000.frm 5 Mon Jul 7 08:11:43 1997 , Strobe (25 µA pull-down) P_BSY I/O Parallel Port Busy (25 µA pull-up) July 1997 Parallel


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PDF STP2000 STP2000QFP 32-bit STP2001 CLK32 STP2000QFP SuperSPARC microsparc ncr92c990 CLK32 NCR89C100 scsi T7213
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