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1-1393586-6 TE's AMP HEADER 421
1393586-8 TE's AMP HEADER 421
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1393586-6 TE's AMP HEADER 421

IOR 421 Datasheets Context Search

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2000 - ssi 73M2550

Abstract: 73M1550 ST16C1450
Text: Handheld Terminal Personal Digital Assistants Cellular Phones DataPort Datasheet Version 4.2.1 August , REV. 4.2.1 GENERAL DESCRIPTION The ST16C1450 is a universal asynchronous receiver and transmitter , 48-TQFP PACKAGE DSR# VCC N.C. N.C. N.C. CD# N.C. N.C. D3 D2 D1 D0 xr REV. 4.2.1 48 47 , # XTAL1 XTAL2 GND N.C. N.C. N.C. N.C. RST INT IOW# IOR # RI# 28 VCC D3 D2 D1 D0 D4 D5 , to +85°C -40°C to +85°C DEVICE STATUS Active Active Active Active 2 IOW# IOR # xr REV


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PDF ST16C1450 73M1550/2550/Software INS8250, NS16450 24MHz ssi 73M2550 73M1550
2005 - ST16C1450

Abstract: 16C1450 NCD223 73M1550 ST16C1450CJ28 ST16C1450CQ48 ST16C1450IJ28 ST16C450 IOR 421
Text: ST16C1450 xr 2.97V TO 5.5V UART AUGUST 2005 REV. 4.2.1 GENERAL DESCRIPTION , 2.97V TO 5.5V UART REV. 4.2.1 FIGURE 2. ST16C1450 PINOUTS N.C. D3 D2 D1 N.C. D0 , . D2 23 INT 3 22 RST D3 21 RI# 4 20 IOR # 17 IOW# 19 16 XTAL2 18 , 10 20 A1 CS# 11 19 A2 15 16 17 18 GND IOR # RI# INT 14 13 , 5.5V UART REV. 4.2.1 PIN DESCRIPTIONS NAME 28-PIN PLCC 48-PIN TQFP TYPE


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PDF ST16C1450 ST16C1450 73M1550 73M2550 16C1450 NCD223 ST16C1450CJ28 ST16C1450CQ48 ST16C1450IJ28 ST16C450 IOR 421
2000 - ssi 73M2550

Abstract: FIFO18 ST16C1550CJ28-F
Text: Assistants Cellular Phones DataPort Datasheet Version 4.2.1 August 2005 741.38 KB Application Notes DAN , -BYTE FIFO REV. 4.2.1 GENERAL DESCRIPTION The ST16C1550 and ST16C1551 UARTs (here on denoted as the , Cellular Phones DataPort 16 Byte TX FIFO A2:A0 D7:D0 IOR # IOW # CS# Data Bus Interface UART , . N.C. N.C. CD# N.C. N.C. D3 D2 D1 D0 xr REV. 4.2.1 NOTE: PINOUTS NOT TO SCALE. ACTUAL SIZE OF , . ST16C1550CQ48 31 30 29 28 27 26 25 XTAL1 XTAL2 GND N.C. N.C. N.C. IOW# IOR # 28


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PDF ST16C1550 16-Byte 73M1550/2550 INS8250, NS16C550 24Mhz ssi 73M2550 FIFO18 ST16C1550CJ28-F
2004 - DSA00210750

Abstract: No abstract text available
Text: áç APRIL 2004 ST16C2550 2.97V TO 5.5V DUART WITH 16-BYTE FIFO REV. 4.2.1 GENERAL , input · 48-TQFP and 44-PLCC packages A2:A0 D7:D0 IOR # IOW# CSA# CSB# INTA INTB TXRDYA# TXRDYB# RXRDYA , TXRDYA# áç REV. 4.2.1 DSRA# VCC RIA# CTSA# 38 CDA# 48 45 43 42 41 40 , A0 A1 A2 CTSB# RTSB# RIB# DSRB# IOR # CSA# 10 CSB# 11 NC 12 15 13 18 19 20 22 16 14 17 21 23 CTSB# 24 NC RXRDYB# DSRB# RTSB# XTAL2 CDB# XTAL1 IOW# IOR # RIB# GND 9 10


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PDF ST16C2550 16-BYTE ST16C2550 PC16550 DSA00210750
2005 - ssi 73M2550

Abstract: 73M2550
Text: 12 13 14 15 16 17 RI# 18 INT XTAL1 XTAL2 GND IOW# IOR # 2 xr REV. 4.2.1 , xr AUGUST 2005 ST16C1550/51 2.97V TO 5.5V UART WITH 16-BYTE FIFO REV. 4.2.1 GENERAL , TX FIFO A2:A0 D7:D0 IOR # IOW # CS# Data Bus Interface UART Configuration Regs DTR#, RTS# M odem , xr REV. 4.2.1 NOTE: PINOUTS NOT TO SCALE. ACTUAL SIZE OF TQFP PACKAGE IS SMALLER THAN PLCC , 25 XTAL1 XTAL2 GND N.C. N.C. N.C. IOW# IOR # 28-PLCC PACKAGES 26 DSR# VCC


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PDF ST16C1550/51 16-BYTE ST16C1550 ST16C1551 ST16C155X) 73M1550 73M2550 ST16C155X ST16C1551 26-Aug-09 ssi 73M2550
2005 - ST16C1550

Abstract: 16C1550 16-BYTE 73M1550 ST16C1551 ST16C550
Text: ST16C1550/51 xr 2.97V TO 5.5V UART WITH 16-BYTE FIFO AUGUST 2005 REV. 4.2.1 GENERAL , DIAGRAM 16 Byte TX FIFO A2:A0 Transm itter D7:D0 TX IOR # IOW # CS# INT Data Bus , www.exar.com xr ST16C1550/51 2.97V TO 5.5V UART WITH 16-BYTE FIFO REV. 4.2.1 FIGURE 2. ST16C1550 , . 21 RI# 19 GND 20 18 N.C. IOR # 17 IOW# 16 15 XTAL2 14 N.C. XTAL1 , 13 14 15 16 17 18 XTAL1 XTAL2 IOW# GND IOR # RI# INT


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PDF ST16C1550/51 16-BYTE ST16C1550 ST16C1551 ST16C155X) 73M1550 73M2550 ST16C155X 16C1550 ST16C550
2000 - ST16C2552CJ44-F

Abstract: marking AFR PC16552
Text: Sup V Pkgs Documents Datasheets Datasheet Version 4.2.1 October 2006 671.70 KB Application Notes 16/16 , 2006 REV. 4.2.1 GENERAL DESCRIPTION The ST16C2552 (2552) is a dual universal asynchronous receiver , external clock input A2:A0 D7:D0 IOR # IOW# CS# CHSEL INTA INTB TXRDYA# TXRDYB# MFA# (OP2A#, BAUDOUTA , 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO FIGURE 2. PIN OUT ASSIGNMENT REV. 4.2.1 TXRDYA# DSRA , 16 INTB 17 18 MFB# 19 IOW# 20 RESET 21 GND 22 RTSB# 23 IOR # 24 RXB 25 TXB 26 DTRB# 27 CTSB# 28 30


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PDF ST16C2552 PC16552 ST16C2552CJ44-F marking AFR PC16552
2006 - ST16C2552

Abstract: 16-BYTE 16C550 PC16552 ST16C2552CJ44 ST16C2552IJ44 XR16C2852 XR16L2752
Text: ST16C2552 2.97V TO 5.5V DUAL UART WITH 16-BYTE FIFO OCTOBER 2006 REV. 4.2.1 GENERAL , IOR # IOW# CS# CHSEL INTA INTB TXRDYA# TXRDYB# MFA# (OP2A#, BAUDOUTA#, or RXRDYA#) MFB , 5.5V DUAL UART WITH 16-BYTE FIFO REV. 4.2.1 D4 D3 D2 D1 D0 TXRDYA# VCC RIA , # CTSB# 28 DTRB# 27 TXB 26 RXB 25 IOR # 24 RTSB# 23 GND 22 RESET 21 CS# IOW# 20 , -BYTE FIFO REV. 4.2.1 PIN DESCRIPTIONS Pin Description NAME 44-PLCC PIN # TYPE DESCRIPTION


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PDF ST16C2552 16-BYTE ST16C2552 PC16552 16C550 PC16552 ST16C2552CJ44 ST16C2552IJ44 XR16C2852 XR16L2752
2005 - STK 411 230 E

Abstract: A5005 e10501 CC78K0 CC78K0S RA78K0 RA78K0S SM78K SM1016
Text: PM+ . 31 4.2.1 . 31 4.2.2 [V850] . 32 4.3 PM+ SM+ . 33 4.3.1 . 33 4.4 . 34 , . 59 5.8.1 . 60 5.8.2 IOR /SFR . 61 5.8.3 I/O . 61 5.9 . 62 5.9.1 . 63 5.9.2 , . 207 . 208 . 209 DMM . 210 . 212 . 215 IOR /SFR . 216 IOR /SFR . 220 I/O , C . 417 D . 420 D.1 . 420 D.2 . 421 D.3 . 422 E . 446 U17662JJ1V0UM 13 , . 57 DMM 58 . 58 . . 60 IOR /SFR . 61 I/O . 61 63 . . 65 . 70


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PDF 78K0S U17662JJ1V0UM001 U17662JJ1V0UM STK 411 230 E A5005 e10501 CC78K0 CC78K0S RA78K0 RA78K0S SM78K SM1016
2004 - v8507

Abstract: e10501 tip f0401 F101B RA78K0 RA78K0S CC78K0S uart c code v850 SFR 252 diode e10901
Text: PM+ . 32 4.2.1 . 32 4.2.2 [V850] . 33 4.3 PM+ SM+ . 34 4.3.1 . 34 4.4 . 35 , . 56 5.8.2 IOR /SFR . 57 5.8.3 I/O . 57 5.9 . 58 5.9.1 . 58 5.9.2 Run-Break . 58 , 205 . 207 DMM . 208 . 210 . 213 IOR /SFR . 215 IOR /SFR . 219 I/O . 222 , . 416 register . 417 reset . 418 run . 419 step . 420 stop . 421 upload . 422 , 50 . . 51 . 52 . 52 . 53 . 54 DMM 55 . . 56 IOR /SFR . 57 I/O


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PDF 78K0S U17246JJ2V0UM002 U17246JJ2V0UM v8507 e10501 tip f0401 F101B RA78K0 RA78K0S CC78K0S uart c code v850 SFR 252 diode e10901
N82593SX

Abstract: i386SL Aromat relay Intel 82593 N82593 Intel 82593 1991 82360SL intel i3 MOTHERBOARD pcb CIRCUIT diagram TTL 82593 s593 crystal
Text: DRQ5930 * !DRQ2 + DRQ5930 * DRQ6 * !(DRQ2 * (! IOR + !iSW) 4.2.1 82593 I/O READ ACCESS Figure 4 shows , verview .1-359 4.2 ISA Bus In terface. 1-360 4.2.1 82593 I/O Read , 7 for low PCB space and additional power saving. This is discussed in detail in Section 4.2.1 . The , additional delay when the P L D resumes from standby mode.) M inimum delay from SA bus valid to IOR is M inimum delay from IOR to R D 593 is Once the 82593 is configured, the application can as semble the


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PDF 386SL N82593SX i386SL Aromat relay Intel 82593 N82593 Intel 82593 1991 82360SL intel i3 MOTHERBOARD pcb CIRCUIT diagram TTL 82593 s593 crystal
Not Available

Abstract: No abstract text available
Text: 4855452 OOS^SIO S34 International IOR Rectifier IRF2807S/L Electrical Characteristics @ Tj = , 5 4 5 2 0G 2R511 470 International IOR Rectifier IRF2807S/L VDS, Drain-to-Source Voltage , 002^513 243 ■1000 International IOR Rectifier * ■D in Current (A) D ra IRF2807S/L , , Junction-to-Case 4 0 5 5 4 5 2 GG2cl S m 1ÛT International IOR Rectifier IRF2807S/L D R IV E R , – MflSSMSa GGSTSI S Fig 13b. Gate Charge Test Circuit 01b ■International IOR Rectifier


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PDF IRF2807S) IRF2807L)
Not Available

Abstract: No abstract text available
Text: °C/W 9/22/97 4055455 □□2C 1S40 271 IRLZ24NS/L International IOR Rectifier , ) International IOR Rectifier VDS , Drain-to-Source Voltage (V) Fig 2. Typical Output Characteristics , . Temperature IRLZ24NS/L C, Capacitance (pF) International IOR Rectifier 0 4 V DS , , Junction-to-Case 4Ô 554 52 002^544 ^17 IRLZ24NS/L International IOR Rectifier L Fig 12a , IRLZ24NS/L International IOR Rectifier D2Pak Package Outline 10.54 (.415) 10.29 (.405) 4.69


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PDF 1358D IRLZ24NS/L IRLZ24NS) IRLZ24NL)
Not Available

Abstract: No abstract text available
Text: ) 9 .3 8 (.3 6 9 ) ! 1 0.69 ( . 421 ) 1 0 .3 9 ( 409) 1 6.0 2 (.631) IS .7 3 (.619) U , -1 Dimensions in millimeters and (inches) 8/29/97 4ÔS5452 GGSHSbS TT*? International IOR Rectifier , Fig. 5 International IOR Rectifier 15CLQ100 - 0.0001 0 20 40 60 , ) Fig.5 - Max. Thermal Impedance ZlhJC characteristics (Per Leg) International IOR Rectifier WORLD


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PDF 15CLQ100 15CLQ100 MIL-PRF-19500 S5452
765 fdc

Abstract: nec 765 fdc NEC 765A WD76C10 FLOPPY STEPPER MOTOR diagram baling machine WD7600 Western Digital floppy disk MC146818A WD75C10
Text: -bit storage cell via the internal bus. It gets the IOR and IOW signals from the WD76C10, and with the , 30 wd 15 dirc 17 ided7 43 ra8 56 we 14 dma 8 idx 33 ra9 55 wp 31 dph 52 ior 48 ra10 54 dpl 53 , fclk2 27 m03 48 ior 69 rtcirq 7 rdd 28 hdl 49 iow 70 tc 8 dma 29 rwc 50 csen 71 prdy 9 firq 30 pwrdn , . IDED7 is an input, passing data from the IDE drive to DB7 of the Host data bus whenever an IOR of the IDE drive interface is detected, except when reading from address 3F7H. During an IOR of 3F7H, the


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PDF WD76C20 WD76C20 8042CS, 765 fdc nec 765 fdc NEC 765A WD76C10 FLOPPY STEPPER MOTOR diagram baling machine WD7600 Western Digital floppy disk MC146818A WD75C10
NEC 765A

Abstract: circuit diagram laptop motherboard plcc ide controller WD7600 wd76c20
Text: -bit storage cell via the internal bus. It gets the IOR and IOW signals from 765A Core - The core of the , NAME PIN DS2 DS3 EMS FIRQ FCLK1/FX1 FCLK2 FX1 FX1/FCLK1 HDL HS IDEDENH IDEDENL IDED7 IDX IOR IOW , VSS DACK IOR IOW CSEN DACKEN DPH DPL RA10 RA9 RA8 RESET RCLR BALE RTCX RTCX VBAT MX14 PIN 64 65 66 67 , , passing data from the IDE drive to DB7 of the Host data bus when ever an IOR of the IDE drive interface is detected, except when reading from address 3F7H. During an IOR of 3F7H, the floppy DCHG status is output on


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PDF WD76C20 MC146818A WD76C20 D76C2 8042CS, NEC 765A circuit diagram laptop motherboard plcc ide controller WD7600
2003 - stk 413 430 ic

Abstract: e10501 ic stk 442 130 IC stk 412 - 410 tektronix 213 dmm ic stk 412 -420 IC stk 412 410 led 7segment LED 355 U16906JJ1V0UM
Text: 7.102 8.380 A. 421 B.429 C.434 D.437 E.473 U16906JJ1V0UM 3 , . 25 4 PM plus . 26 4.1 . 27 4.2 PM plus . 27 4.2.1 . 27 4.2.2 . 28 4.3 PM , wish . 416 xcoverage . 417 xtime . 418 xtrace . 419 8.12 420 . A . 421 A.1 . 421 A.2 . 421 A.3 . 421 A.4 . 421 List . 422 Grep . 423 RRM . 424 Hook . , -1 B-2 B-3 B-4 B-5 B-6 C-1 D-1 18 Tcl . 382 ID . 384 . 421 . 429 . 429


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PDF U16906JJ1V0UM001 U16906JJ1V0UM stk 413 430 ic e10501 ic stk 442 130 IC stk 412 - 410 tektronix 213 dmm ic stk 412 -420 IC stk 412 410 led 7segment LED 355 U16906JJ1V0UM
2006 - diode SFR-136

Abstract: SFR 136 213-DMM STK 415 90 7 segment E10501 stk 282 RA78K0R CC78K0S CC78K0R CC78K0
Text: PM+ . 31 4.2.1 . 31 4.2.2 [V850] . 32 4.3 PM+ SM+ . 33 4.3.1 . 33 4.4 . 34 , . 59 5.8.1 . 60 5.8.2 IOR /SFR . 61 5.8.3 I/O . 61 5.9 . 62 5.9.1 . 63 5.9.2 , . 211 . 212 . 213 DMM . 214 . 217 . 220 IOR /SFR . 221 IOR /SFR . 225 I/O , . 58 . . 60 IOR /SFR . 61 I/O . 61 63 . . 65 . 70 . 71 . 74 , DMM IOR /SFR 214 . . 217 . 220 IOR [V850] . 221 SFR [78K] . 222 IOR /SFR . 225


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PDF 78K0R 78K0S U18010JJ2V0UM002 U18010JJ2V0UM diode SFR-136 SFR 136 213-DMM STK 415 90 7 segment E10501 stk 282 RA78K0R CC78K0S CC78K0R CC78K0
1998 - common collector amplifier circuit designing

Abstract: A-8802
Text: typ max 2.40 Unit Output voltage IOR = 1 mA 2.50 2.60 Vline VCC = 3.6 to 18 , IOR = 0.1 to 1 mA 1 7.5 mV Output voltage temperature variation ±0.2 V % Short circuit output current IOSC High level threshold voltage VtH IOR = 0.1 mA 2.70 V Low input malfunction Low level threshold prevention block voltage VtL IOR = 0.1 mA 2.58 V Vref = 0 V 3 10 30 mA Vhys IOR = 0.1 mA 80 120 mV Reset


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PDF EN3660B LA5677M LA5677M 035A-MFP16 LA5677M] MFP16 common collector amplifier circuit designing A-8802
2008 - 2SA1470

Abstract: 3035B LA5677M A-8802
Text: voltage block Output voltage Vref IOR = 1mA Line regulation Vline VCC = 3.6 to 18V Load regulation Vload 2.40 IOR = 0.1 to 1mA 2.50 2.60 2 10 mV 1 7.5 mV ±0.2 , 10 30 mA Low input malfunction prevention block High level threshold voltage VtH IOR = 0.1mA 2.70 V Low level threshold Voltage VtL IOR = 0.1mA 2.58 V Hysteresis Vhys IOR = 0.1mA 80 120 mV Reset voltage Vr IOR = 0.1mA 1.5 1.9 V 1.02


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PDF EN3660C LA5677M LA5677M 500kHz) 2SA1470 3035B A-8802
2008 - Not Available

Abstract: No abstract text available
Text: max Reference voltage block Output voltage Vref IOR = 1mA Line regulation Vline VCC = 3.6 to 18V Load regulation Vload 2.40 IOR = 0.1 to 1mA 2.50 2.60 2 10 , High level threshold voltage VtH IOR = 0.1mA 2.70 V Low level threshold Voltage VtL IOR = 0.1mA 2.58 V Hysteresis Vhys IOR = 0.1mA 80 120 mV Reset voltage Vr IOR = 0.1mA 1.5 1.9 V 1.02 1.16 Protection circuit block Input threshold


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PDF EN3660C LA5677M LA5677M 500kHz)
Not Available

Abstract: No abstract text available
Text: PORT WITH 83 BYTE FIFO DESCRIPTION N.C. ACK* BUSY* SLCT ERROR VCC IOR * IOW , Plastic-DIP Package ERROR VCC 39 IOR * 3 38 IOW* ACK* · 83 bytes of printer output , IOR * IOW* RESET Data bus & Control Logic BLOCK DIAGRAM 4-4 PD0-PD7 STROBE* INIT , data bus to the addressed register. IOR * 39 43 I Read strobe (active low). A low level , ST78C34 PRINTER PORT PROGRAMMING TABLE: A1 A0 0 0 1 1 0 1 0 1 IOW* IOR * PORT


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PDF ST78C34 ST78C34 16553-PW-2 16553-PW-3
transistor c424

Abstract: diode c424 transistor c423 transistor c421 c423 diode diodes LE c424
Text: 1.6 ±500 nA Conditions IÖR Vqe = ov, lc = 250|jA Vqe = 0V, lc = 1-0mA lc = 7.0A Vqe = 15V lc = 13A , shot, C-418 IOR CPV363MM C o o 1 _ L _ 3 O CL Q. o $ D TJ C O 3 o , Temperature C- 421 CPV363MM I«R 0 3 6 9 12 15 lc , Collector-to-Emitter Current , Voltage Drop vs. Instantaneous Forward Current C-422 IOR CPV363MM < 0 c cr tr d if/d t , . dif/dt Fig. 17 - Typical d i ( reC) M / d t vs. d if/d t C-423 CPV363MM IOR


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PDF 10kHz) CPV363MM 360Vdc C-423 C-424 transistor c424 diode c424 transistor c423 transistor c421 c423 diode diodes LE c424
2007 - STK 403 100 pin details

Abstract: stk 795 811 STK 419 - 130 stk 795 814 STK 412 770 STK 403 100 stk 795 518 stk 412 -770 stk O-86 7 segment E10501
Text: +.30 4.2.1 , .51 5.8.2 IOR /SFR , ] .205 [ IOR /SFR] .207 [ IOR /SFR Select


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PDF U18601CA1V0UM STK 403 100 pin details stk 795 811 STK 419 - 130 stk 795 814 STK 412 770 STK 403 100 stk 795 518 stk 412 -770 stk O-86 7 segment E10501
NJU7276

Abstract: NJU7276F NJU7276F0555A2 NJU7276F1 NJU7276F1502A2 NJU7276F3342A2
Text: =25°C) VOR VOR VIN VCONT VOR IOR PD Topr Tstg +11 +11 GND -0.3 , IO=60mA V VDET VHYS VOR IOR ILEAK VDET/Ta (*3) td VOPL , 0.1µF VIN 0.1µF NJU7276 (Ceramic) IOR /ILEAK CONTROL VOR A VDS/VOR GND Ver , NJU7276_4.2V Release Voltage vs. Temperature 4.31 VIN=VDET=H L VIN=VDET=H 4.21 H 4.3


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PDF NJU7276 NJU7276C-MOS 100mA OT-23-5 NJU7276F1 50ms/100ms/200ms NJU7276F NJU7276 NJU7276F NJU7276F0555A2 NJU7276F1 NJU7276F1502A2 NJU7276F3342A2
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