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LC895125W

Abstract: 5241a bsy85 ILC05205 LC895125Q QIP128E DB3.7-2
Text: () 370-0596 11 91306 SY IM / N0295 HK No.5241-1/ 12 LC895125Q, 895125W / Ta= - 30 70, VSS , =16.9344MHz, XTALCK1=20MHz R1=3.3k R2= C1=5pF XTALCK0=33.8688MHz, 33.8688MHz3 ILC05205 No.5241-2/ 12 , 1.6max (1.4) (1.25) SANYO : SQFP144 (20X20) No.5241-3/ 12 LC895125Q, 895125W LC895125 , , ZLWE IO8IO15 and RA9RA16 are same pins. ILC05206 No.5241-4/ 12 LC895125Q, 895125W LC895125 I O No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24


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PDF LC895125Q, 95125W LC895125W 467MB 32Mbit 20MHz 9344MHz 16bit) LC895125 LC895125W 5241a bsy85 ILC05205 LC895125Q QIP128E DB3.7-2
Not Available

Abstract: No abstract text available
Text: W3/IO3 I/O 12 59 W12/IO12 W5/IO5 I/O W4/IO4 I/O W3/IO3 I/O W2/IO2 I/O , 15 12 10 7 5 67 65 62 60 57 55 49 47 24 22 16 14 11 9 6 4 41 UPD482445G5 , 40 - 37 34 - 30 0 16 COLUMN 511 DECODER SENSE AMP RANDOM I/O BUFFER 5, 7, 10, 12


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PDF UPD482445G5-60 IL08D SIO15 W15/IO15 SIO14 W14/IO14 W13/IO13 W12/IO12
2013 - Not Available

Abstract: No abstract text available
Text: -15 IO15-14 IO15-12 IO15-11 IO15-10 IO15-8 IO15-3 IO15-2 XC95288XL IO13-17 IO13-15 IO13 , ) (8) (1) (9) (10) (11) ( 12 ) (19) (18) (17) (16) (15) (14) (13) Figure 2 , pin header) (11) P-TVDD Jumper JP5(3 pin header) ( 12 ) 光コネクタ PORT1,PORT2 (13 , ®å€¤ã‚’読み出して、Register欄に表示します。 2013/08 - 12 - [AKD7736B-A] (2) 「DownLoad」タブ画面 Figure 8 , ] SEL9 SDIN4 D[ 12 :11] SEL8 CAD[1:0] D[10] SEL7 TRX-PDN D[9] SEL6 TX-CLK D[8


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PDF AKD7736B-A] AKD7736B-A AK7736Bè AKD7736B-Aã AK7736Bã AKD77XX-HF-CONTROL-BOX 288MHz
1997 - UPD482445

Abstract: upd482444 UPD482445G5-60 upd482445g5 UPD482445GW-70 UPD482445GW uPD482444GW-70
Text: 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 , VCC SIO6 W6/IO6 SIO7 W7/IO7 GND LWE UWE RAS A8 A7 A6 A5 A4 VCC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 , . 12 2.1.1 Extended Read Data Output (µPD482445, 482445L) . 12 2.2 Random Write Cycle (Early Write, Late Write , part: Extended data 12 µPD482444, 482445 2.2 Random Write Cycle (Early Write, Late Write) There


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PDF PD482444, 256K-WORD 16-BIT PD482444 PD482445 UPD482445 upd482444 UPD482445G5-60 upd482445g5 UPD482445GW-70 UPD482445GW uPD482444GW-70
Not Available

Abstract: No abstract text available
Text: UPD482445LGW (1/3) IL22 C-MOS 4M-BIT DUAL PORT GRAPHICS BUFFER —TOP VIEW— 1 VDD DT/OE IN 2 3 GND SIO0 I/O 4 W0/IO0 I/O 5 SIO1 I/O 6 W1/IO1 I/O 7 8 VDD SIO2 I/O 9 W2/IO2 I/O 10 SIO3 I/O 11 W3/IO3 I/O 12 13 GND SIO4 I/O 14 W4/IO4 I/O 15 SIO5 I/O 16 W5/IO5 I/O 17 18 VDD SIO6 I/O 19 W6/IO6 I/O 20 SIO7 I/O 21 W7/IO7 I/O 22 23 GND LWE IN 24 64 SC IN 63 SE IN , 511 16 RANDOM INPUT/ OUTPUT BUFFER 5, 7, 10, 12 , 15 17, 20, 22, 43 45, 48, 50, 53 55


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PDF UPD482445LGW SIO15 W15/IO15 SIO14 W14/IO14 SIO13 W13/IO13 SIO12 W12/IO12 SIO11
1998 - LC895125Q

Abstract: LC895125W QIP128E RA16 SQFP144
Text: 12 RA13 (IO11) B 13 RA14 (IO10) B 14 RA15 (IO9) B 15 RA16 (IO8) B , VSS0 P 11 RA11 (IO13) B 12 RA12 (IO12) B 13 RA13 (IO11) B 14 RA14


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PDF LC895125Q, 95125W 3182-QIP128E LC895125Q] 80-ns 70-ns LC895125Q LC895125W QIP128E RA16 SQFP144
2009 - LC895125Q

Abstract: LC895125W QIP128E RA16 SQFP144
Text: 12 RA13 (IO11) B 13 RA14 (IO10) B 14 RA15 (IO9) B 15 RA16 (IO8) B , outputs for the buffer RAM or data I/O pins The pin circuits include pull-up resistors. B 12


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PDF LC895125Q, 95125W 3182-QIP128E LC895125Q] 80-ns 70-ns LC895125Q LC895125W QIP128E RA16 SQFP144
UPD482445GW60

Abstract: UPD482444GW-60 UPD482445GW-70 uPD482444 uPD482444GW-70 UPD482445 uPD482445GW-60 icc20 uPD482445L UPD482444GW60
Text: ) A0 to A8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 , . 12 2.1.1 Extended Read Data Output (µPD482445, 482445L) . 12 2.2 Random Write Cycle (Early Write, Late Write , the hyper page read cycle ( output). 12 part: Extended data µPD482444, 482445 2.2 Random


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PDF PD482444, 256K-WORD 16-BIT PD482444 PD482445 UPD482445GW60 UPD482444GW-60 UPD482445GW-70 uPD482444 uPD482444GW-70 UPD482445 uPD482445GW-60 icc20 uPD482445L UPD482444GW60
2009 - CY7C1061DV33-10BVXI

Abstract: CY7C1061DV33-10ZSXI CY7C1061DV33
Text: A6 A7 A8 A9 INPUT BUFFER IO0 ­ IO7 IO8 ­ IO15 A10 A11 A 12 A 13 A 14 A15 A16 A17 , A17 A16 A15 IO0 VCC IO1 IO2 VSS IO3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 , Page 2 of 12 [+] Feedback CY7C1061DV33 Maximum Ratings Exceeding maximum ratings may impair , VCC + 2V for pulse durations of less than 20 ns. Document Number: 38-05476 Rev. *E Page 3 of 12 , : 38-05476 Rev. *E Page 4 of 12 [+] Feedback CY7C1061DV33 AC Switching Characteristics Over the


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PDF CY7C1061DV33 CY7C1061DV33 CY7C1061DV33-10BVXI CY7C1061DV33-10ZSXI
TMP68301AFR-16

Abstract: No abstract text available
Text: TMP68301AFR-16 (1/4) IL08 * C-MOS 16-BIT MICRO COMPUTER GND GND GND VDD (+5V) VDD (+5V) GND VDD (+5V) GND GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 VDD (+5V) 75 74 73 72 71 70 69 68 67 66 65 , ) (VDD = +5V) PIN NO. I/O SIGNAL 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18


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PDF TMP68301AFR-16 16-BIT 16BIT TMP68301AFR-16
1998 - 52408

Abstract: SQFP144
Text: RAM upper write enable 11 ZLWE O Buffer RAM lower write enable 12 VSS0 P 13


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PDF LC895124 LC895124 LC89512 10-MB/s 80-ns 3214-SQFP1: 52408 SQFP144
2004 - CON40A

Abstract: OSC-SMT datasheet LM1117 IO33 IO85 lm1117-3.3 470R 93C56 FT2232C IRLML6402
Text: 40 39 38 37 36 35 33 32 10 15 13 12 11 24 23 22 21 20 19 17 16 VCCD , CLK50M R8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 , 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 , 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33


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PDF 100nF 93C56 CON40A MORPH001 CON40A OSC-SMT datasheet LM1117 IO33 IO85 lm1117-3.3 470R 93C56 FT2232C IRLML6402
2013 - XILINX/2114 CRAM

Abstract: No abstract text available
Text: -15 IO15-14 IO15-12 IO15-11 IO15-10 IO15-8 IO15-3 IO15-2 XC95288XL IO13-17 IO13-15 IO13 , ) ( 12 ) (19) (18) (17) (16) (15) (14) (13) Figure 2. AKD7736B-A Board Diagram , JP5 (3-pin header) ( 12 ) Optical Connector PORT1, PORT2 (13) AK4118A U1 7 DIP Switches , - 12 - [AKD7736B-A] (2) Download Figure 6. [Download] Dialogue Click each [refer] button , ] SEL9 SDIN4 D[ 12 :11] SEL8 CAD[1:0] D[10] SEL7 TRX-PDN D[9] SEL6 TX-CLK D[8


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PDF AKD7736B-A] AKD7736B-A AK7736B AKD7736B-A AK77XX-HF-CONTROL-BOX, AK7736B 288MHz XILINX/2114 CRAM
2009 - CY7C10612DV33-10ZSXI

Abstract: No abstract text available
Text: DECODER INPUT BUFFER IO0 ­ IO7 IO8 ­ IO15 A10 A11 A 12 A 13 A 14 A15 A16 A17 A18 A19 , 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 45 44 , CE Switching Waveforms Figure 3. Read Cycle No. 1 [ 12 , 13] tRC RC ADDRESS tOHA DATA OUT , VDR to VCC(min.) > 50 s or stable at VCC(min.) > 50 s. 12 . The device is continuously selected. OE


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PDF CY7C10612DV33 16-Mbit CY7C10612DV33 CY7C10612DV33-10ZSXI
2007 - CY7C1020B

Abstract: CY7C1020D
Text: A4 A14 A13 A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 , Byte Enable to Low Z Byte Disable to High Z tHZBE Write Cycle 0 ns 5 ns [11, 12 , timing should be referenced to the leading edge of the signal that terminates the write. 12 . The minimum , No. 3 (WE Controlled, OE LOW) [ 12 , 18] tWC ADDRESS tSCE CE tAW tHA tSA tPWE WE , , ­ 12 and ­15 ns *D 560995 See ECN VKN Converted from Preliminary to Final Removed


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PDF CY7C1020D CY7C1020B CY7C1020D 83MHz, 66MHz 40MHz 100MHz, 66MHz, CY7C1020B
2007 - CY7C1061DV33

Abstract: CY7C1061DV33-10BVXI CY7C1061DV33-10ZSXI
Text: DECODER INPUT BUFFER IO0 ­ IO7 IO8 ­ IO15 A10 A11 A 12 A 13 A 14 A 15 A 16 A 17 A18 A19 , 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 45 44 IO11 VSS IO10 IO9 , 3.0V tR tCDR CE Switching Waveforms Figure 3. Read Cycle No. 1 [ 12 , 13] tRC RC ADDRESS , VCC ramp from VDR to VCC(min.) > 50 µs or stable at VCC(min.) > 50 µs. 12 . The device is continuously , Title Removed ­8 and ­ 12 speed bins from product offering Removed Commercial Operating Range Changed


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PDF CY7C1061DV33 16-Mbit CY7C1061DV33 CY7C1061DV33-10BVXI CY7C1061DV33-10ZSXI
2008 - AN1064

Abstract: CY7C1011BV33 CY7C1011CV33
Text: A12 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 , 5 NC 4 IO3 17 IO 2 16 IO 13 IO 12 A4 31 30 A3 3 14 IO 1 15 2 A1 IO 0 IO 14 A2 IO 15 32 13 33 12 1 CE Note 1. NC pins , CY7C1011CV33 Selection Guide Description -10 Maximum Access Time - 12 -15 Unit 15 ns , . *F 12 90 Auto-A Maximum CMOS Standby Current 10 Comm'l Ind'l Maximum Operating


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PDF CY7C1011CV33 CY7C1011CV33 CY7C1011BV33 44-application AN1064 CY7C1011BV33
2007 - CY7C1020B

Abstract: CY7C1020D
Text: NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 , 0 ns 5 ns [11, 12 ] tWC Write Cycle Time 10 ns tSCE CE LOW to Write End , terminates the write. 12 . The minimum write cycle time for Write Cycle No. 3 (WE controlled, OE LOW) is the , . 3 (WE Controlled, OE LOW) [ 12 , 18] tWC ADDRESS tSCE CE tAW tHA tSA tPWE WE tBW , ' *C 307594 See ECN RKF Reduced Speed bins to ­10, ­ 12 and ­15 ns *D 560995 See


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PDF CY7C1020D CY7C1020B CY7C1020D 83MHz, 66MHz 40MHz 100MHz, 66MHz, CY7C1020B
2007 - Not Available

Abstract: No abstract text available
Text: A4 A5 A6 A7 A8 A9 ROW DECODER INPUT BUFFER IO0 – IO7 IO8 – IO15 A10 A11 A 12 , IO0 VCC IO1 IO2 VSS IO3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 , VCC 3.0V VDR > 2V 3.0V tR tCDR CE Switching Waveforms Figure 3. Read Cycle No. 1 [ 12 , 12 . The device is continuously selected. OE, CE1 = VIL, BHE, BLE or both = VIL, and CE2 = VIH. 13 , typo in the Document Title Removed –8 and – 12 speed bins from product offering Removed Commercial


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PDF CY7C1061DV33 16-Mbit CY7C1061DV33
2008 - cy7c1041cv33-12vxc

Abstract: AN1064 CY7C1041BV33 CY7C1041CV33 CY7C1041CV33-12ZI CY7C1041CV33-20ZE
Text: , Industrial and Automotive-A) tAA = 12 ns (Automotive-E) To read from the device, take Chip Enable (CE , Description -10 Maximum Access Time - 12 -15 -20 Unit 10 12 15 20 ns , 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 , 12 , 34 D1, E6 Ground Ground for the Device. Connected to ground of the system. VCC 11 , Min - 12 Max 2.4 Output LOW Voltage VCC = Min, IOL = 8.0 mA VIH -10 Output Leakage


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PDF CY7C1041CV33 CY7C1041CV33 CY7C1041BV33 cy7c1041cv33-12vxc AN1064 CY7C1041BV33 CY7C1041CV33-12ZI CY7C1041CV33-20ZE
VHDCI 68 pin Connector

Abstract: VHDCI 26
Text: 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 , 4 5 6 7 8 9 10 11 12 13 14 15 16 VCC GND IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8 , 12 13 14 15 16 VU GND IO15 IO16 IO17 IO18 IO19 IO20 IO21 IO22 IO23 IO24 IO25 IO26


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PDF IO35GND IO36IO37GND IO38IO39GND IO40SHIELD VHDCI 68 pin Connector VHDCI 26
2008 - Not Available

Abstract: No abstract text available
Text: 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 , 12 A VCC= 1.5V, CE > VCC ­ 0.2V, VIN > VCC ­ 0.2V or VIN < 0.2V Ind'l/Auto-A Auto-E 0 tRC , Characteristics Over the Operating Range [ 12 , 13] 45 ns (Ind'l/Auto-A) Parameter Read Cycle tRC tAA tOHA tACE , ] BLE/BHE HIGH to HIGH Z[14, 15] WE HIGH to Low-Z[14] Notes 12 . Test conditions for all parameters , ® Package Diagrams Figure 12 . 48-Ball VFBGA (6 x 8 x 1 mm), 51-85150 TOP VIEW BOTTOM VIEW A1 CORNER Ø0


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PDF CY62147EV30, CY62147DV30 48-ball 44-pin
2008 - CY7C1011CV33

Abstract: CY7C1011BV33 AN1064
Text: A13 A12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 , 5 NC 4 IO3 17 IO 2 16 IO 13 IO 12 A4 31 30 A3 3 14 IO 1 15 2 A1 IO 0 IO 14 A2 IO 15 32 13 33 12 1 CE Note 1. NC pins , CY7C1011CV33 Selection Guide Description -10 Maximum Access Time - 12 Unit Document Number: 38-05232 Rev. *G 12 ns 100 95 mA 100 Industrial 10 Automotive-A Maximum CMOS


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PDF CY7C1011CV33 CY7C1011BV33 CY7C1011CV33 44-pin CY7C1011BV33 AN1064
2010 - CY7C1042

Abstract: AN1064 CY7C1041BV33 CY7C1041CV33 CY7C1042CV33 48 pins max 3815
Text: , Industrial and Automotive-A) tAA = 12 ns (Automotive-E) To read from the device, take Chip Enable (CE , Description -10 Maximum Access Time - 12 -15 -20 Unit 10 12 15 20 ns , 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 43 42 41 40 39 38 37 36 , 12 , 34 D1, E6 Ground Ground for the Device. Connected to ground of the system. VCC 11 , Input Leakage Current Min - 12 Max 2.4 Output LOW Voltage VCC = Min, IOL = 8.0 mA VIH


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PDF CY7C1041CV33 CY7C1041CV33 CY7C1041BV33 CY7C1042 AN1064 CY7C1041BV33 CY7C1042CV33 48 pins max 3815
2007 - CY62157EV30 MoBL

Abstract: CY62157EV30LL-45ZSXI CY62157 AN1064 CY62157DV30 CY62157EV30 CY62157EV30LL DSA0025657
Text: A16 A15 A14 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 44 , BHE BLE A18 A17 A7 A6 A5 A4 A3 A2 A1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 , < 0.2V Ind'l/Auto-A V 2 5 µA 0 ns tRC ns Data Retention Waveform[ 12 ] Figure , (min) > 100 µs or stable at VCC(min) > 100 µs. 12 . BHE.BLE is the AND of both BHE and BLE. Deselect , (continued) Figure 10. 44-Pin TSOP II, 51-85087 51-85087-*A Document #: 38-05445 Rev. *E Page 12 of


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PDF CY62157EV30 CY62157DV30 48-ball 44-pin 48-pin CY62157EV30 MoBL CY62157EV30LL-45ZSXI CY62157 AN1064 CY62157DV30 CY62157EV30LL DSA0025657
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