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Part Manufacturer Description Datasheet Download Buy Part
LTC1090CSW Linear Technology LTC1090 - Single Chip 10-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C
LTC1293DCSW Linear Technology LTC1293 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 16; Temperature Range: 0°C to 70°C
LTC1289CCSW#TRPBF Linear Technology LTC1289 - 3 Volt Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C
LTC1293BCSW#TRPBF Linear Technology LTC1293 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 16; Temperature Range: 0°C to 70°C
LTC1296BISW#PBF Linear Technology LTC1296 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: -40°C to 85°C
LTC1296DCSW#TRPBF Linear Technology LTC1296 - Single Chip 12-Bit Data Acquisition System; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C

IC sequential DATA BASE Datasheets Context Search

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1998 - pin DIAGRAM OF IC 7474

Abstract: INTERNAL DIAGRAM OF IC 7474 7474 shift register 7474 for shift register ic 7474 pin diagram IC 7474 pin details pin diagram of 7474 arm microprocessor data sheet str w 6252 7474 ic datasheet
Text: . CLK IC The 3.57/3.68 MHZ crystal oscillator input clock for the core PLL. This is the base , Description IC Data bus enable. When this input is low, the data bus, D[31:0], is put into a high , the PLL clock; when low, the internal PLL output is used. TDI IC Test interface data input , updated. If the instruction would normally have overwritten the base with data (for example, an LDM , .1-3 1.4.5 Data Cache


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PDF SA-110 pin DIAGRAM OF IC 7474 INTERNAL DIAGRAM OF IC 7474 7474 shift register 7474 for shift register ic 7474 pin diagram IC 7474 pin details pin diagram of 7474 arm microprocessor data sheet str w 6252 7474 ic datasheet
1996 - EC-QV44A-TE

Abstract: CP15 str 6252 SA-110 architecture DBE103 21281DA
Text: while MCLK is low. DBE IC Data bus enable. When this input is low, the data bus, D[31:0] is put , contain data to be accessed. The MAS signals follow address bus timing. MCCFG[2:0] IC Memory , MCLK to achieve similar effects. MSE IC Memory request/ sequential enable. When this input is , PLL output is used. TDI IC Test interface data input. Note this pin does NOT have an internal , would normally have overwritten the base with data (for example, a LDM instruction with the base in the


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PDF SA-110 SA-110 EC-QV44A-TE) QV44A EC-QV44A-TE CP15 str 6252 SA-110 architecture DBE103 21281DA
Not Available

Abstract: No abstract text available
Text: IC Data bus enable. W hen this input is low, the data bus, D[31:0] is put into a high impedance , -bit data bus contain data to be accessed. The M AS signals follow address bus timing. MCCFG[2:0] IC , place of the PLL clock, when low the internal PLL output is used. TDI IC Test interface data , data (for example, a LDM instruction with the base in the transfer list), the original value in the base register is restored. W hen either a prefetch or data abort occurs, the SA-110 performs the


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PDF SA-110 SA-110) 32-bit
2000 - 21281EB

Abstract: FA21281FB crystal oscillator 3.57MHz MRC 1435 21281-EB 21281AB 21281db str 6252 21281CB fa21281
Text: . CLK IC The 3.57/3.68 MHZ crystal oscillator input clock for the core PLL. This is the base , Description IC Data bus enable. When this input is low, the data bus, D[31:0], is put into a high , the PLL clock; when low, the internal PLL output is used. TDI IC Test interface data input , updated. If the instruction would normally have overwritten the base with data (for example, an LDM , .1­4 1.4.5 Data Cache


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PDF SA-110 21281EB FA21281FB crystal oscillator 3.57MHz MRC 1435 21281-EB 21281AB 21281db str 6252 21281CB fa21281
2000 - MRC 1435

Abstract: STR 6252 equivalent 21281EB 21281AB FA21281FB 21281DB
Text: operations (when nRW is high), the output data will become valid while MCLK is low. ABE ABORT IC IC , updated. If the instruction would normally have overwritten the base with data (for example, an LDM , .1­4 1.4.5 Data Cache , .5­3 5.2.3 Register 2 ­ Translation Table Base .5­4 , Disabling the Icache. 6­2 Data Cache (Dcache


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PDF SA-110 MRC 1435 STR 6252 equivalent 21281EB 21281AB FA21281FB 21281DB
AP8942A

Abstract: AP89042 aP89XX circuit diagram of ic TDA2822 VOICE IC ap89042 16pin LM386 TDA2822 aP89042 16-pin AP89042 dip 16
Text: AP8942A 42" OTP VOICE IC VOICE SECTION COMBINATIONS Voice files created by the PC base developing system , AMBITION ELECTRONICS CO.,LTD AP8942A 42" OTP VOICE IC FEATURES Standard CMOS process. Embedded , available for voice block combinations. User selectable PCM or ADPCM data compress. Two triggering modes , ~ S8 to trigger up to 32 voice groups; SBT for sequential trigger. - CPU Parallel Trigger Mode ­ , @126.comszyadi@126.comWEBwww.cszyadi.com 1/20 AMBITION ELECTRONICS CO.,LTD AP8942A 42" OTP VOICE IC PIN CONFIGURATIONS 20PIN DIP


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PDF AP8942A 20-Pin 300mil AP89042 aP89XX circuit diagram of ic TDA2822 VOICE IC ap89042 16pin LM386 TDA2822 aP89042 16-pin AP89042 dip 16
1995 - Logitech mouse ic

Abstract: hulapoint logitech x 530 TC55RP5002ECB713 logitech mouse encoder PS/2 MOUSE ENCODER logitech logitech ps2 mouse LOGITECH ps2 ic IC sequential DATA BASE RS232 mouse diagram
Text: easy-to-use single-chip encoder that interfaces to an innovative sensor developed by Fujitsu. The IC and , two-button mice and Logitech three-button mice. The IC automatically detects the port type (serial or PS/2 , device operating at 4 MHz. The low power consumption of the IC makes it suitable for battery operated systems. In serial mode, like any standard serial mouse, the IC can draw power from the RS232 lines of , RIGHT BUTTON BUTTON BUTTON Data Buffer Switch Interface PS2CLK PS/2 Communication Port


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PDF RS232 10-degree DOC7-DMP-DS-109 Logitech mouse ic hulapoint logitech x 530 TC55RP5002ECB713 logitech mouse encoder PS/2 MOUSE ENCODER logitech logitech ps2 mouse LOGITECH ps2 ic IC sequential DATA BASE RS232 mouse diagram
1995 - Logitech mouse ic

Abstract: logitech mouse encoder 20 pin ic IC sequential DATA BASE Logitech PS2 mouse ic TC55RP5002ECB713 logitech mouse schematic IC 7416 PIN DIAGRAM logitech logitech mouse circuit diagram logitech 0011
Text: that interfaces to an innovative sensor developed by Fujitsu. The IC and sensor together make the , two-button mice and Logitech three-button mice. The IC automatically detects the port type (serial or PS/2 , . The HulaCoderTM is a CMOS device operating at 4 MHz. The low power consumption of the IC makes it suitable for battery operated systems. In serial mode, like any standard serial mouse, the IC can draw , and operate concurrently. FUNCTIONAL DIAGRAM LEFT MIDDLE RIGHT BUTTON BUTTON BUTTON Data Buffer


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PDF RS232 DOC7-DMP-DS-108 Logitech mouse ic logitech mouse encoder 20 pin ic IC sequential DATA BASE Logitech PS2 mouse ic TC55RP5002ECB713 logitech mouse schematic IC 7416 PIN DIAGRAM logitech logitech mouse circuit diagram logitech 0011
1995 - ARM710a

Abstract: MRC 453 MRC 452 710a mrc 438 ARM7 instruction set cycle timing summary CP15 ARM710 TFMS 4 pre fetch 1994
Text: extension, see ·11.10 Use of the ALE Pin on page 11-14. DIN[31:0] IC Input data bus. During read , nENDOUT is HIGH. DBE IC Data bus enable. When this input is LOW, the nENDOUT output is forced , instruction would normally have overwritten the base with data (i.e. LDM with the base in the transfer list , Preliminary Data Sheet Document Number: ARM DDI 0033D Issued: September 1995 Copyright Advanced , 1995 AW AP AP Created using ARM710a version C and ARM710C version C Data Sheets. First formal


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PDF 0033D ARM710a MRC 453 MRC 452 710a mrc 438 ARM7 instruction set cycle timing summary CP15 ARM710 TFMS 4 pre fetch 1994
8 pin ic base socket round pin type lead

Abstract: IC sequential DATA BASE
Text: data output is sequential , with the data from address(n) followed by the data from address(n+1). The , FUJITSU SEMICONDUCTOR DATA SHEET D S 0 5 -1 1 1 0 2 -2 E M Ê Ë tm Ë Ê Ê Ê Ê Ê Ê Ê M , I I I I I I Function Address Input Row Address Strobe Column Address Strobe Write Enable Data (DQ , Supply (+3.3 V) Ground (0 V) No Connection Serial PD Address Input Serial PD Clock Serial PD Address/ Data Input/Output I/O Data Input/ Data Output - - - RAS CAS WE DQMBo to DQMB7 CLKo, CLK 1 N.C


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PDF MB8502S064AC-100/-84/-67 168-pin, MB8502S064AC MB81117822A 168-pin F9703 8 pin ic base socket round pin type lead IC sequential DATA BASE
s5l840fx

Abstract: S5L840F calmRISC16 P9336 CalmRISC-16 and pin diagram of MMC 4017 S5H5002 player audio to flash memoy samsung i2s s5l8
Text: CPAD-WALTZ(S5L840F) Internet Audio Decoder for Flash Memory Media Data Sheet INTRODUCTION S5L840F is a single chip digital audio player IC supporting various compressed audio format on Flash , Serial Data In for IIS 87 LRCLK/P7.1 B Left-Right Clock for IIS 88 INTVSS4 P , Data Out for IIS 91 BCLK/P7.3 B Bit Clock for IIS 92 MCLK/P7.4 B Over-sampling , for Program Memory - 4M byte for Data Memory MCU Team LSI Division System LSI Business


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PDF S5L840F) S5L840F 76Kbytes 16bit CALMRISC16TM) 24bit MAC2424 CalmRISC16) s5l840fx calmRISC16 P9336 CalmRISC-16 and pin diagram of MMC 4017 S5H5002 player audio to flash memoy samsung i2s s5l8
clap switch applications

Abstract: IC sequential DATA BASE KEY16 Turkey in the straw clap switch SONG LONG W80 RESISTOR
Text: hold (for all keys) - R epeat (for all keys) - Sequential playing (only for KEY1) FLAG options: - Busy , Description The HT3894 is a single chip melody and voice synthesis IC im plem ented in th e CMOS tech nology. I t includes an on-chip voice and melody ROM for storing data , a key ROM of key ad dress pointers , prepared for fabrication except th e key option and ROM data . The custom er's key function, voice, and , - 4 K x 14 64x16 iL ROM Address Counter Voice ROM 64K x 5 Time Base Generator -4-ÒVD D + - 0 vss


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PDF HT3894 1024kHz KEY14 KEY15 KEY16 KEY10 KEY11 KEY12 KEY13 clap switch applications IC sequential DATA BASE KEY16 Turkey in the straw clap switch SONG LONG W80 RESISTOR
1996 - 5V piezo buzzer

Abstract: Voice Record Integrated Circuits low cost eeprom programmer circuit diagram EEPROM COPIER circuit IS22VP003 COB CHIP ON BOARD "Microphone Preamplifier" 8050c transistor 8050c IS22C011
Text: encoding. The encoded data is programmed into a IVR device by using our IVR writer. The sound is ready to , Voice ROM Conventional voice ROM utilizes mask ROM technology to store sound data . A semiconductor manufacturing photo mask corresponding to the sound data has to be made. With this mask, the sound data can be , sound ROMs. First, the IVR is based on OTP EPROM technology. Sound data is programmed into the memory , generate and program sound data using one of our user-friendly development systems within their own


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PDF VP81996INTRO IS22C011 5V piezo buzzer Voice Record Integrated Circuits low cost eeprom programmer circuit diagram EEPROM COPIER circuit IS22VP003 COB CHIP ON BOARD "Microphone Preamplifier" 8050c transistor 8050c
1999 - Not Available

Abstract: No abstract text available
Text: device to bus host Data Acknowledge READ Command STOP Condition NO Acknowledge Figure 8: Sequential , FS6477-02 Three-PLL VCXO Programmable Clock Generator IC 1.0 · · · · Features 2 ä 2.0 , . The FS6477 is a CMOS clock generator IC designed to minimize cost and component count in a variety of , CLK_F/S1 MODE FS6477 ISO9001 2.27.02 FS6477-02 Three-PLL VCXO Programmable Clock Generator IC , VSS XIN XOUT XTUNE CLK_F/S1 CLK_E/S0 MODE CLK_D VSS CLK_C CLK_B VDD CLK_A SCL Serial interface data


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PDF FS6477-02 /100ppm) FS6477
2003 - son-8 IC

Abstract: HN58X2432SI 063 8pin HN58X2432SFPI HN58X2432SNI HN58X2432STI HN58X2464SFPI HN58X2464SI HN58X2464STI
Text: : 10 Cycles (Page write mode) · Data retention: 10 Years Rev.1.00, Oct.27.2003, page 1 of 21 , TSSOP 8-pin: 3,000 IC /reel SOP 8-pin: 2,500 IC /reel SON 8-pin: 3,000 IC /reel · Temperature range , data input/output WP Write protect VCC Power supply VSS Ground Block Diagram , characteristics and data retention. 2. Vin (min): -3.0 V for pulse width 50 ns. 3. Should not exceed VCC + 1.0 , ns Data in setup time tSU.DAT 100 ns Input rise time tR 300


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PDF HN58X2432SI/HN58X2464SI REJ03C0135-0100Z ADE-203-1385 HN58X2432SI, HN58X2464SI 32-byte son-8 IC HN58X2432SI 063 8pin HN58X2432SFPI HN58X2432SNI HN58X2432STI HN58X2464SFPI HN58X2464STI
2003 - son-8 IC

Abstract: 063 8pin HN58X2464FPI HN58X2432FPI HN58X2416TI HN58X2416FPI HN58X2416 HN58X2408TI HN58X2408FPI TM 1628 IC SOP
Text: write mode) 5 · Data retention: 10 Years Rev.4.00, Oct.21.2003, page 1 of 21 HN58X2408I , Shipping tape and reel TSSOP 8-pin: 3,000 IC /reel SOP 8-pin: 2,500 IC /reel SON 8-pin: 3,000 IC /reel , Pin name Function A0 to A2 Device address SCL Serial clock input SDA Serial data , . Including electrical characteristics and data retention. 2. Vin (min): -3.0 V for pulse width 50 ns. 3 , Notes ns 1 Start setup time tSU.STA 600 ns Data in hold time tHD.DAT


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PDF HN58X2408I/HN58X2416I HN58X2432I/HN58X2464I REJ03C0131-0400Z ADE-203-1108C HN58X24xxI 32-byte son-8 IC 063 8pin HN58X2464FPI HN58X2432FPI HN58X2416TI HN58X2416FPI HN58X2416 HN58X2408TI HN58X2408FPI TM 1628 IC SOP
1999 - FS6477-02

Abstract: No abstract text available
Text: FS6477-02 AMERICAN MICROSYSTEMS, INC. Three-PLL VCXO Programmable Clock Generator IC , CMOS clock generator IC designed to minimize cost and component count in a variety of electronic , . Three-PLL VCXO Programmable Clock Generator IC Preliminary Information July 2000 Table 1: Pin , SDA Serial interface data input/output 2 P VDD Power supply (3.3V nominal) 3 P , -02 AMERICAN MICROSYSTEMS, INC. Three-PLL VCXO Programmable Clock Generator IC Preliminary Information


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PDF FS6477-02 FS6477 FS6477-02
2000 - FS6477-01

Abstract: AMI AMERICAN
Text: FS6477-01 Three-PLL VCXO Programmable Clock Generator IC AMERICAN MICROSYSTEMS, INC. Advance , generator IC designed to minimize cost and component count in a variety of electronic systems. It is , Programmable Clock Generator IC AMERICAN MICROSYSTEMS, INC. Advance Information April 2000 Table 1 , DI O SDA Serial interface data input/output 2 P VDD Power supply (3.3V nominal , -01 Three-PLL VCXO Programmable Clock Generator IC AMERICAN MICROSYSTEMS, INC. Advance Information


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PDF FS6477-01 /100ppm) FS6477 ISO9001 FS6477-01 AMI AMERICAN
2003 - son-8 IC

Abstract: 063 8pin HN58X2416SNI HN58X2416SFPIE HN58X2416SFPI HN58X2408STI HN58X2408SNI HN58X2408SFPIE HN58X2408SFPI ic TM 1628
Text: : 10 ms (2.7 V to 5.5 V)/15ms (1.8 V to 2.7 V) · Endurance: 10 Cycles (Page write mode) 5 · Data , TSSOP 8-pin: 3,000 IC /reel SOP 8-pin: 2,500 IC /reel SON 8-pin: 3,000 IC /reel · Temperature range , Function A0 to A2 Device address SCL Serial clock input SDA Serial data input/output , electrical characteristics and data retention. 2. Vin (min): -3.0 V for pulse width 50 ns. 3. Should not , ns Data in hold time tHD.DAT 0 ns Data in setup time tSU.DAT 100


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PDF HN58X2408SI/HN58X2416SI REJ03C0097-0100Z HN58X24xxSI 32-byte son-8 IC 063 8pin HN58X2416SNI HN58X2416SFPIE HN58X2416SFPI HN58X2408STI HN58X2408SNI HN58X2408SFPIE HN58X2408SFPI ic TM 1628
Not Available

Abstract: No abstract text available
Text: TTT ill DATA BUS ACTIVITY SPD 16 MB8502S072AG-100/-84/-67 SEQUENTIAL READ Sequential Read , sequence of address, acknowledge and data transfer. The data output is sequential , with the data from , data for each acknowledge received. Fig. 5 - SEQUENTIAL READ SLAVE ADDRESS BUS ACTIVITY : - 1 I , +2) I I I I I I I I I I I I I I I I DATA (n+x) 4. DC C H A R A C T E R IS T IC S Value , Function Address Input Row Address Strobe Column Address Strobe W rite Enable Data (DQ) Mask Clock Input


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PDF MB8502S072AG-100/-84/-67 168-pin, MB8502S072AG B81117822A 168-pin D-63303 F9802
2003 - icl7555

Abstract: ICL755 IC sequential DATA BASE icl75 D164X
Text: Feature Turns Display Off; Puts Chip in Low Power Mode · Sequential Entry or Random Entry of Data Into , be used as CS. Selects data entry MODE. High selects Sequential Access (SA) mode where first entry is , avoid inadvertent clearing of the Data Memory and Sequential Address Counter. DISPlay FULL will become , multiplexed into the address input of the Data Memory, except during WR operations (in Sequential Access mode , ® ICM7243 Data Sheet October 3, 2005 FN3162.2 8-Character, MicroprocessorCompatible, LED


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PDF ICM7243 FN3162 ICM7243 14-segment 16-segment 64-character icl7555 ICL755 IC sequential DATA BASE icl75 D164X
1996 - EEPROM COPIER circuit

Abstract: Voice Record Integrated Circuits IS22VP003 IS22C011 VP01 circuit diagram for buzzer circuits IS22VP006 chip die npn transistor
Text: . The encoded data is programmed into a IVR device by using our IVR writer. The sound is ready to be , ROM Conventional voice ROM utilizes mask ROM technology to store sound data . A semiconductor manufacturing photo mask corresponding to the sound data has to be made. With this mask, the sound data can be , drawbacks of sound ROMs. First, the IVR is based on OTP EPROM technology. Sound data is programmed into the , quickly generate and program sound data using one of our user-friendly development systems within their


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PDF VP81996INTRO IS22C011/020 EEPROM COPIER circuit Voice Record Integrated Circuits IS22VP003 IS22C011 VP01 circuit diagram for buzzer circuits IS22VP006 chip die npn transistor
2003 - ICL7555

Abstract: 80C35 16-SEGMENT ICM7243 ICM7243AIM44Z ICM7243AIPLZ TB347 IC sequential DATA BASE
Text: ; Puts Chip in Low Power Mode · Sequential Entry or Random Entry of Data Into Display · Single +5V , as CS. MODE 31 31 29 Selects data entry MODE. High selects Sequential Access (SA) mode , Memory) where incoming data will be placed is determined either from the Address pins or the Sequential , to avoid inadvertent clearing of the Data Memory and Sequential Address Counter. DISPlay FULL will , ICM7243 ® Data Sheet March 4, 2010 8-Character, Microprocessor-Compatible, LED Display


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PDF ICM7243 ICM7243 14-segment 16-segment 64-character FN3162 ICL7555 80C35 ICM7243AIM44Z ICM7243AIPLZ TB347 IC sequential DATA BASE
LD111CJ

Abstract: ld111 ld110 LD111 LD114CR BCD counter LD110/LD111
Text: BCD Output, Active High or Low Output Control, and 512 Output for Use in Sophisticated Data , counting storage and data multiplexing functions with the random logic necessary to control the quantized , the 3 1/2 digits of BCD data as well as underrange and polarity information. Ten push-pull output , and multiplexed BCD data . Four data output format options allow the user to tailor the BCD output to , S1 - S3in a2\ü !Esi » «a C O M P^ u /oQ M / ZQ SW ITCH S T A T E S A R E FO R A LO G IC " 0 " A T U


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PDF LD111 LD114 12/Second LD114 10240/F| LD111CJ ld111 ld110 LD114CR BCD counter LD110/LD111
2003 - common cathode 14-segment display driver

Abstract: 18 pin Dual alphanumeric, 16 segment display displays segmented Alphanumeric 14 SEGMENT DUAL icl7555 IC sequential DATA BASE ICM7243AIM44ZT 16-SEGMENT 16 SEGMENT DISPLAY 16 seg led 15 pin Dual alphanumeric, 16 segment display
Text: Turns Display Off; Puts Chip in Low Power Mode · Sequential Entry or Random Entry of Data Into Display , used, and WR can be used as CS. MODE 31 Selects data entry MODE. High selects Sequential , controlling both address and data , with timing controlled by WR. Sequential Access Mode - If the internal , force-clear the Sequential Address Counter to address 000 (CHARacter 1), and set all Data Memory contents to , Access to Sequential Access, A1/CLR should be high to avoid inadvertent clearing of the Data Memory and


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PDF ICM7243 ICM7243 14-segment 16-segment 64-character FN3162 common cathode 14-segment display driver 18 pin Dual alphanumeric, 16 segment display displays segmented Alphanumeric 14 SEGMENT DUAL icl7555 IC sequential DATA BASE ICM7243AIM44ZT 16 SEGMENT DISPLAY 16 seg led 15 pin Dual alphanumeric, 16 segment display
Supplyframe Tracking Pixel