| I74F112N |
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Philips Semiconductors
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Dual J-K negative edge-triggered flip-flop |
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| I74F112N |
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Unknown
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Historical semiconductor price guide (US$ - 1998). From our catalog scanning project. |
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| I74f112N |
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Signetics
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Dual JK Negative Edge Triggered Flip-Flop |
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| I74F112N,602 |
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NXP Semiconductors
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Dual J-K negative edge-triggered flip-flop - Description: Dual J-K Flip-Flop with Set and Reset; Negative-Edge Trigger ; Fmax: 100 MHz; Logic switching levels: TTL ; Number of pins: 16 ; Output drive capability: -1/+20 mA ; Propagation delay: 5 ns; Voltage: 4.5-5.5 V; Package: SOT38-4 (DIP16); Container: Tube (Signetics) |
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