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Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
DC1613A Linear Technology INTERFACE MOD FOR LTPOWERPLAY
LTC2452CDDB#TRPBF Linear Technology LTC2452 - Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
LTC2452CDDB#PBF Linear Technology LTC2452 - Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
LTC2452CDDB#TRMPBF Linear Technology LTC2452 - Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface; Package: DFN; Pins: 8; Temperature Range: 0°C to 70°C
LTC2452IDDB#TRPBF Linear Technology LTC2452 - Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C
LTC2452IDDB#TRMPBF Linear Technology LTC2452 - Ultra-Tiny, Differential, 16-Bit ΔΣ ADC with SPI Interface; Package: DFN; Pins: 8; Temperature Range: -40°C to 85°C

I2C-INTERFACE data flash Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
1998 - mb90548

Abstract: MB90613A 3055 LCD 16 X 2 mb90242 MB90623A MB90622A MB90611A updown counter MB90F562
Text: / Flash KB 64 128 3072 4096 530* MB90534 MB90F534 256 256 10240 10240 540


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PDF MC-16L MB90xxx 32KHz) MB90242 MB90246A mb90548 MB90613A 3055 LCD 16 X 2 mb90242 MB90623A MB90622A MB90611A updown counter MB90F562
2009 - MAX5417

Abstract: MAX5417LETA MAX5417META MAX5417NETA MAX5417PETA MAX5418 MAX5418LETA MAX5418META MAX5419
Text: . 010111A0 200 8 TDFN-EP* AMA Pin Configuration appears at end of data sheet , I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and , NONVOLATILE MEMORY Data Retention TA = +85°C 200,000 TA = +85°C Endurance 50 TA = +25°C , MIN Data Setup Time tSU-DAT Data Hold Time tHD-DAT TYP UNITS 0.9 0 MAX , I2C-Interface Clock Input 3 SDA I2C-Interface Data Input 4 A0 5 GND Address Input. Sets


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PDF 256-Tap, 35ppm/ 50k/100k/200k 500nA MAX5417 MAX5417LETA MAX5417META MAX5417NETA MAX5417PETA MAX5418 MAX5418LETA MAX5418META MAX5419
2004 - I2C-INTERFACE

Abstract: ALY TRANSISTOR
Text: Configuration appears at end of data sheet. , fast-mode I2CTM-compatible serial interface allows communication at data rates up to 400kbps, minimizing , NONVOLATILE MEMORY Data Retention TA = +85°C 200,000 TA = +85°C Endurance 50 TA = +25°C , MIN Data Setup Time tSU-DAT Data Hold Time tHD-DAT TYP 0 MAX 100 UNITS ns , I2C-Interface Clock Input 3 SDA I2C-Interface Data Input 4 A0 5 GND Address Input. Sets


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PDF 256-Tap, 35ppm/ 50k/100k/200k 500nA MAX5417/MAX5418/MAX5419 I2C-INTERFACE ALY TRANSISTOR
2004 - Not Available

Abstract: No abstract text available
Text: communication at data rates up to 400kbps, minimizing board space and reducing interconnection complexity in , . *Exposed pad. Ordering Information continued at end of data sheet. Functional Diagram Selector Guide , Selector Guide continued at end of data sheet. Pin Configuration appears at end of data sheet. H VDD , ) NONVOLATILE MEMORY Data Retention Endurance POWER SUPPLY Power-Supply Voltage VDD Standby Current , MIN Data Setup Time tSU-DAT Data Hold Time tHD-DAT TYP UNITS 0.9 0 MAX


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PDF 256-Tap, MAX5417/MAX5418/MAX5419 400kbps, MO229 T1033-1
2005 - Not Available

Abstract: No abstract text available
Text: fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing board , product-contact factory for availability. Pin Configurations appear at end of data sheet. 1 , DYNAMIC CHARACTERISTICS Crosstalk 3dB Bandwidth (Note 6) Total Harmonic Distortion Plus Noise Data , ) PARAMETER SCL High Time SCL Low Time Data Setup Time Data Hold Time SDA, SCL Rise Time SDA, SCL Fall Time , to the wiper position and the data stored in the EEPROM. Connect to VDD or leave unconnected to


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 400kbps,
2010 - MAX5417

Abstract: I2C-INTERFACE MAX5419 MAX5418META MAX5418LETA MAX5418 MAX5417PETA MAX5417NETA MAX5417META MAX5417LETA
Text: fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing , /RoHS-compliant package. *Exposed pad. Pin Configuration appears at end of data sheet , ) 100 MAX5418_ kHz 50 MAX5419_ 25 NONVOLATILE MEMORY Data Retention TA = +85°C , MIN tSU-DAT tHD-DAT 0.9 0 UNITS µs ns 100 Data Hold Time MAX 300 Data , 3 SDA I2C-Interface Data Input 4 A0 5 FUNCTION GND Address Input. Sets the


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PDF 256-Tap, 35ppm/ 50k/100k/200k 500nA MAX5417/MAX5418/MAX5419 MAX5417 I2C-INTERFACE MAX5419 MAX5418META MAX5418LETA MAX5418 MAX5417PETA MAX5417NETA MAX5417META MAX5417LETA
2010 - MAX5418

Abstract: preset variable resistor MAX5419 MAX5418META MAX5418LETA MAX5417PETA MAX5417NETA MAX5417META MAX5417LETA MAX5417
Text: end of data sheet. Maxim , serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing , MAX5419_ 50,000 NONVOLATILE MEMORY Data Retention Endurance Years Stores POWER SUPPLY , MIN Data Setup Time tSU-DAT Data Hold Time tHD-DAT TYP UNITS 0.9 0 MAX , I2C-Interface Clock Input 3 SDA I2C-Interface Data Input 4 A0 5 GND Address Input. Sets


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PDF 256-Tap, 35ppm/ 50k/100k/200k 500nA MAX5418 preset variable resistor MAX5419 MAX5418META MAX5418LETA MAX5417PETA MAX5417NETA MAX5417META MAX5417LETA MAX5417
2006 - abp 651

Abstract: MAX5479 MAX5478EUD MAX5478ETE MAX5478 MAX5477EUD MAX5477ETE MAX5477 dual transistor marking code d12 MAX5479ETE
Text: overwrites of the EEPROM. The fast-mode I2C-compatible serial interface allows communication at data rates , availability. Pin Configurations appear at end of data sheet , % Years NONVOLATILE MEMORY RELIABILITY Data Retention TA = +85°C 200,000 TA = +85°C , Data Setup Time tSU:DAT 100 Data Hold Time tHD:DAT 0 SDA, SCL Rise Time SDA, SCL , wiper position and the data stored in the EEPROM. Connect to VDD or leave unconnected to enable the


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 400kbps, MAX5477/MAX5478/MAX5479 abp 651 MAX5479 MAX5478EUD MAX5478ETE MAX5478 MAX5477EUD MAX5477ETE MAX5477 dual transistor marking code d12 MAX5479ETE
2004 - Not Available

Abstract: No abstract text available
Text: serial interface allows communication at data rates up to 400kbps, minimizing board space and reducing , product-contact factory for availability. *Exposed pad. Pin Configuration appears at end of data sheet. 1 , -3dB Bandwidth (Note 5) NONVOLATILE MEMORY Data Retention Endurance POWER SUPPLY Power-Supply Voltage , otherwise noted. Typical values are at VDD = +5V, TA = +25°C. See Figures 1 and 2.) (Note 7) PARAMETER Data Setup Time Data Hold Time SDA, SCL Rise Time SDA, SCL Fall Time Setup Time for STOP Condition Bus Free


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PDF 256-Tap, MAX5417/MAX5418/MAX5419 400kbps, MO229
2004 - abp 651

Abstract: Potentiometers single 40mm
Text: I2CTM-compatible serial interface allows communication at data rates up to 400kbps, minimizing board space and , Configurations appear at end of data sheet. , THD+N H_ = 1VRMS, f = 1kHz, L_ = GND, measure W_ NONVOLATILE MEMORY RELIABILITY Data Retention , MIN tSU-DAT tHD-DAT 0 UNITS 0.9 µs ns 100 Data Hold Time MAX 300 Data , wiper position and the data stored in the EEPROM. Connect to VDD or leave open to enable the write


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PDF 256-Tap, 400kbps, MAX5477/MAX5478/MAX5479 MAX5477) MAX5478) MAX5479) 35ppm/ MAX5477/MAX5478/MAX5479 abp 651 Potentiometers single 40mm
2006 - nec marking d9

Abstract: MAX5477 MAX5477ETE MAX5477EUD MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
Text: fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing , . Pin Configurations appear at end of data sheet , % Years NONVOLATILE MEMORY RELIABILITY Data Retention TA = +85°C 200,000 TA = +85°C , Data Setup Time tSU:DAT 100 Data Hold Time tHD:DAT 0 SDA, SCL Rise Time SDA, SCL , wiper position and the data stored in the EEPROM. Connect to VDD or leave unconnected to enable the


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 400kbps, MAX5477/MAX5478/MAX5479 nec marking d9 MAX5477 MAX5477ETE MAX5477EUD MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
2010 - Not Available

Abstract: No abstract text available
Text: interface allows communication at data rates up to 400kbps, minimizing board space and reducing , end of data sheet. Maxim , MAX5419_ Wiper -3dB Bandwidth (Note 5) 100 25 kHz NONVOLATILE MEMORY Data Retention TA = , MIN tSU-DAT tHD-DAT 0.9 0 UNITS µs ns 100 Data Hold Time MAX 300 Data , SDA I2C-Interface Data Input 4 A0 5 FUNCTION GND Address Input. Sets the A0 bit


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PDF 256-Tap, MAX5417/MAX5418/MAX5419 400kbps,
2011 - Not Available

Abstract: No abstract text available
Text: HB 256 POSITION DECODER LB Pin Configurations appear at end of data sheet. Ordering , fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing , TA = +85°C 50,000 NONVOLATILE MEMORY RELIABILITY Data Retention Endurance Stores POWER , 0.6 µs SCL High Time tHIGH 0.6 µs SCL Low Time tLOW 1.3 µs Data Setup Time t SU:DAT 100 ns Data Hold Time tHD:DAT 0 0.9 µs SDA, SCL Rise Time


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PDF 256-Tap, 70ppm/ 10ppm/ 400kbps 16-BIT
2011 - Not Available

Abstract: No abstract text available
Text: LB Pin Configurations appear at end of data sheet. Liquid-Crystal Display (LCD) Contrast , data rates up to 400kbps, minimizing board space and reducing interconnection complexity in many , TA = +25°C 200,000 TA = +85°C THD+N 50,000 NONVOLATILE MEMORY RELIABILITY Data , µs SCL High Time tHIGH 0.6 µs SCL Low Time tLOW 1.3 µs Data Setup Time t SU:DAT 100 ns Data Hold Time tHD:DAT 0 0.9 µs SDA, SCL Rise Time tR


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PDF 256-Tap, 70ppm/Â 10ppm/Â 400kbps MAX5477/MAX5478/MAX5479 MAX5477) MAX5478)
2006 - U14-1

Abstract: MAX5479ETE MAX5479EUD
Text: EEPROM. The fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps , appear at end of data sheet. Maxim , Bandwidth (Note 6) Total Harmonic Distortion Plus Noise Data Retention Endurance POWER SUPPLY Power-Supply , ) PARAMETER SCL High Time SCL Low Time Data Setup Time Data Hold Time SDA, SCL Rise Time SDA, SCL Fall Time , data stored in the EEPROM. Connect to VDD or leave unconnected to enable the write protection of the


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 70ppm/ 10ppm/ 400kbps MAX5477/MAX5478/MAX5479 U14-1 MAX5479ETE MAX5479EUD
2006 - MAX5477EUD

Abstract: MAX5477 MAX5477ETE MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
Text: overwrites of the EEPROM. The fast-mode I2C-compatible serial interface allows communication at data rates , availability. Pin Configurations appear at end of data sheet , % Years NONVOLATILE MEMORY RELIABILITY Data Retention TA = +85°C 200,000 TA = +85°C , Data Setup Time tSU:DAT 100 Data Hold Time tHD:DAT 0 SDA, SCL Rise Time SDA, SCL , wiper position and the data stored in the EEPROM. Connect to VDD or leave unconnected to enable the


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 400kbps, MAX5477/MAX5478/MAX5479 MAX5477EUD MAX5477 MAX5477ETE MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
2004 - MAX5477

Abstract: MAX5477ETE MAX5477EUD MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
Text: fast-mode I2C-compatible serial interface allows communication at data rates up to 400kbps, minimizing , Configurations appear at end of data sheet. , 50 Years TA = +25°C 200,000 TA = +85°C 50,000 NONVOLATILE MEMORY RELIABILITY Data , Data Setup Time tSU:DAT 100 ns Data Hold Time tHD:DAT 0 SDA, SCL Rise Time SDA , data stored in the EEPROM. Connect to VDD or leave open to enable the write protection of the EEPROM


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PDF 256-Tap, MAX5477/MAX5478/MAX5479 400kbps, MAX5477/MAX5478/MAX5479 MAX5477 MAX5477ETE MAX5477EUD MAX5478 MAX5478ETE MAX5478EUD MAX5479 MAX5479ETE
1997 - BPSK demodulator

Abstract: MC92302 dvb circuit diagram sampling phase detector SPD automatic phase selector circuit diagram MC92303BT MC92303 160QFP bpsk demodulator circuit demodulator qpsk
Text: MOTOROLA Current Information@www.mot.com/ADC SEMICONDUCTOR TECHNICAL DATA MC92303 , 160QFP Half Nyquist Filter 3 8/3 Bit Mapper 3 VCO Control I_soft Q_soft Data , converters with either offset binary or 2's complement output format. The A/D output data is fed into the , the matched filtering. Once processed, the filtered data samples are passed to the data estimator which produces 3 bits of I and Q soft decision data (device output) as well as I and Q error vectors


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PDF MC92303 MC92303 BPSK demodulator MC92302 dvb circuit diagram sampling phase detector SPD automatic phase selector circuit diagram MC92303BT 160QFP bpsk demodulator circuit demodulator qpsk
2012 - AMS 5915

Abstract: AMS 5812-0000-D
Text: time (10%.90% rise time) 0.5 Start up time (Power up to data ready) I2C-interface Input High , master-slave principle. Data transfer is always initialized by a master (such as a microcontroller, for example), which sends a data request to the sensor; the AMS 5915 sensor – which always operates as slave – then answers. The I2C-bus requires just two bus lines: a serial data line (SDA) and a serial , data valid Data Bit SDA SCL I2C Data transfer: S R A 8 9 P A 8 Data


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PDF AMS5915 AMS5915 AMS 5915 AMS 5812-0000-D
1997 - how to make satellite decoder circuit

Abstract: block diagram satellite transponder Viterbi Decoder satellite decoder circuit diagram dvb circuit diagram viterbi decoder soft bit 128QFP Transponder motorola 128-QFP MC92300CG
Text: MOTOROLA Current Information@www.mot.com/ADC SEMICONDUCTOR TECHNICAL DATA MC92300 , BITCLK, which provides the output data VO (output of the Viterbi). This clock is generated by the , input to the chip are 3 bit soft decision data VC0/1 from the QPSK demodulator together with the , achieved with the input FIFO. The data is read into the depuncturing logic with the internally generated , Synchronization is based on the observation that the product of the incoming data and a syndrom is zero if there


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PDF MC92300 50MBits/s how to make satellite decoder circuit block diagram satellite transponder Viterbi Decoder satellite decoder circuit diagram dvb circuit diagram viterbi decoder soft bit 128QFP Transponder motorola 128-QFP MC92300CG
PAL AM 16v8

Abstract: JP46 74ALS34 Hitachi TANTAL application PAL 16v8 V832 SH7750 SAA7111A HQFP208 SAA711
Text: VIC enable I2C-Bus slave address select GND (closed) VCC (open) JP57 I2C-Serial data line , 1 = 4Ah for write, 4Bh for read Description Serial data line from MCU I2C-Interface Serial data , information please look at the Hardware Manual of the Scarlet graphic controller, the Data Sheet of the Video Input Processor SAA7111A and the Data Sheet of the PALLV16V8. 13 4. Schematics and Drawings


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PDF SAA7111 FUJ22b PAL AM 16v8 JP46 74ALS34 Hitachi TANTAL application PAL 16v8 V832 SH7750 SAA7111A HQFP208 SAA711
2001 - PAL AM 16v8

Abstract: 9-JP32 FR30 HQFP208 SAA7111A SH7750 V832 IC 2V5 R100R0
Text: VIC enable I2C-Bus slave address select GND (closed) VCC (open) JP57 I2C-Serial data line , 1 = 4Ah for write, 4Bh for read Description Serial data line from MCU I2C-Interface Serial data , information please look at the Hardware Manual of the Scarlet graphic controller, the Data Sheet of the Video Input Processor SAA7111A and the Data Sheet of the PALLV16V8. 13 4. Schematics and Drawings


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PDF SAA7111 FUJ22b PAL AM 16v8 9-JP32 FR30 HQFP208 SAA7111A SH7750 V832 IC 2V5 R100R0
2002 - MB89135L

Abstract: MB89P637 MB89133A MB89131 MB89125A MB89123A MB89121 FR30 MB89P133A MB89XXX
Text: No file text available


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PDF 32-Bit MB89xxx MB89121 MB89123A MB89125A MB89131 MB89P131 MB89P985 MB89997 MB90Pxxx MB89135L MB89P637 MB89133A MB89131 MB89125A MB89123A MB89121 FR30 MB89P133A MB89XXX
1997 - dvb circuit diagram

Abstract: lte demodulator 16 qam demodulator MC92305 MC92305CD MC92307
Text: MOTOROLA Current Information @ www.mot.com/ADC SEMICONDUCTOR TECHNICAL DATA MC92305 , format. After synchronization with the MPEG framing structure the data stream is convolutionally de-interleaved. To obtain the maximum data throughput (i.e. minimum latency) under various channel SNR's the , the I and Q symbols from the received data stream. Fully internal digital clock recovery , random received data and no special training sequence is required. Single-bit (Sigma-Delta converted


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PDF MC92305 MC92305 42Mbits/sec 56Mbits/sec 25negligent dvb circuit diagram lte demodulator 16 qam demodulator MC92305CD MC92307
2000 - AT 89C51RD2 philips PLCC

Abstract: 89C51RD2 EEPROM RTC-8563 I2C-INTERFACE data flash PLCC-44 microcontroller 89c51rb2 pin diagram Digital Alarm Clock with calendar using microcontroller project 89C51Rx2 464E-2 24WC256
Text: /89C51RD2 featuring on-chip Flash memory. Its universal design enables its insertion in a wide range of , User's Manual or Data Sheet. The descriptions in this manual are based on the P89C51Rx2 controller , ) featuring on-chip Flash memory · PLCC socked controller enables easy emulator connectivity · Improved , be plugged like a "big chip" into target applications · 16 kByte to 64 kByte Flash on-chip1, enabling In-System Programming (ISP) and In-Application Programming (IAP) · No dedicated Flash


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PDF phyCORE-89C51Rx2 phyCORE-89C51RxD L-464e D-55135 AT 89C51RD2 philips PLCC 89C51RD2 EEPROM RTC-8563 I2C-INTERFACE data flash PLCC-44 microcontroller 89c51rb2 pin diagram Digital Alarm Clock with calendar using microcontroller project 89C51Rx2 464E-2 24WC256
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