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LEMO connectors
GMD.00.028.DN Connector accessories: strain relief; Series:00; 2.5÷2.8mm GMD.00.028.DN ECAD Model
Distributors Part Package Stock Lead Time Min Order Qty 1 10 100 1,000 10,000 Buy
Transfer Multisort Elektronik GMD.00.028.DN 36 200 $1.35 $1.22 $1.08 $0.95 $0.95 Buy Now
PEI Genesis GMD.00.028.DN 5 1 $1.46 $1.46 $1.46 $1.46 $1.46 Buy Now
element14 Asia-Pacific GMD.00.028.DN 323 1 $3.22 $2.93 $2.51 $2.27 $2.27 Buy Now
Farnell element14 GMD.00.028.DN 259 1 £1.28 £1.28 £0.8 £0.654 £0.654 Buy Now
Sager GMD.00.028.DN 0 1 $1.09 $1.06 $1 $1 $1 Buy Now

GMD.00.028.DN datasheet (2)

Part ECAD Model Manufacturer Description Type PDF
GMD.00.028.DN GMD.00.028.DN ECAD Model LEMO Coaxial Connectors (RF) - Accessories, Connectors, Interconnects, CONN STR REL FOR 00 SERIES CONN Original PDF
GMD.00.028.DN GMD.00.028.DN ECAD Model Others SLEEVE 3MM BLACK Original PDF

GMD.00.028.DN Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2008 - lemo

Abstract: LEMO 00 connectors DIN IEC 60093 NTCE24 NTME31 FFA.00.250.NTAC29 lemo CRIMP TOOL CHART NTCE44 RTA FFM 02 LEMO epb 00
Text: No file text available


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PDF P0109 lemo LEMO 00 connectors DIN IEC 60093 NTCE24 NTME31 FFA.00.250.NTAC29 lemo CRIMP TOOL CHART NTCE44 RTA FFM 02 LEMO epb 00
2014 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF P0509,
Not Available

Abstract: No abstract text available
Text: No file text available


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PDF P0509
74LCX16373A

Abstract: 74LCX16373T LCX16373 TSSOP48
Text: Propagation Delay Time Dn to Qn 2.7 1 1.5 8.0 ns 3.0 to 3.6 1.5 7.0 tPLH tPHL Propagation Delay Time LE , 1.5 8.2 ns 3.0 to 3.6 1.5 7.2 ts Setup Time, HIGh or LOW level Dn to LE 2.7 1 2.5 ns 3.0 to 3.6 2.5 th Hold Time, HIGh or LOW level Dn to LE 2.7 1 1.5 ns 3.0 to 3.6 1.5 tw LE Pulse , 1 : LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP AND HOLD TIMES (f=1MHz;50 , Dn nQn 2.7V GND V V oh OL SC11470 r=T SGS-THOMSON Vf HODei^ilLlie!n©HIDSS 7/9 This


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PDF 74LCX16373A 16-BIT 500mA LCX16373 SC11470 TSSOP48 74LCX16373A 74LCX16373T
74LCX16373

Abstract: 74LCX16373T LCX16373 TSSOP48 SC11470
Text: Delay Time Dn to Qn 2.7 1 1.5 5.9 ns 3.0 to 3.6 1.5 5.4 tPLH tPHL Propagation Delay Time LE to Qn , 3.0 to 3.6 1.5 6.0 ts Setup Time, HIGh or LOW level Dn to LE 2.7 1 2.5 ns 3.0 to 3.6 2.5 th Hold Time, HIGh or LOW level Dn to LE 2.7 1 1.5 ns 3.0 to 3.6 1.5 tw LE Pulse Width, HIGH or , 1 : LE TO Qn PROPAGATION DELAYS, LE MINIMUM PULSE WIDTH, Dn TO LE SETUP AND HOLD TIMES (f=1MHz;50 , Dn nQn 2.7V GND V V oh OL SC11470 r=T SGS-THOMSON Vf HODei^ilLlie!n©HIDSS 7/9 This


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PDF 74LCX16373 16-BIT 500mA LCX16373 SC11470 TSSOP48 74LCX16373 74LCX16373T SC11470
M66256FP

Abstract: No abstract text available
Text: -BIT LINE MEMORY (FIFO) Matters that needs attention when WCK stops WCK WE Dn n cycle tWCK tDS n , cycle n-1 is invalid. WCK Dn RCK Qn Cycle n Cycle n+1 Cycle n+2 I I I _ _ _I_ X m X Eü I X , cycle <1 >* and the start of writing side n cycle <2>* overlap each other. WCK Dn RCK Cycle n <1


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PDF M66256FP M66256FP
Not Available

Abstract: No abstract text available
Text: ) Matters that needs attention when WCK stops WCK n cycle tWCK WE tDS n+1 cycle tDH Dn Period tor , RCK in the cycle, so that 1-line delay can be made easily. Cycle 0 WCK RCK WRES RRES Dn Qn IRESS , reset at a cycle corresponding to delay length) WCK RCK WRES RRES Dn IRESS Cycle 0 IRESH IDS , Qn of cycle n becomes invalid. In the figure shown below, the read of cycle n-1 is invalid. WCK Dn , >* overlap each other. WCK Dn RCK Cycle n(1> rs-si p*-/y r^- Cycle 0 <2> t<5-:-Si Cn -1 )<1 >■X


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PDF M66252P/FP
74F373

Abstract: 74F374 N74F373D N74F373N N74F374D N74F374N igo7
Text: 74F373 74F373/74F374 INPUTS INTERNAL OUTPUTS OPERATING MODE DE E Dn REGISTER QO-Q7 L H L L L , L X NC Z Disable outputs H H Dn Dn Z NOTES: 3. H = High-voltage level 4. h = High state must be , 74F374 INPUTS INTERNAL REGISTER OUTPUTS OPERATING MODE ÜE CP Dn Q0-Q7 L T 1 L L Load and read register L t h H H L t X NC NC Hold H * X NC Z Disable outputs H Î Dn Dn Z NOTES: 1. H - , MIN MAX tpLH tPHl Propagation delay Dn to On 74F373 Waveform 3 3.0 2.0 5.3 3.7 7.0 5.0 3.0 2.0 8.0


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PDF 74F373/74F374 74F373 74F374 latch-74F373 register-74F374 500ns N74F373D N74F373N N74F374D N74F374N igo7
74LCX16374

Abstract: 74LCX16374T LCX16374 TSSOP48 sc1143 SC11450
Text: 2.7 2 1.5 6.2 ns 3.0 to 3.6 1.5 6.0 ts Setup Time, HIGh or LOW level Dn to CP 2.7 1 2.5 ns 3.0 to 3.6 2.5 th Hold Time, HIGh or LOW level Dn to CP 2.7 1 1.5 ns 3.0 to 3.6 1.5 tw CP , , SETUP AND HOLD TIMES (f=1 MHz; 50% duty cicle) 2.5ns n Dn nCK tp|_H ^ PHL 1 ,5V nQn 1 -5V 2.5ns


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PDF 74LCX16374 16-BIT 500mA LCX16374 SC11450 TSSOP48 74LCX16374 74LCX16374T sc1143 SC11450
jd11

Abstract: 20P2N-A
Text: €”0" Shift register I qq Di2 Dn Dio Ds D2 Di I I I I I I I I I I I I I I I Q12 On Qio- - 03 02 Qi Parallel output latch D12 Dn Dio- - D3 D2 Di I ! - ! I Oi2 Dn Dio- — 03 02 Qi Shift


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PDF M66006P/FP 12-BIT jd11 20P2N-A
54F373

Abstract: 54F374 54F573 54F574
Text: read register L i h H H L L X NC NC Hold H L X NC Z Disable outputs H H Dn Dn Z H = High voltage , L í X NC NC Hold H r Dn Dn Z Disable outputs H X X X Z H = High voltage level h = High voltage , , R|_ = 500n Min Typ Max Min Max tpLH Propagation delay Dn to Q„ ■F573 Waveform 2 3.0 1.2 , Pulse width, High or Low Waveform 1 4.0 4.0 4.0 4.0 ns ns UH) UL) Set-up time Dn to CP 'F574 Waveform 3 2.0 2.0 2.5 2.5 ns ns wh) th(L) Hold time Dn to CP Waveform 3 1.5 1.5 2.0 2.0 ns ns UH


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PDF 54F573 54F574 54F373 54F574 54F374 54F373 500ns 54F374
2000 - Not Available

Abstract: No abstract text available
Text: Technische Information / Technical Information Netz-Gleichrichterdiode Rectifier Diode 25 DN , DN 06 N Mechanische Eigenschaften / Mechanical properties Vorläufige Daten Preliminary data , Information / Technical Information Netz Gleichrichterdiode Rectifier Diode 25 DN 06 N 22 3,65 , / Technical Information Netz Gleichrichterdiode Rectifier DiodeThyristor 25 DN 06 N Kühlung , 0,001956 0, 00028 n [s] 0,021219 0,002481 0,000267 0,000009 anodenseitig


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PDF
2000 - Not Available

Abstract: No abstract text available
Text: Technische Information / Technical Information Netz-Gleichrichterdiode Rectifier Diode 25 DN , DN 06 N Mechanische Eigenschaften / Mechanical properties Vorläufige Daten Preliminary data , Information / Technical Information Netz Gleichrichterdiode Rectifier Diode 25 DN 06 N 22 3,65 , / Technical Information Netz Gleichrichterdiode Rectifier DiodeThyristor 25 DN 06 N Kühlung , 0,001956 0, 00028 n [s] 0,021219 0,002481 0,000267 0,000009 anodenseitig


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PDF A01/00
74LCX16821

Abstract: MTD56
Text: toSLH Output to Output Skew (Note 6) 1.0 1.0 ns ts Setup Time, Dn to CLK 2.5 2.5 3.0 ns tH Hold Time, Dn to CLK 1.5 1.5 2.0 ns tw CLK Pulse Width 3.3 3.3 3.8 ns Note 6: Skew is defined


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PDF 74LCX16821 20-Bit LCX16821 74LCX16821 MTD56
74HL33373D

Abstract: 74HL33373DB
Text: HIGH, data at the Dn inputs enter the latches. In this condition the latches are transparent, i.e. a , CONDITIONS TYPICAL UNIT VhlAplh propagation delay Dn to Q„; LE to Q„ CL = 50 pF Vcc = 3.3 V 3.0 3.0 ns , PARAMETER +25 -40 to +85 UNIT vcc WAVEFORMS MIN. MAX. MIN. MAX. (V) tpHl/tpLH propagation delay Dn , .7 t.u set-up time Dnto LE 2.0 0.8 0.5 - 2.2 0.9 0.6 - ns 1.2 2.0 3.0 Fig. 9 t„ hold time Dn to LE 2.0 , Octal D-type transparent latch; 3-state 74HL33373 AC WAVEFORMS dn input 90% "v 'phl—• vm(1) 10


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PDF 74HL33373 74HL33373 711002b 007SL1S 74HL33373D 74HL33373DB
GBA.2S.250.FN

Abstract: LEMO GMA.0B.045 bend relief LEMO FGG.1B.304 GMP.1B.062.079EN FFM.1B.130.LC EGG.3B.660.ZZM 2b419 FGG.2B.310 FGG.1B.314 GEA 114
Text: fitting the bend relief Part number GMA.00.012.DG GMA.00.018.DG GMB.00.025.DG GMB. 00.028 .DG GMB.00.032.DG GMD.00.025.DG GMD. 00.028 .DG GMD.00.032.DG GMA.0B.025.DG GMA.0B.030.DG GMA.0B.035.DG GMA.0B.040.DG GMA


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PDF M15x1 GBA.2S.250.FN LEMO GMA.0B.045 bend relief LEMO FGG.1B.304 GMP.1B.062.079EN FFM.1B.130.LC EGG.3B.660.ZZM 2b419 FGG.2B.310 FGG.1B.314 GEA 114
Not Available

Abstract: No abstract text available
Text: ’ ^ * 1 1 1 • Dim. 0a 1 2-3-4 8 5 6 7 FFS.00.160. DN FFS.00.161 .MN FFS.00.162. DN FFS.00.163. DN FFS.00.164. DN FFV.00.160. DN Cable group 3.1 3.8 4.4 5.3 6.2 6.3 Note , relief |_■_ . siaifrjC-Lc' ,| GMB.00.025.DG GMB. 00.028 .DG GMB.00.032. DG i Color Ref


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PDF RTE005 RTE010 RTE020 RTE030 RTE040 RTE050 RTE060 RTE080 RTE160 RTE200
HCT573

Abstract: HCT CMOS logic family specifications 74HC-HCT573 74HC 74HCT ISOT146 S020
Text: -state true outputs. When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches , TYPICAL UNIT HC HCT tPHL/ tPLH propagation delay Dn to Qn LE to Qn CL= 15pF VCC = 5 V 14 15 17 15 ns , . max. min. max. min. max. ^HL./ *PLH propagation delay Dn to Qn 47 17 14 150 30 26 190 38 33 225 , 120 24 20 ns 2.0 4.5 6.0 Fig. 7 'su set-up time Dn to LE 50 10 9 11 4 3 65 13 11 75 15 13 ns 2.0 4,5 6.0 Fig. 9 th hold time Dn to LE 5 5 5 3 1 1 5 5 5 5 5 5 ns 2.0 4.5 6.0 Fig. 9 ^ j^March 1988


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PDF 74HC/HCT573 HCT573 HCT CMOS logic family specifications 74HC-HCT573 74HC 74HCT ISOT146 S020
Not Available

Abstract: No abstract text available
Text: ' 3.1 3.8 4.4 5.3 6.2 6.3 FFS.00.160. DN FFS.00.161.MN FFS.00.162. DN FFS.00.163. DN FFS.00.164. DN FFV.00.160. DN Note: receptacles and plugs to be crimped are always supplied with a crimp ferrule , 2.8 2.5 3.1 I 2.8 3.5 i 3.2 r — GMB.00.025.DG GMB. 00.028 .DG GMB.00.032.DG n * m M A B


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PDF -RTEQ05 RTE010 RTE020 RTE030 U0250 RTE050 2SORrE160 RTE200 RTE320 RTE005
2000 - Not Available

Abstract: No abstract text available
Text: Technische Information / Technical Information Netz-Gleichrichterdiode Rectifier Diode 25 DN , DN 06 N Mechanische Eigenschaften / Mechanical properties Vorläufige Daten Preliminary data , Information / Technical Information Netz Gleichrichterdiode Rectifier Diode 25 DN 06 N 22 3,65 , / Technical Information Netz Gleichrichterdiode Rectifier DiodeThyristor 25 DN 06 N Kühlung , 0,001956 0, 00028 n [s] 0,021219 0,002481 0,000267 0,000009 anodenseitig


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PDF
lv373

Abstract: 74LV373 74LV373D 74LV373DB 74LV373N 74LV373PW
Text: , data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch , °C; t, = t, < 2.5 ns SYMBOL PARAMETER CONDITIONS TYPICAL UNIT ^phlAPIH propagation delay Dn to Qn , LE 17 13 10 25 9 6 5* - 20 15 12 - ns 1.2 2.0 2.7 3.0 to 3.6 Fig. 9 th hold time Dn to LE 10 10 10 , Specification Octal D-type transparent latch; 3-state 74LV373 AC WAVEFORMS 2.7 V Dn INPUT GND Voh(2) Qn OUTPUT Vol'2' 'PHL- VMd) Y vmd) ' 'PLH Fig.6 Waveforms showing the data input ( Dn ) to output (Qn


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PDF 74LV373 74LV373 74HC/HCT373. 0D7533S lv373 74LV373D 74LV373DB 74LV373N 74LV373PW
Not Available

Abstract: No abstract text available
Text: Technische Information / Technical Information Netz-Gleichrichterdiode Rectifier Diode 25 DN , DN 06 N Mechanische Eigenschaften / Mechanical properties Vorläufige Daten Preliminary data , Information / Technical Information Netz Gleichrichterdiode Rectifier Diode 25 DN 06 N 22 3,65 , / Technical Information Netz Gleichrichterdiode Rectifier DiodeThyristor 25 DN 06 N Kühlung , 0,001956 0, 00028 n [s] 0,021219 0,002481 0,000267 0,000009 anodenseitig


Original
PDF
2014 - Not Available

Abstract: No abstract text available
Text: 27 31 27 31 GMB.00.025.DG GMB. 00.028 .DG GMD.00.025.DG GMD. 00.028 .DG 2.8 3.1 2.8 3.1


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PDF P1008,
SIGNETICS* 82S153

Abstract: n82S152 82S152A logic gates circuit diagram Programmable Logic Array GL RESISTOR ARRAY n8281 82S153 82S152 RESISTOR ARRAY MANUFACTURER BI
Text: link pairs. It is normally associated with all unused (inactive) AND gates Pn, Dn . 2. Any gate Pn> Dn


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PDF J2S153 I2S153A 82S152 B2S153 SIGNETICS* 82S153 n82S152 82S152A logic gates circuit diagram Programmable Logic Array GL RESISTOR ARRAY n8281 82S153 RESISTOR ARRAY MANUFACTURER BI
Not Available

Abstract: No abstract text available
Text: 27 31 27 31 GMB.00.025.DG GMB. 00.028 .DG GMD.00.025.DG GMD. 00.028 .DG 2.8 3.1 2.8 3.1


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PDF P1008
Supplyframe Tracking Pixel