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LTC4257CS8#TRPBF Linear Technology LTC4257 - IEEE 802.3af PD Power over Ethernet Interface Controller; Package: SO; Pins: 8; Temperature Range: 0°C to 70°C
LT4275AIDD#PBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
LT4275BIMS#PBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LT4275AIDD#TRPBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: DFN; Pins: 10; Temperature Range: -40°C to 85°C
LT4275BIMS#TRPBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LT4275AIMS#PBF Linear Technology LT4275 - LTPoE++/PoE+/PoE PD Controller; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C

FX mode ethernet schematic rtl8201 Datasheets Context Search

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rtl8201 application note

Abstract: rtl8201 reference schematic rtl8201 Schematic RTL8201 rtl8201 schematic circuit Ethernet-MAC ic rtl8201 fiber FX mode ethernet schematic Ethernet-MAC ethernet transformer Application Note
Text: Table of Comparison between RTL8201 Schematic & RTL8201B RTL8201 RTL8201B Genral It can be used in any embedded system with an Ethernet MAC that needs a twisted pair physical connection It can be used in any embedded system with an Ethernet MAC that needs a twisted pair physical connection or fiber PECL interface to external 100Base- FX optical transceiver module Pins Re-allocation Pin , ) Pin 32 : PWFBOUT (2.5V) Schematic Resistor connected(R5) to RTSET(pin 28) is 2.0K Ohm Resistor


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PDF RTL8201 RTL8201B RTL8201 100Base-FX rtl8201 application note rtl8201 reference schematic rtl8201 Schematic rtl8201 schematic circuit Ethernet-MAC ic rtl8201 fiber FX mode ethernet schematic Ethernet-MAC ethernet transformer Application Note
rtl8201 application note

Abstract: RTL8201 RTL8201 reference Design RTL8201 Design Realtek 8201 RTL8201L RTL8208 Realtek RTL8201 TXC10 100Base-TX-FD full duplex
Text: RTL8201 (L) REALTEK SINGLE CHIP SINGLE PORT 10/100MBPS FAST ETHERNET PHYCEIVER RTL8201 (L , .1.04 RTL8201 (L) 1. Features The Realtek RTL8201 (L) is a Fast Ethernet Phyceiver with MII interface to the , interface. In this mode , the power consumption is minimum. Set high to put the RTL8201 (L) into repeater mode . In test mode , this pin is re-defined as RTT2. Set high to put the RTL8201 (L) into 100Mbps , Set high to put the RTL8201 (L) into LDPS mode , Pull high to set the RTL8201 (L) into MII mode


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PDF RTL8201 10/100MBPS MS-026, SS048 rtl8201 application note RTL8201 reference Design RTL8201 Design Realtek 8201 RTL8201L RTL8208 Realtek RTL8201 TXC10 100Base-TX-FD full duplex
2005 - Realtek RTL8201bL

Abstract: RTL8201BL RTL8201BL-LF rtl8201 application note rtl8201 Schematic rtl8139c ethernet schematics step down transformer 200mA ethernet phy package 48-PIN LQFP RTL8201BL schematic rtl8201 reference schematic
Text: -TX .19 8.8.2. 100Base- FX Fiber Mode Operation , network speed. 1 = 100Mbps 0 = 10Mbps When 100Base- FX mode is enabled, this bit=1 and is read only , link speed and the data transfer mode , respectively. When 100Base- FX mode is enabled, this bit=0 and , reflect the duplex status.(1: Full duplex, 0: Half duplex) When 100Base- FX mode is enabled, this bit can , detected (cleared on read) 0 = no remote fault condition detected When in 100Base- FX mode , this bit means


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PDF RTL8201BL RTL8201BL-LF 10/100M JATR-1076-21 SS048 48-Pin Realtek RTL8201bL RTL8201BL RTL8201BL-LF rtl8201 application note rtl8201 Schematic rtl8139c ethernet schematics step down transformer 200mA ethernet phy package 48-PIN LQFP RTL8201BL schematic rtl8201 reference schematic
RTL8201

Abstract: RTL8201BL rtl8201 Schematic RTL8201BL schematic RTL8201 DATASHEET Realtek RTL8201bL schematic ETHERNET REALTEK TXC10 AVDD33 fefi
Text: network speed. 1 = 100Mbps 0 = 10Mbps When 100Base- FX mode is enabled, this bit=1 and is read only , link speed and the data transfer mode , respectively. When 100Base- FX mode is enabled, this bit=0 and , reflect the duplex status.(1: Full duplex, 0: Half duplex) When 100Base- FX mode is enabled, this bit can , ) 0 = no remote fault condition detected When in 100Base- FX mode , this bit means an in-band signal , to MAC FX (pin 24) L L H 2002-03-29 MII/SNIB (pin 44) H L X Operation mode UTP


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PDF RTL8201BL 10/100M Pin32: AVDD25 DVDD25 RTL8201 RTL8201BL rtl8201 Schematic RTL8201BL schematic RTL8201 DATASHEET Realtek RTL8201bL schematic ETHERNET REALTEK TXC10 AVDD33 fefi
RTL8201

Abstract: rtl8201 Schematic rtl8201 reference schematic RTL8201BL rtl8201 schematic circuit rtl8139c ethernet schematics Realtek RTL8201bL RTL8201BL schematic rtl8201 application note TXC10
Text: normal operation This bit sets the network speed. 1 = 100Mbps 0 = 10Mbps When 100Base- FX mode is , 100Base- FX mode is enabled, this bit=0 and is read only. This bit turns down the power of the PHY chip , 100Base- FX mode is enabled, this bit can be set through the MDC/MDIO SMI interface or DUPLEX pin. 0 , 100Base- FX mode , this bit means an inband signal Far-End-Fault is detected. Refer to Section 7.11. Auto , to MAC FX (pin 24) L L H 2002-03-29 MII/SNIB (pin 44) H L X Operation mode UTP


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PDF RTL8201BL 10/100M Pin32: AVDD25# DVDD25# RTL8201 rtl8201 Schematic rtl8201 reference schematic RTL8201BL rtl8201 schematic circuit rtl8139c ethernet schematics Realtek RTL8201bL RTL8201BL schematic rtl8201 application note TXC10
rtl8201 Schematic

Abstract: rtl8201 reference schematic rtl8201 RTL8201BL schematic RTL8201BL Realtek RTL8201bL TXC10 MDIO clause 22 Realtek 8201 rtl8201 schematic circuit
Text: network speed. 1 = 100Mbps 0 = 10Mbps When 100Base- FX mode is enabled, this bit=1 and is read only , link speed and the data transfer mode , respectively. When 100Base- FX mode is enabled, this bit=0 and , reflect the duplex status.(1: Full duplex, 0: Half duplex) When 100Base- FX mode is enabled, this bit can , ) 0 = no remote fault condition detected When in 100Base- FX mode , this bit means an in-band signal , to MAC FX (pin 24) L L H 2002-03-29 MII/SNIB (pin 44) H L X Operation mode UTP


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PDF RTL8201BL 10/100M Pin32: AVDD25 DVDD25 rtl8201 Schematic rtl8201 reference schematic rtl8201 RTL8201BL schematic RTL8201BL Realtek RTL8201bL TXC10 MDIO clause 22 Realtek 8201 rtl8201 schematic circuit
2006 - Not Available

Abstract: No abstract text available
Text: . 1: 100Base-T 0: 10Base-T When 100Base- FX mode is enabled, this bit=1 and is read only. This bit , the link speed and the data transfer mode , respectively. When 100Base- FX mode is enabled, this bit , Single-Chip/Port 10/100 Fast Ethernet PHYceiver With Auto MDIX 9 Mode RW Default 0 RW 0 , Ethernet PHYceiver With Auto MDIX 15 Rev. 1.1 RTL8201N Datasheet In 100Base-TX mode , when the , RTL8201N-GR SINGLE-CHIP/PORT 10/100M FAST ETHERNET PHYCEIVER WITH AUTO MDIX DATASHEET Rev


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PDF RTL8201N-GR 10/100M JATR-1076-21 RTL8201N RTL8201N 64-pin
RTL8201CL

Abstract: Realtek RTL8201CL RTL8201 rtl8201 fiber Realtek 8201 realtek fiber TXC10 fiber 100base AVDD33 rtl8201 application note
Text: . 19 7.8.2 100Base- FX Fiber Mode Operation . 19 7.8.3 10Base Tx/Rx , with an Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to external 100Base- FX , , this bit will reflect the duplex status.(1: Full duplex, 0: Half duplex) When 100Base- FX mode is , 100Base- FX mode is enabled, this bit=0 and is read only. This bit turns down the power of the PHY chip , 100Base- FX mode , this bit means an in-band signal Far-End-Fault is detected. Refer to Section 7.11


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PDF RTL8201CL 10/100M 100Base 100Base-FX 10Base MS-026, SS048 RTL8201CL Realtek RTL8201CL RTL8201 rtl8201 fiber Realtek 8201 realtek fiber TXC10 fiber 100base AVDD33 rtl8201 application note
2009 - st802rt1

Abstract: AFBR-5803Z stm32f107 MDC schottky diode ST AFBR-5803 nfe31pt222z1e9l AM00639 LD1117S33 FX mode ethernet schematic STM32F107 can Ethernet
Text: Ethernet PHY demonstration board - schematic - part 1 . . . . . . . . . 20 ST802RT1 FX mode Ethernet PHY demonstration board - schematic - part 2 . . . . . . . . . 21 ST802RT1 FX mode Ethernet PHY demonstration board , ST802RT1 FX mode Ethernet PHY demonstration board - BOM and schematic Bill of material Designator , UM0858 Table 13. ST802RT1 FX mode Ethernet PHY demonstration board - BOM and schematic Bill of , and schematic UM0858 Figure 10. ST802RT1 FX mode Ethernet PHY demonstration board - schematic -


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PDF UM0858 STEVAL-PCC011V1, ST802RT1 STEVAL-PCC011V1 STM32F107 AFBR-5803Z MDC schottky diode ST AFBR-5803 nfe31pt222z1e9l AM00639 LD1117S33 FX mode ethernet schematic STM32F107 can Ethernet
2003 - Not Available

Abstract: No abstract text available
Text: -TX. 20 100Base- FX Fiber Mode Operation , Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base- FX , -TX, 100Base- FX , and 10Base-T modes. Single-Chip/Port 10/100 Fast Ethernet PHYceiver 5 Track ID: JATR , the Speed status. 1: 100Base-T 0: 10Base-T) When 100Base- FX mode is enabled, this bit=1 and is read , the link Enable speed and the data transfer mode , respectively. When 100Base- FX mode is enabled


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PDF RTL8201CL+ 10/100M JATR-1076-21 MS-026, SS048 JATR-1076-21
2004 - RTL8201CP reference Design

Abstract: FX mode ethernet schematic rtl8201 RTL8201CP schematic rtl8201 application note RTL8201bl reference Design RTL8201cp schematic Design RTL8201 reference Design
Text: -TX .20 7.8.2. 100Base- FX Fiber Mode Operation , Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base- FX , 100Base- FX mode is enabled, this bit=1 and is read only. Auto This bit enables/disables the Nway , , respectively. When 100Base- FX mode is enabled, this bit=0 and is read only. Power Down This bit turns down , Ethernet PHYceiver 8 Mode RW Default 0 RW 0 RW 0 RW 1 RW 0 RW 0


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PDF RTL8201CP 10/100M JATR-1076-21 MS-026, SS048 JATR-1076-21 RTL8201CP reference Design FX mode ethernet schematic rtl8201 RTL8201CP schematic rtl8201 application note RTL8201bl reference Design RTL8201cp schematic Design RTL8201 reference Design
2005 - RTL8201CP reference Design

Abstract: RTL8201CP schematic pulse h1251 RTL8201cp schematic Design RTL8201CP rtl8201cp application note RTL8201bl reference Design H1251 RTL8201cp Design rtl8201cp reference schematic
Text: -TX .20 100Base- FX Fiber Mode Operation , an Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base- FX , the Speed status. 1: 100Base-T 0: 10Base-T) When 100Base- FX mode is enabled, this bit=1 and is read , determine the link speed and the data transfer mode , respectively. When 100Base- FX mode is enabled, this , Reserved Name Reset Single-Chip/Port 10/100 Fast Ethernet PHYceiver 8 Mode RW Default 0


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PDF RTL8201CP RTL8201CP-LF RTL8201CP-VD RTL8201CP-VD-LF 10/100M JATR-1076-21 SS048 JATR-1076-21 RTL8201CP reference Design RTL8201CP schematic pulse h1251 RTL8201cp schematic Design RTL8201CP rtl8201cp application note RTL8201bl reference Design H1251 RTL8201cp Design rtl8201cp reference schematic
2003 - rtl8201cp Schematic

Abstract: RTL8201CP reference Design RTL8201 reference Design RTL8201cp schematic Design h1245 RTL8201 rtl8201 Schematic RTL8201CP RTL8201cp Design rtl8201 schematic circuit
Text: -TX. 20 7.8.2. 100Base- FX Fiber Mode Operation , Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base- FX , the Speed status. 1: 100Base-T 0: 10Base-T) When 100Base- FX mode is enabled, this bit=1 and is read , the link Enable speed and the data transfer mode , respectively. When 100Base- FX mode is enabled , Reserved Name Reset Single-Chip/Port 10/100 Fast Ethernet PHYceiver 8 Mode RW Default 0


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PDF RTL8201CP 10/100M JATR-1076-21 MS-026, SS048 JATR-1076-21 rtl8201cp Schematic RTL8201CP reference Design RTL8201 reference Design RTL8201cp schematic Design h1245 RTL8201 rtl8201 Schematic RTL8201CP RTL8201cp Design rtl8201 schematic circuit
2004 - RTL8201cp schematic Design

Abstract: RTL8201CP schematic RTL8201 reference Design h1245 RTL8201CP RTL8201cp Design RTL8201cp Reference Designs RTL8201CP reference Design rtl8201 Schematic RTL8201 Design
Text: -TX .20 100Base- FX Fiber Mode Operation , an Ethernet MAC that needs a UTP physical connection or Fiber PECL interface to an external 100Base- FX , -TX, 100Base- FX , and 10Base-T modes. Single-Chip/Port 10/100 Fast Ethernet PHYceiver 5 Track ID: JATR , 100Base- FX mode is enabled, this bit=1 and is read only. Auto This bit enables/disables the NWay , , respectively. When 100Base- FX mode is enabled, this bit=0 and is read only. Power Down This bit turns down


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PDF RTL8201CP 10/100M JATR-1076-21 SS048 JATR-1076-21 RTL8201CP-LF RTL8201CP-VD RTL8201cp schematic Design RTL8201CP schematic RTL8201 reference Design h1245 RTL8201CP RTL8201cp Design RTL8201cp Reference Designs RTL8201CP reference Design rtl8201 Schematic RTL8201 Design
2005 - RTL8201CL

Abstract: RTL8201 reference Design RTL8201cl reference Design Realtek RTL8201CL RTL8201cp schematic Design RTL8201CL-VD-LF RTL8201CP schematic RTL8201CL-VD rtl8201 Schematic RTL8201 Design
Text: -TX .20 100Base- FX Fiber Mode Operation , will reflect the Speed status. 1: 100Base-T 0: 10Base-T) When 100Base- FX mode is enabled, this bit , :13 and 0:8 will determine the link speed and the data transfer mode , respectively. When 100Base- FX , duplex Reserved Name Reset Single-Chip/Port 10/100 Fast Ethernet PHYceiver 8 Mode RW , RO 0 RO 1 Mode RO Default 0000 Mode RO Default 8201 When in 100Base- FX


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PDF RTL8201CL RTL8201CL-LF RTL8201CL-VD RTL8201CL-VD-LF 10/100M JATR-1076-21 SS048 JATR-1076-21 RTL8201CL RTL8201 reference Design RTL8201cl reference Design Realtek RTL8201CL RTL8201cp schematic Design RTL8201CL-VD-LF RTL8201CP schematic RTL8201CL-VD rtl8201 Schematic RTL8201 Design
2010 - stm32f107

Abstract: FX mode ethernet schematic optical ethernet schematic ST802RT1B Ethernet STM32F107 ST802RT1 28 MHZ crystal 100BASE-FX SMB200 STEVAL-PCC011V1
Text: FX mode Ethernet PHY demonstration board schematic - part 1 2/6 Doc ID 17015 Rev 1 STEVAL-PCC011V1 Figure 2. Schematic diagrams ST802RT1 FX mode Ethernet PHY demonstration board schematic - , ST802RT1 FX mode Ethernet PHY demonstration board schematic - part 3 Doc ID 17015 Rev 1 , STEVAL-PCC011V1 ST802RT1B Ethernet PHY demonstration board Data brief Features ST802RT1B fast Ethernet physical layer transceiver On-board 3.3 V LDO regulator On-board 25 MHz


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PDF STEVAL-PCC011V1 ST802RT1B 20-pin STM32F107 40-pin SMB-200/ SMB-2000) stm32f107 FX mode ethernet schematic optical ethernet schematic Ethernet STM32F107 ST802RT1 28 MHZ crystal 100BASE-FX SMB200 STEVAL-PCC011V1
2004 - RTL8201 reference Design

Abstract: RTL8201bl reference Design
Text: -TX .20 7.8.2. 100Base- FX Fiber Mode Operation , Saving mode Supports Base Line Wander (BLW) compensation Single-Chip/Port 10/100 Fast Ethernet , 100Base- FX mode is enabled, this bit=1 and is read only. Auto This bit enables/disables the Nway , , respectively. When 100Base- FX mode is enabled, this bit=0 and is read only. Power Down This bit turns down , Ethernet PHYceiver 8 Mode RW Default 0 RW 0 RW 0 RW 1 RW 0 RW 0


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PDF RTL8201CL 10/100M JATR-1076-21 MS-026, SS048 JATR-1076-21 RTL8201 reference Design RTL8201bl reference Design
2004 - RTL8201bl reference Design

Abstract: No abstract text available
Text: -TX .20 100Base- FX Fiber Mode Operation , -TX, 100Base- FX , and 10Base-T modes. Single-Chip/Port 10/100 Fast Ethernet PHYceiver 5 Track ID: JATR , 100Base- FX mode is enabled, this bit=1 and is read only. Auto This bit enables/disables the NWay , , respectively. When 100Base- FX mode is enabled, this bit=0 and is read only. Power Down This bit turns down , Ethernet PHYceiver 8 Mode RW Default 0 RW 0 RW 0 RW 1 RW 0 RW 0


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PDF RTL8201CL 10/100M JATR-1076-21 SS048 JATR-1076-21 RTL8201CL-LF RTL8201CL-VD RTL8201bl reference Design
2007 - IC 7411

Abstract: BCM5218KTB ic 5218 a bcm 5903 AVAGO phy SX-7210 FX mode ethernet schematic SX-7411 BCM 100BASE full duplex smartbits
Text: independent Fast Ethernet Transceivers, each providing Physical Layer interface functions for 100BASE- FX , NRZI in 100BASE- FX mode , sending an idle code group between data packets. In TX mode , the transmit , Smart Bits allows Ethernet traffic testing of a communication link. The schematic configuration shown , -5903E SINGLE MODE DUPLEX TRANSCEIVER Figure 3 - Schematic illustrating various test arrangements applied on , Introduction Description Avago offer Multimode and Single mode 125 Mbd Small Form Factor MT-RJ


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PDF HFBR-5903/HFCT 5903E TB5218 BCM5218 TB5218) 100BASE-FX HFBR-5903/HFCT-5903E TB5218-TI1 IC 7411 BCM5218KTB ic 5218 a bcm 5903 AVAGO phy SX-7210 FX mode ethernet schematic SX-7411 BCM 100BASE full duplex smartbits
Altima Communications AC101

Abstract: mpc68360 AC101 MPC860T FX mode ethernet schematic
Text: integrated, low power, 10/100TX/ FX Ethernet Transceiver. Functions include integrated MII, ENDEC, Scrambler , /TF provides all of the required features of an MII compliant 10/100TX/ FX Ethernet Transceiver. The , AC101-QF/TF Ultra Low Power 10/100 Ethernet Transceiver January 20, 2000 Features: q MII , TX drivers for 1:1 or 1.25:1 transformers enable additional power reduction Cable Detect mode - TYP <40mW Power Down mode - TYP <3.3mW Fully compliant with IEEE 802.3 / 802.3u Baseline Wander


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PDF AC101-QF/TF 100FX 100PQFP 80TQFP 280mW 100Base 100Mbps AC101 Altima Communications AC101 mpc68360 MPC860T FX mode ethernet schematic
2013 - Not Available

Abstract: No abstract text available
Text: KSZ8462FHL devices are highly integrated 2-port 10BASE-T / 100BASE-TX/ FX managed Ethernet switches with , . 8 3.5 10/100 Ethernet PHY Ports . 9 3.6 100BASE- FX Fiber Port Option , industrial applications where real time clock synchronization using Ethernet connectivity across a network is desired. The KSZ8462HL includes all the functions of a 10/100BASET/TX/ FX switch system that


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PDF KSZ8462 KSZ8462HL
2002 - RTL code for ethernet

Abstract: 100BASE-FX LINK100 PHY-100 fiber optic schematic symbols LED latch "LED latch"
Text: 100BASE- FX . The PHY operates in the 100BASE-TX or 100BASE- FX mode at 100 Mbits/s, or in the 10BASE , cable with Manchester encoded, 10 MHz data to achieve a 10 Mbits/s throughput. · 100BASE- FX mode , mode , this output is asserted when valid data is detected on the receive TP or FX inputs. The output , Ethernet PHY-110 Core Preliminary Datasheet The LSI Logic PHY-110 core is a complete physical layer solution for 10 and 100 Mbits/s Ethernet connections. Figure 1 shows a typical application of


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PDF PHY-110 PHY-110 PHY-110. PHY-100 RTL code for ethernet 100BASE-FX LINK100 fiber optic schematic symbols LED latch "LED latch"
2013 - Not Available

Abstract: No abstract text available
Text: KSZ8441FHL devices are 1-port 10BASE-T / 100BASE-TX/ FX Ethernet end points with a generic parallel host , . 8 3.5 10/100 Ethernet PHY Ports . 9 3.6 100BASE- FX Fiber Port Option , using Ethernet connectivity across a network is desired. The KSZ8441HL is fully compliant with the IEEE , €¢ • • • • • Micrel’s KSZ8441HL IEEE 1588 Precision Time Protocol 10/100 Ethernet


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PDF KSZ8441 KSZ8441HL
1998 - 8903-060-177MS-A

Abstract: 1101 SRAM 80 pin simm flash 64mb SCHEMATIC AMD graphics card 8903-080-177MS D31 24 usb superio controller 60 pin ISA slot 8903-040-177MS-A programmable interrupt controller 8259
Text: SysIO PCnet IGS2000 PCI expansion IDE SuperIO & FX Bus USB Ethernet graphics varies Function · Configure SysIO IDE · Configure SysIO SuperIO & FX Bus · Configure SysIO USB · Configure PCnet Ethernet · , /16/32 bits wide (jumper option) · 512KB SRAM: 32 bits wide · Communication · Ethernet 10baseT & , : four sockets, up to 64Mbits each, maximum 32MB · Static RAM · Ethernet : AMD PCnet-FAST Am79C971 · Audio , . 2. IO Devices 2.1 Ethernet The AMD Am79C971 PCnet-FAST is a single-chip interface between PCI and


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PDF MB86832 AD1816A AD00/AD01/BE IGS2000 8903-060-177MS-A 1101 SRAM 80 pin simm flash 64mb SCHEMATIC AMD graphics card 8903-080-177MS D31 24 usb superio controller 60 pin ISA slot 8903-040-177MS-A programmable interrupt controller 8259
2013 - KSZ8463RL

Abstract: No abstract text available
Text: -TX/ FX managed Ethernet switches with MII and RMII interface connectivity to a host on Port 3. They are , -T and 100BASE-TX/ FX ). The KSZ8463ML/FML devices have Port 3 configured for MII mode , while the , connector for Port 3 operating in MAC Mode (optional) Provisioning for two 100BASE- FX fiber interfaces , connected to an Ethernet traffic generator or analyzer via fiber transceiver and fiber cable. In 100BASE- FX , . 11 3.5 10/100 Ethernet PHY Ports


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PDF KSZ8463 KSZ8463ML/RL KSZ8463RL
Supplyframe Tracking Pixel