The Datasheet Archive

Top Results (6)

Part Manufacturer Description Datasheet Download Buy Part
LTC1706EMS-61 Linear Technology LTC1706-61 - 5-Bit VID Voltage Programmer for AMD Opteron CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC1753CSW Linear Technology LTC1753 - 5-Bit Programmable Synchronous Switching Regulator Controller for Pentium® II Processor; Package: SO; Pins: 20; Temperature Range: 0°C to 70°C
LTC3733CUHF-1 Linear Technology LTC3733 - 3-Phase, Buck Controllers for AMD CPUs; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C
LTC1706EMS-63#PBF Linear Technology LTC1706-63 - 5-Bit VID Voltage Programmer for Sun CPUs; Package: MSOP; Pins: 10; Temperature Range: -40°C to 85°C
LTC3733CG#TRPBF Linear Technology LTC3733 - 3-Phase, Buck Controllers for AMD CPUs; Package: SSOP; Pins: 36; Temperature Range: 0°C to 70°C
LTC3733CUHF-1#TR Linear Technology LTC3733 - 3-Phase, Buck Controllers for AMD CPUs; Package: QFN; Pins: 38; Temperature Range: 0°C to 70°C

FLOATING POINT PROCESSOR TMSC6000 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2008 - vhdl code for DES algorithm

Abstract: XAPP921c FLOATING POINT PROCESSOR TMSC6000 pulse compression radar fir filter matlab code LMS adaptive filter simulink model 3SD1800A LMS simulink verilog code for lms adaptive equalizer for audio XILINX vhdl code REED SOLOMON encoder decoder fir filter with lms algorithm in vhdl code
Text: Spartan3/3E XAPP759 PN Generators Using the SRL Macro PowerPC Processor with Floating Point Unit , Processor with Floating Point Unit for Virtex-4 Device XAPP547 Software Development Tools ISE , data types - Integer and floating point data representa- Defense Systems IP LogiCORE AllianceCORE , such as floating point FFTs for FFT, Pipelined (Vectis-QuadSpeed) 4 expanding dynamic range , hundreds of channels. 2. Offload compute intensive tasks from your DSP processor and save valuable cycles


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2008 - verilog code for 2-d discrete wavelet transform

Abstract: XAPP921c simulink universal MOTOR in matlab turbo encoder model simulink matched filter simulink simulink model for kalman filter using vhdl fpga based wireless jamming networks umts simulink dvb-rcs chip XAPP569
Text: into reality. XAPP948 PowerPC Processor with Floating Point Unit for Virtex-4 FX Devices , Socket Architecture XAPP919 PowerPC Processor with Floating Point Unit for Virtex-4 Device , - A combination of complex and real data types - Integer and floating point data representa , cost and power Complex Multiplier - Easy and efficient support for floating CORDIC point operations , advanced FFT up to 64K points functions such as floating point FFTs for FFT, Pipelined (Vectis-QuadSpeed


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microprocessors block diagram of car engine

Abstract: amd 486 block diagram of pentium III PROCESSOR cache athlon 64 Intel Coprocessor x87 ieee 32 bit floating point multiplier IEEE754 Athlon 64 datasheet Athlon 64 AMD Athlon 64
Text: nextgeneration features and technology that set the AMD Athlon processor 's floating point engine apart from the , seventh-generation AMD Athlon processor architecture, AMD's "no-compromise," superscalar floating point engine , . Beginning with the 486 processor , the x87 floating point unit was integrated onto the processor die , using superscalar SIMD floating point capabilities to significantly improve the processor 's ability to , AMD Athlon processor features a three-issue, superscalar floating point design based on three


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PDF x86-Based Form-10K. microprocessors block diagram of car engine amd 486 block diagram of pentium III PROCESSOR cache athlon 64 Intel Coprocessor x87 ieee 32 bit floating point multiplier IEEE754 Athlon 64 datasheet Athlon 64 AMD Athlon 64
weitek

Abstract: XL-8137 weitek 3132 weitek FPU IEEE 3 bus datas weitek xl-3132 D630 diagram 8137 weitek xl8000 XL-8000
Text: -8000: 8 MIPS integer processor XL-8032: 8 MIPS, 5 MFLOPS single-precision floating point processor XL-8064: 7 MIPS, 6 MFLOPS double-precision floating point processor RISC ARCHITECTURE Single-cycle execution , high-speed 32-bit processor ; the XL-8032, a single-precision floating point processor with all the features of the XL-8000; and the XL-8064, a double-precision floating point processor with all the features of , -8032 is a 32-bit floating point processor that achieves a sustained processing rate of 8 MIPS and 5 MFLOPS


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PDF XL-8000: XL-8032: XL-8064: 32-word XL-8000-080-GCD XL-8000 144-Pin XL-8032-1 20-GCD weitek XL-8137 weitek 3132 weitek FPU IEEE 3 bus datas weitek xl-3132 D630 diagram 8137 weitek xl8000 XL-8000
AMD Athlon 64

Abstract: cache athlon 64 AMD-K6 Processor Data Sheet model 6 Athlon 64 Digital Sound processor pentium instruction set AMD ATHLON 64 X 2
Text: The AMD Athlon processor can generate four 32-bit floating point results (adds, subtracts, multiplies , platforms, as well as the first to introduce superscalar SIMD floating point technology for x86 processors. Intel delivered its SIMD floating point solution (SSE) nine months after the advent of 3DNow , instructions that enhance the personal computing experience by using SIMD floating point techniques to open , ! instructions are designed to improve the performance of single-precision floating point operations, enabling


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PDF mid-1999) 16-bit 32-byte AMD Athlon 64 cache athlon 64 AMD-K6 Processor Data Sheet model 6 Athlon 64 Digital Sound processor pentium instruction set AMD ATHLON 64 X 2
Athlon Processors

Abstract: acer circuit diagram of motherboard AMD Athlon 64 AMD Athlon 64 pin diagram Athlon+64+X2+pinout amd socket A AMD-750 x86 processor architecture Athlon amd athlon datasheet
Text: Intel's Pentium® III processor and delivering the highest integer, floating point and 3D multimedia , floating point engine. The AMD Athlon processor 's microarchitecture incorporates enhanced 3DNow , -stage floating point pipelines. The innovative AMD Athlon processor architecture implements the x86 instruction , , 3DNow! technology, and x87 floating point instructions. Figure 1: AMD AthlonTM Processor , E P A P E R Leading-Edge Floating Point and 3D Multimedia Technology The AMD Athlon processor


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PDF Form-10K. AMD-750 Athlon Processors acer circuit diagram of motherboard AMD Athlon 64 AMD Athlon 64 pin diagram Athlon+64+X2+pinout amd socket A x86 processor architecture Athlon amd athlon datasheet
Not Available

Abstract: No abstract text available
Text: int32 Processor cycles are shown as Typical/Maximum cycles. Table 11.23 Floating point load/store , Table 11.24 Processor Cycles Name DEF Floating point general operation codes 53 / 56 , Name DEF Floating point error operation codes Operation Code Memory Code Processor , Processor cycles are shown asTypical/Maximum cycles. Table 11.27 Floating point comparison operation , 11.1.2 0 to 9 inclusive Product identity numbers Floating point unit In the floating point


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mb86901

Abstract: No abstract text available
Text: floating point co­ processor . A peak instruction execution rate of one instruction per cycle is , €¢ Floating point interface • Single-cycle execution for majority of instructions • Concurrent floating , aligners, and a three-port register file consisting of 120 registers. A floating point interface supports concurrent floating point instruction execution. I FUJITSU MB86901 1. In tro d u ctio n The Fujitsu , supports a high-performance cache. A separate floating point port directly interfaces to the MB86911 RISC


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PDF 32-Bit MB86911 CH23001 mb86901
1995 - intel 80286 pin diagram

Abstract: microprocessor 80286 internal architecture 80286 instruction set 80286 microprocessor pin description logical block diagram of 80286 intel 80186 instruction set INTELDX4 write-through intel 8086 Arithmetic and Logic Unit -ALU 80286 microprocessor pin out diagram i486 DX2
Text: INTELDX4 TM PROCESSOR ON-CHIP FLOATING POINT UNIT 4 2 Register Set 4 2 1 FLOATING POINT REGISTERS 4 2 2 BASE ARCHITECTURE REGISTERS 4 2 3 SYSTEM LEVEL REGISTERS 4 2 4 FLOATING POINT REGISTERS 4 2 , and floating point hardware on-chip for improved performance The IntelDX2 processor integrates an 8K , describes the 32-bit RISC integer core of the Military Intel486 processor The onchip floating point unit , 4 3 1 FLOATING POINT INSTRUCTIONS 4 4 Memory Organization 4 4 1 ADDRESS SPACES 4 4 2 SEGMENT


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PDF Intel486 100-MHz 32-Bit 16K-Byte intel 80286 pin diagram microprocessor 80286 internal architecture 80286 instruction set 80286 microprocessor pin description logical block diagram of 80286 intel 80186 instruction set INTELDX4 write-through intel 8086 Arithmetic and Logic Unit -ALU 80286 microprocessor pin out diagram i486 DX2
XL-8137

Abstract: XL-8136 xl8137 P1111 bit-slice l8032
Text: -8000: 8 M IPS integer processor XL-8032: 8 M IPS, 5 M FLOPS single-precision floating point processor X L-8064: 7 M IPS, 6 M FLOPS double-precision floating point processor RISC ARCHITECTURE Single-cycle , : the X L-8000, a high-speed 32-bit processor ; the XL-8032, a single-precision floating point processor with all the features of th e X L-8000; and the XL-8064, a double precision floating point processor , -8032 PROCESSOR T he XL-8032 is a 32-bit floating point processor that achieves a sustained processing rate of 8


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PDF XL-8000: XL-8032: L-8064: 32-word L-8000-080-G XL-8000 144-Pin L-8032-120-G XL-8137 XL-8136 xl8137 P1111 bit-slice l8032
2002 - CPU ATHLON XP barton model 10

Abstract: ATHLON XP AMD Athlon xp AMD Athlon XP 2000 AMD Athlon 64 pin diagram pin AMD Athlon 64 Xp AMD xp datasheet 2WAY Athlon Athlon 64
Text: processor offers one of the most powerful, architecturally advanced floating point units (FPU) delivered in an x86 microprocessor. The AMD Athlon XP processor 's three issue, superscalar floating point , processor 's floating point pipeline support x87 floating point instructions, MMX instructions, and 3DNow , one for Fstore. Thus, as an example, AMD Athlon XP processor can do one floating point addition AND , deliver compelling solutions for high-performance computing, and delivers superb integer, floating point


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PDF 512KB CPU ATHLON XP barton model 10 ATHLON XP AMD Athlon xp AMD Athlon XP 2000 AMD Athlon 64 pin diagram pin AMD Athlon 64 Xp AMD xp datasheet 2WAY Athlon Athlon 64
1996 - 16 BIT ALU design structural

Abstract: No abstract text available
Text: Chapter 2 TurboSPARC Architecture 2.1 INTEGER UNIT AND FLOATING POINT CONTROLLER The integer unit (IU) and floating point control (FPC) are merged into a 9-stage pipeline. Below are some of the , /non-taken) execute in one cycle. · Harvard architecture. · IMUL and IDIV implemented using Floating Point , floating point divide (DIV) or square root (SQRT) instruction, that instruction is posted to a special , complete in the FR-stage. In addition, the result of floating point DIV and SQRT instructions are posted


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2001 - tms320c67xx features architecture

Abstract: Architecture of TMS320C67xx TMS320C67XX* internal architecture addressing modes of TMS320c67XX TMS320C67XX internal Architecture of TMS320C67xx Architecture and programming of TMS320C67XX feature of TMS320C67XX TMS320C67XX PROCESSORS interprocessor communication protocol buffer port
Text: /TMS320C6712 are general purpose 32-bit, floating point DSPs. Each DSP processor has a total onchip memory of , -bits) . IEEE floating point formats are supported. Result Rounding The TMS320C6711/TMS32C6712 processor , TMS320C6711/TMS32C6712 processor , many floating point instructions don't complete execution in a single cycle , . Srinivas Introduction Rich, powerful instruction sets, floating point precision and high speed execution make floating point Digital Signal Processors (DSPs) a popular choice for designers of Signal


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PDF ADSP-21161? ADSP-21161 TMS320C6711 TMS320C6712 TMS320C6000 tms320c67xx features architecture Architecture of TMS320C67xx TMS320C67XX* internal architecture addressing modes of TMS320c67XX TMS320C67XX internal Architecture of TMS320C67xx Architecture and programming of TMS320C67XX feature of TMS320C67XX TMS320C67XX PROCESSORS interprocessor communication protocol buffer port
1999 - IFA-13

Abstract: fpu coprocessor b10010 MIPS645Kf 17 mdu 002 R5000 MIPS32 MIPS64 5kf MIPS64 MIPS64TM
Text: office automation markets where floating point performance is required. The power-management features of , features a high performances IEEE 754 compliant Floating Point Unit (FPU). The FPU supports both single , . The 5Kf core can dual issue a floating point arithmetic instruction with a floating point load/store or integer instruction, whereby two instructions can be executed every cycle in floating point , BIU Floating Point Unit (FPU) TLB Data Cache Power Mgmt. Fixed/Required Optional


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PDF MIPS64TM 64-bit R5000 MIPS16TM, MIPS16eTM MIPS32TM, MIPS64TM, IFA-13 fpu coprocessor b10010 MIPS645Kf 17 mdu 002 MIPS32 MIPS64 5kf MIPS64
Not Available

Abstract: No abstract text available
Text: SM J34082 FLOATING POINT PROCESSOR SEPTEMBER 1969 Military Temperature Range: - 55°C to 125°C Operates as a SMJ34020 Floating Point Graphics Coprocessor or as a Standalone Floating Point Processor , PRODUCT PREVIEW SM J34082 FLOATING POINT PROCESSOR When used with SMJ34020, the SMJ34082 operates , Floating Point - 64-Bit Double-Precision Floating Point The SMJ34082 is a high-speed floating point , point addition, subtraction, multiplication, division, square root, and comparison. Floating point


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PDF J34082 SMJ34020 SMJ34082 40-MHz SMJ34082-40) 32-MHz SMJ34082-32) 64-Bit
1994 - R3000A

Abstract: functional diagram of ALU R3010A block alu IDT79R3081 R3081 2873 R3010A Integrated Device Technology CFC-1
Text: synchronously to the R3000A main processor . 6.1 2 R3010A RISC FLOATING POINT ACCELERATOR CORE 0 , R3010A Core RISC FLOATING POINT ACCELERATOR (FPA) CORE Integrated Device Technology, Inc , operation of independent floating point ALUs The R3010A Floating-Point Accelerator (FPA) operates in , Device Technology, Inc. 6.1 DSC-9039/5 1 R3010A RISC FLOATING POINT ACCELERATOR CORE , point divides can be overlapped with floating point multiplies and floating point additions. These


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PDF R3010A 50MHz R3000A 64-bit 32-bit R3010A functional diagram of ALU block alu IDT79R3081 R3081 2873 R3010A Integrated Device Technology CFC-1
2002 - AMD xp datasheet

Abstract: AMD Athlon 64 pin diagram pentium4 instruction set AMD Athlon 64 athlon xp powernow ATHLON XP amd athlon datasheet Athlon 64 Thoroughbred athlon amd Athlon xp mobile
Text: advanced floating point units(FPU) delivered in an x86 microprocessor. The mobile AMD Athlon XP processor , Microarchitecture Three separate execution units in the mobile AMD Athlon XP processor 's floating point pipeline , overall floating point instruction throughput. In comparison, the FPU of the Pentium 4 processor only , Athlon XP processor can do one floating point addition AND one multiplication per clock cycle, while the , integer, floating point , and 3D multimedia performance for applications running on x86-based platforms


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1995 - XDS510

Abstract: C2000TM C5000TM TMS320F206 Software DSPs TMDS00510PP TMS320TM Processor Guide digital video signal processor processor
Text: Signal Processor Fixed - Point Digital Signal Processor Fixed - Point Digital Signal Processor Floating - Point Digital Signal Processor Floating - Point Digital Signal Processor Floating - Point Digital Signal , Processor Digital Signal Processor Digital Signal Processor 16 - bit, 5V Fixed - Point DSP - 'NRND' (Not , Designs (NRND)] Fixed - Point Digital Signal Processor Fixed - Point Digital Signal Processor Fixed - Point Digital Signal Processor Fixed - Point Digital Signal Processor Fixed - Point Digital Signal


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PDF TMS320TM XDS510 XDS510, XDS510PP C5000TM C2000TM TMS320F206 Software DSPs TMDS00510PP Processor Guide digital video signal processor processor
1999 - 8088 assembly language manual

Abstract: intel 8086 8086 assembly language reference manual Intel 8088 programmers reference intel 286 8086 Programmers Reference Manual intel Programmers Reference Manual intel 8086 opcode sheet pic 8086 data sheet exception processing sequence
Text: the addition of the FERR# ( Floating point ERRor) and IGNNE# (IGNore Numeric Error) pins. The NE bit , versions. These Intel486 SX processors did not contain the floating point unit. Intel also produced Intel , Intel486 and Pentium processors, if the IGNNE# input is inactive, a floating point exception which , exception flags in the FPU status word before executing any floating point instructions that cannot complete execution when there is a pending floating point exception. Otherwise, the floating point


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1998 - fpu coprocessor

Abstract: 8087 coprocessor instruction set 8086 intel Programmers Reference Manual 8086 Programmers Reference Manual intel 286 interrupt & exception intel 8088 assembly language intel 286 Intel 487 SX
Text: of the NE bit in control register CR0 and the addition of the FERR# ( Floating point ERRor) and IGNNE , the floating point unit. Intel also produced Intel 487 SX processors for end users who later decided , # input is inactive, a floating point exception which occurred in the previous FPU instruction and is , exception flags in the FPU status word before executing any floating point instructions that cannot complete execution when there is a pending floating point exception. Otherwise, the floating point


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2000 - mda 2060

Abstract: um 100031 development trends in car manufacture mechanical engineering project Samsung svs 460GX Ansys led
Text: floating point performance · Overall system architecture performance and scaling · Economically viable high-performance computing (HPC) options The Itanium processor with its floating point , Itanium processor . Floating Point Performance Floating point performance equates to raw speed - how , processor with a balance of a memory operation per floating point operation. · A IDC Pipelined , use Unix-based systems because of floating point performance and larger addressable memory. This is


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PDF 00-347SYSTEM2763 mda 2060 um 100031 development trends in car manufacture mechanical engineering project Samsung svs 460GX Ansys led
specifications of tdr

Abstract: Inmos t805 IMS processor
Text: able to perform floating point opérations concurrently with the processor , sustaining a rate of 2.8 , able to perform floating point arithmetic concurrently with the central processor unit (CPU , ©cognition ■Artificial intelligence _1/71 February 1997 42 1440 07 Floating Point Unit System Services , 64 bit floating point unit and graphies support. It has4 Kbyteson-chip RAM for high speed processing , RefreshPending MemWait MemConfig MemReq MemGranted Floating Point Unit System Services Timers 4 Kbytes of


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PDF 32-bit specifications of tdr Inmos t805 IMS processor
1998 - intel ssd

Abstract: intel I860 processor Winograd 242690 Pentium Pro
Text: , which culminated in the first MP LINPACK run to exceed a rate of one trillion floating point operations , doing more floating point operations per second on a given application than any other general purpose , at 200 million floating point operations per second (MFLOPS), this supercomputer can theoretically run at over 1.8 trillion floating point operations per second (TFLOPS). An overview of what the , Address Unit Load Address Unit Integer ALU Floating Point /Integer Unit Up to three uops can be


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T801

Abstract: speedo meter N10E inmos transputer 2AF3 T801-20 T800 transputer TIN30 T800 w188
Text: Processor cycles are shown as Typical/Maximum cycles. Table 4.23 IMS T801 floating point general operation , 147 Table 4.24 IMS T801 floating point rounding operation codes Operation Memory Processor D Code , error F Table 4.26 IMS T801 floating point comparison operation codes Operation Memory Processor , type int64 F Processor cycles are shown as Typical/Maximum cycles. Table 4.27 IMS T801 floating point , floating point unit which conforms to IEEE 754 4 Kbytes on-chip static RAM 120 Mbytes/sec sustained data


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PDF MIL-STD-883C IMST801 T801-G20S T801-G25S T801-G30S T801-G20M T801 speedo meter N10E inmos transputer 2AF3 T801-20 T800 transputer TIN30 T800 w188
NFP-32

Abstract: No abstract text available
Text: Arithmetic Zero-Divide XX03 XX0216 4 Floating BitO Floating Overflow XX04XX0116 Point Bit 1 Floating , than the point of the fault • Save the current state of the processor and call a debug monitor When , fault-generation mechanism. Here, the processor allows work on a program to be resumed at the point where the fault , , although it may point to the faulting instruction. It is this instruction that the processor begins working , /SB processor . The subjects covered include the fault-handling data structures, the software support


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PDF 80960SA/SB Number16 NFP-32
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