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Text: NATIONAL SEMICOND (LOGIC) 31E D bSOllSa 0071177 7 100156 Semiconductor F100156 Mask-Merge/Latch General Description The F1001S6 merges two 4-bit words to form a 4-bit output word. The AMn enable allows the merge of A Into B by one, two or three places (per the ASn value) from the left. The BMn enable similarly allows the merge of B into A from the left (per the BSn value). The B merge overrides the A merge when both are enabled. This means A first merges Into B and B then merges into the A

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PDF F100156 F1001S6 to50112E
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