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Part Manufacturer Description Datasheet Download Buy Part
EP2SGX60CF780C3 Altera Corporation Field Programmable Gate Array, 60440 CLBs, 717MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, MS-034AAM-1, FBGA-780
EP2SGX60CF780C4 Altera Corporation Field Programmable Gate Array, 60440 CLBs, 717MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, MS-034AAM-1, FBGA-780
EP2SGX60CF780C5 Altera Corporation Field Programmable Gate Array, 60440 CLBs, 640MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, MS-034AAM-1, FBGA-780
EP2SGX60CF780C5N Altera Corporation Field Programmable Gate Array, 60440 CLBs, 640MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, LEAD FREE, MS-034AAM-1, FBGA-780
EP2SGX60CF780C3N Altera Corporation Field Programmable Gate Array, 60440 CLBs, 717MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, LEAD FREE, MS-034AAM-1, FBGA-780
EP2SGX60CF780C4N Altera Corporation Field Programmable Gate Array, 60440 CLBs, 717MHz, 60440-Cell, CMOS, PBGA780, 29 X 29 MM, 1 MM PITCH, LEAD FREE, MS-034AAM-1, FBGA-780
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EP2SGX60CF780C5N Altera Corporation Rochester Electronics 2 $986.61 $801.62

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EP2SGX60C datasheet (7)

Part Manufacturer Description Type PDF
EP2SGX60CF484I4 Altera Stratix II GX FPGAs; 484 pin FBGA; -40 to 100°C Original PDF
EP2SGX60CF780C3 Altera Stratix II GX FPGA 60K FPGA-780 Original PDF
EP2SGX60CF780C3N Altera Stratix II GX FPGA 60K FPGA-780 Original PDF
EP2SGX60CF780C4 Altera Stratix II GX FPGA 60K FPGA-780 Original PDF
EP2SGX60CF780C4N Altera Stratix II GX FPGA 60K FPGA-780 Original PDF
EP2SGX60CF780C5 Altera Stratix II GX FPGA 60K FPGA-780 Original PDF
EP2SGX60CF780C5N Altera Stratix II GX FPGA 60K FPGA-780 Original PDF

EP2SGX60C Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
780 AC

Abstract: gx 552 734 10 pins
Text: EP2SGX60C /D/E EP2SGX90E/F EP2SGX130/G Feature C ALMs C 13,552 Equivalent LEs , GX Device Features (Part 2 of 2) EP2SGX30C/D EP2SGX60C /D/E EP2SGX90E/F EP2SGX130/G , 4 31 29 361 - - EP2SGX60C 4 31 29 364 - - EP2SGX30D 8


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PDF SIIGX51001-1 780 AC gx 552 734 10 pins
2006 - EP1S

Abstract: EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
Text: 334 492 718 EP1S10 EP2SGX90F EP2SGX90E EP2SGX60E EP2SGX60C EP2SGX30C EP2S180 , 1.27 0.9 EP1S80 EP2SGX60C 17 ­ 1 1 7 ­ 1 1 EP1S60 EP2SGX30D 10 ­ 1 1 4 ­ , , -4, -5 EP2SGX60C 90,960 36,384 72,768 4,520 488 408 4 -3, -4, -5 EP2SGX30D 60,440


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PDF EP1SGX10C EP1SGX10D EP1SGX25C EP1SGX25D EP1S80 EP1S60 EP1S40 EP1S30 EP1SGX40G EP1S EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
Not Available

Abstract: No abstract text available
Text: Device Features (Part 1 of 2) EP2SGX30C/D EP2SGX60C /D/E EP2SGX90E/F EP2SGX130/G Feature C , , Volume 1 Features Table 1­1. Stratix II GX Device Features (Part 2 of 2) EP2SGX30C/D EP2SGX60C , -Pin FineLine BGA (40 mm) EP2SGX30C 4 31 29 361 EP2SGX60C 4 31 29 364


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PDF SIIGX51001-1
2007 - SFP LVDS altera

Abstract: DK-VIDEO-2SGX90N altera jtag ethernet Stratix II GX FPGA Development Board Reference Altera 6G FPGA Dev Kit SFP altera DK-PCIE-2SGX90N Altera - Quartus II JTAG CONNECTOR cyclone iii fpga fpga altera cyclone iv
Text: PLLs EP2SGX30C 4 33,880 1,369,728 64 4 EP2SGX60C 4 60,440 2,544,192 , 4 29 361 EP2SGX60C 4 29 364 EP2SGX30D 8 29 361 EP2SGX60D 8 29


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PDF SK-PCIE-2SGX90N DK-VIDEO-2SGX90N SFP LVDS altera DK-VIDEO-2SGX90N altera jtag ethernet Stratix II GX FPGA Development Board Reference Altera 6G FPGA Dev Kit SFP altera DK-PCIE-2SGX90N Altera - Quartus II JTAG CONNECTOR cyclone iii fpga fpga altera cyclone iv
2007 - Stratix II GX

Abstract: PCG-01001
Text: ) Transceiver signals GXB_RX[19.0] and GXB_TX[19.0] are device-specific. EP2SGX30C and EP2SGX60C each , . EP2SGX30C and EP2SGX60C each consists of 4 transceivers in Bank 13. EP2SGX30D and EP2SGX60D each consists , consists of 20 transceivers in Banks 13, 14, 15, 16, and 17. (4) EP2SGX30 and EP2SGX60C /D only have PLL(1 , differential TX/RX count for each device and package is different. EP2SGX30, EP2SGX60C and EP2SGX60D each , ], PLL12_OUT[1,0], PLL[12.11]_FBp/OUT2, VCC_PLL11_OUT, and VCC_PLL12_OUT. EP2SGX60C /D does not have the


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PDF PCG-01001-3 Stratix II GX PCG-01001
2007 - PT-EP2SGX60-1

Abstract: DM18T DM14T dm13
Text: No file text available


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PDF EP2SGX60 F1152) PT-EP2SGX60-1 EP2SGX60CF780 EP2SGX60DF780 PLL11 PLL12 EP2SGX60C EP2SGX60D DM18T DM14T dm13
2007 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF EP2SGX60 F1152) EP2SGX60CF780 EP2SGX60DF780 PLL11 PLL12 EP2SGX60C EP2SGX60D
2007 - DM30B

Abstract: DM44
Text: No file text available


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PDF PT-EP2SGX130-1 TX77p TX77n RX76p RX76n F1508) DM30B DM44
2007 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF PT-EP2SGX30-1 RX28p RX28n TX28p TX28n RX27p RX27n TX27p TX27n RX26p
EP2S180

Abstract: EP2S60 EP2S90 SSTL-18
Text: only in EP2SGX60C /D/E, EP2SGX90E/F, and EP2SGX130G. PLLs 7, 8, 11, and 12 are available only in EP2SGX60C /D/E, EP2SGXE/F, and EP2SGX130G. Altera Corporation January 2008 5­3 Stratix II Device , transceiver channels are vertically migratable to EP2SGX60CF780 devices with four transceiver channels , Stratix II GX devices. Figure 5­15. Fast PLL and LVDS/DPA Clock for EP2SGX30C/D and EP2SGX60C /D Devices


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PDF SII52005-2 EP2S180 EP2S60 EP2S90 SSTL-18
EP2S180

Abstract: EP2S60 EP2S90 SSTL-18
Text: EP2SGX60C /D/E, EP2SGX90E/F, and EP2SGX130G. PLLs 7, 8, 11, and 12 are available only in EP2SGX60C /D/E , channels are vertically migratable to EP2SGX60CF780 devices with four transceiver channels. EP2SGX30DF780 , Stratix II GX devices. Figure 5­14. Fast PLL & LVDS/DPA Clock for EP2SGX30C/D & EP2SGX60C /D Devices 4


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PDF SII52005-2 EP2S180 EP2S60 EP2S90 SSTL-18
dpa 118

Abstract: HSTL standards EP2S180 EP2S60 EP2S90 SSTL-18 SSTL standards
Text: only in EP2SGX60C /D/E, EP2SGX90E/F, and EP2SGX130G. PLLs 7, 8, 11, and 12 are available only in EP2SGX60C /D/E, EP2SGXE/F, and EP2SGX130G. Altera Corporation October 2007 11­3 Stratix II GX Device , EP2SGX60CF780 devices with four transceiver channels. EP2SGX30DF780 devices with eight transceiver channels are , EP2SGX60C /D Devices 4 LVDS Clock DPA Clock Quadrant Quadrant 4 2 2 Fast PLL 1


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PDF SII52005-2 dpa 118 HSTL standards EP2S180 EP2S60 EP2S90 SSTL-18 SSTL standards
2007 - DM25L

Abstract: 12AT6
Text: No file text available


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PDF PT-EP2SGX130-1 TX77p TX77n RX76p RX76n F1508) DM25L 12AT6
2007 - Not Available

Abstract: No abstract text available
Text: No file text available


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PDF PT-EP2SGX30-1 RX28p RX28n TX28p TX28n RX27p RX27n TX27p TX27n RX26p
2005 - hd-SDI deserializer LVDS

Abstract: SDI INTERFACE hd-SDI SDI SERIALIZER lvds 1080p
Text: Transceiver Channels Device EP2SGX30C 4 EP2SGX30D 8 EP2SGX60C 8 EP2SGX60E 12


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2007 - DM25L

Abstract: aj29 diode ap13 diode
Text: No file text available


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PDF PT-EP2SGX90-1 F1152) F1508 DM25L aj29 diode ap13 diode
2007 - DM21B

Abstract: AH-39
Text: No file text available


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PDF PT-EP2SGX90-1 F1152) F1508 DM21B AH-39
2008 - EPCS16

Abstract: epcs128 1064V
Text: EP2SGX60C EP2SGX60D Data Size (Bits) (1) 22,178,792 22,178,792 47,413,312 47,413,312 93,324,656 117,384,664


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PDF CF52001-2 EPC16, 20ction. EPCS16 EPCS64 epcs128 1064V
EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90 fir filter applications
Text: EP2SGX30C EP2SGX30D 16 128 64 16 EP2SGX60C EP2SGX60D EP2SGX60E 36 288 144 36 , ), (4) EP2SGX30C EP2SGX30D 64 189 253 (3.95) EP2SGX60C EP2SGX60D EP2SGX60E 144


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PDF SII52006-2 CDMA2000, EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 fir filter applications
full subtractor implementation using multiplexer

Abstract: datasheet for full adder and half adder EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Text: Multipliers EP2SGX30C EP2SGX30D 16 128 64 16 EP2SGX60C EP2SGX60D EP2SGX60E 36 288 , Multipliers (3), (4) EP2SGX30C EP2SGX30D 64 189 253 (3.95) EP2SGX60C EP2SGX60D EP2SGX60E


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5 bit multiplier using adders

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Text: EP2SGX30C EP2SGX30D 16 128 64 16 EP2SGX60C EP2SGX60D EP2SGX60E 36 288 144 36 , (3), (4) EP2SGX30C EP2SGX30D 64 189 253 (3.95) EP2SGX60C EP2SGX60D EP2SGX60E 144


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PDF SII52006-2 CDMA2000, 5 bit multiplier using adders EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
full subtractor implementation using multiplexer

Abstract: 5 bit multiplier using adders EP2S60 EP2S90 EP2S15 EP2S180 EP2S30
Text: EP2SGX30C EP2SGX30D 16 128 64 16 EP2SGX60C EP2SGX60D EP2SGX60E 36 288 144 36 , (3), (4) EP2SGX30C EP2SGX30D 64 189 253 (3.95) EP2SGX60C EP2SGX60D EP2SGX60E 144


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HSTL standards

Abstract: 15-V SSTL-18
Text: banks. Banks 11 and 12 are available only in EP2SGX60C /D/E, EP2SGX90E/F, and EP2SGX130G. PLLs 7,8,11, and 12 are available only in EP2SGX60C /D/E, EP2SGXE/F, and EP2SGX130G. Altera Corporation October


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full subtractor implementation using multiplexer

Abstract: half subtractor EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 12 bits subtractor
Text: Multipliers EP2SGX30C EP2SGX30D 16 128 64 16 EP2SGX60C EP2SGX60D EP2SGX60E 36 288 , Multipliers (3), (4) EP2SGX30C EP2SGX30D 64 189 253 (3.95) EP2SGX60C EP2SGX60D EP2SGX60E


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SSTL "on-chip termination" 1998

Abstract: 15-V SSTL-18 DDR2 SDRAM sstl_18 HSTL standards
Text: and 12 are available only in EP2SGX60C /D/E, EP2SGX90E/F, and EP2SGX130G. PLLs 7,8,11, and 12 are available only in EP2SGX60C /D/E, EP2SGXE/F, and EP2SGX130G. Altera Corporation May 2007 4­21 Stratix


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