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Altera Corporation
EP2S60F1020C5
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Rochester Electronics EP2S60F1020C5 3 1 $1014.04 $1014.04 $902.91 $823.91 $823.91 Buy Now
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Altera Corporation
EP2S60F484C5
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Altera Corporation
EP2S60F1020I4
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Altera Corporation
EP2S60F1020C4N
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Altera Corporation
EP2S60F1020C3
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Altera Corporation
EP2S60F484I4
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Altera Corporation
EP2S60F672I4N
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Altera Corporation
EP2S60F484C3N
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Altera Corporation
EP2S60F1020C5N
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Altera Corporation
EP2S60F484I4N
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Altera Corporation
EP2S60F1020C3N
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Altera Corporation
EP2S60F672C5N
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Altera Corporation
EP2S60F1020C4ES
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Altera Corporation
EP2S60F484C4
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Altera Corporation
EP2S60F1020I4-TSTDTS
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Altera Corporation
EP2S60F1020C-5N
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Altera Corporation
EP2S60F672I4
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Altera Corporation
EP2S60F484C4N
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Altera Corporation
EP2S60F484C3
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Altera Corporation
EP2S60F1020I4N
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Altera Corporation
EP2S60F484C5N
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Altera Corporation
EP2S60F672C3N Field Programmable Gate Array, 24176 CLBs, 717MHz, 60440-Cell, CMOS, PBGA672
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Altera Corporation
EP2S60F484C3ES
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Altera Corporation
EP2S60F1020C4 INSTOCK
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Chip 1 Exchange EP2S60F1020C4 16 - - - - - Get Quote

EP2S60 datasheet (24)

Part Manufacturer Description Type PDF
EP2S60F1020C3 Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020C3N Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020C4 Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020C4N Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020C5 Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020C5N Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020I4 Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F1020I4N Altera Stratix II FPGA 60K FBGA-1020 Original PDF
EP2S60F484C3 Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484C3N Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484C4 Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484C4N Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484C5 Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484C5N Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484I4 Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F484I4N Altera Stratix II FPGA 60K FBGA-484 Original PDF
EP2S60F672C3 Altera Stratix II FPGA 60K FBGA-672 Original PDF
EP2S60F672C3N Altera Stratix II FPGA 60K FBGA-672 Original PDF
EP2S60F672C4 Altera Stratix II FPGA 60K FBGA-672 Original PDF
EP2S60F672C4N Altera Stratix II FPGA 60K FBGA-672 Original PDF

EP2S60 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2006 - EP2S130 errata

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 EP2S60ES
Text: other port is greater than 5 ns. (2) M-RAM blocks may exhibit write enable issues. EP2S60 ES devices EP2S60 Production devices M-RAM blocks do not support the byte enable feature. EP2S60 ES devices EP2S60 Production devices Four user I/O pins exhibit higher than specified pin current under certain conditions. EP2S60 ES devices EP2S60 Production devices The PORSEL setting of 12 ms requires a shorter maximum VCCINT ramp-up time. EP2S60 ES devices EP2S60 Production devices Notes to


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PDF EP2S60 EP2S130 errata EP2S15 EP2S180 EP2S30 EP2S90 EP2S60ES
2008 - EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90 fpga stratix II ep2s180 Stratix II EP2S60
Text: write enable issues. EP2S60 ES devices EP2S60 Production devices M-RAM blocks do not support the byte enable feature. EP2S60 ES devices EP2S60 Production devices Four user I/O pins exhibit higher than specified pin current under certain conditions. EP2S60 ES devices EP2S60 Production devices The PORSEL setting of 12 ms requires a shorter maximum VCCINT ramp-up time. EP2S60 ES devices EP2S60 Production devices Notes to Table 1: (1) (2) EP2S130 and EP2S180 devices were


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2005 - Stratix II EP2S60

Abstract: programmer EPLD nios2 2s60 rohs 2S60 EP2S60 DSP2S60 altera board
Text: version 1.1.0 of the Stratix II EP2S60 DSP Development Board Data Sheet. Stratix II EP2S60ES Devices , . "The Write2Flash Utility, Referenced by the Stratix II EP2S60 DSP Development Board Data Sheet, Is Not , , Not DC Coupled as the Stratix II EP2S60 DSP Development Board Data Sheet Indicates" on page 5. 5. "Stratix II EP2S60ES Devices Do Not Support MRAM Byte Enables" on page 5. 6. Altera Corporation ES , the Stratix II EP2S60 DSP Development Board Data Sheet, Is Not on the Kit CD-ROM In the Stratix II


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EP2S15

Abstract: EP2S180 EP2S30 EP2S60 EP2S90
Text: EP2S60 EP2S90 EP2S130 EP2S180 ALMs 6,240 13,552 24,176 36,384 53,016 71,760 , 1,126 1,170 500 EP2S60 (3) 1,508-Pin FineLine BGA 366 342 758 742 342 , counts for the EP2S60 , EP2S90, EP2S130, and EP2S180 devices in the 1020-pin and 1508-pin packages , EP2S15, EP2S30, and EP2S60 devices in the 672-pin FineLine BGA package). Vertical migration means that , EP2S30 0 (1) 0 EP2S15 to EP2S60 8 (1) 0 EP2S30 to EP2S60 8 (1) 780-Pin FineLine


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PDF SII51001-4 90-nm, 18-bit 18-bit) EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
2005 - fairchild Ah7

Abstract: T25 8PIN altera stratix ii ep2s60 circuit diagram fairchild AG12 diode EP2S60 pinout fairchild aa26 mini USB B 8pin EP2S60 BGA pinout diagram Stratix II EP2S60 L16 8pin
Text: Stratix II EP2S60 DSP Development Board Data Sheet May 2005 Features The Stratix® II EP2S60 DSP development board is included with the DSP Development Kit, Stratix II Edition (ordering code , ) designs, and features the Stratix II EP2S60 device in a 1020-pin package. Components , Preliminary Stratix II EP2S60 DSP Development Board Data Sheet Debugging Interfaces One , connectors The Stratix II EP2S60 DSP development board provides a hardware platform that designers can


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PDF EP2S60 DSP-DEVKIT-2S60) 1020-pin DS-S29804-1 12-bit 125-MHz 14-bit 165-MHz fairchild Ah7 T25 8PIN altera stratix ii ep2s60 circuit diagram fairchild AG12 diode EP2S60 pinout fairchild aa26 mini USB B 8pin EP2S60 BGA pinout diagram Stratix II EP2S60 L16 8pin
2004 - TR9KT3750LCP-Y

Abstract: LAN91C111-NE SEVEN SEGMENT DISPLAY PDF FILE 8PIN DSP-DEVKIT-2S60 AC744 EP2S60 BGA pinout diagram EPM7256ETC144 ECS-UPO GlobTek connector cross reference
Text: EP2S60F1020C4 device. Table 6. Stratix II Device Features Feature EP2S60F1020 ALMs 24,176 , Stratix II EP2S60 DSP Development Board Data Sheet DS-S29804 Features The Stratix® II EP2S60 DSP development board is included with the DSP Development Kit, Stratix II Edition (ordering code , ) designs, and features the Stratix II EP2S60 device in a 1020-pin package. Components , Preliminary Stratix II EP2S60 DSP Development Board Data Sheet Debugging Interfaces One


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PDF EP2S60 DS-S29804 DSP-DEVKIT-2S60) 1020-pin 12-bit 125-MHz 14-bit 165-MHz TR9KT3750LCP-Y LAN91C111-NE SEVEN SEGMENT DISPLAY PDF FILE 8PIN DSP-DEVKIT-2S60 AC744 EP2S60 BGA pinout diagram EPM7256ETC144 ECS-UPO GlobTek connector cross reference
2005 - 2s60

Abstract: nios2 2s60 rohs programmer EPLD EP2S60 Stratix II EP2S60 altera board
Text: EP2S60 DSP Development Board Data Sheet, Is Not On the Kit CD-ROM" on page 3. When Using the Quartus , component files. The Write2Flash Utility, Referenced by the Stratix II EP2S60 DSP Development Board Data Sheet, Is Not On the Kit CD-ROM In the Stratix II EP2S60 DSP Development Board Data Sheet, in the , versions 1.0 and 1.1 of the Stratix II EP2S60 DSP Development Board Data Sheet. Design Impact There is , Status Future releases of this kit will correct the Stratix II EP2S60 DSP Development Board Data Sheet


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2007 - AA23

Abstract: EP2S60 HC220
Text: Pin Information for HardCopy® II HC220 / Stratix® II EP2S60 F672 Companion Devices Version 1.1 , M26 Page 1 of 15 Pin Information for HardCopy® II HC220 / Stratix® II EP2S60 F672 Companion , Information for HardCopy® II HC220 / Stratix® II EP2S60 F672 Companion Devices Version 1.1 Bank Number VREF , / Stratix® II EP2S60 F672 Companion Devices Version 1.1 Bank Number VREF Group Pin Name/Function B8 , EP2S60 F672 Companion Devices Version 1.1 Bank Number VREF Group Pin Name/Function B7 B7 B7 B7


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PDF HC220 EP2S60 PT-HCS208-1 Grou/05. AA23 EP2S60
2007 - PT-HCS210-1

Abstract: Stratix II EP2S60 EP2S60 pin diagram HC210 AA19 EP2S60
Text: Pin Information for HardCopy® II HC210 / Stratix® II EP2S60 F484 Companion Devices Version 1.1 , Information for HardCopy® II HC210 / Stratix® II EP2S60 F484 Companion Devices Version 1.1 Bank Number VREF , / Stratix® II EP2S60 F484 Companion Devices Version 1.1 Bank Number VREF Group Pin Name/Function B8 , HC210 / Stratix® II EP2S60 F484 Companion Devices Version 1.1 Bank Number VREF Group Pin Name , Information for HardCopy® II HC210 / Stratix® II EP2S60 F484 Companion Devices Version 1.1 Bank Number VREF


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PDF HC210 EP2S60 PT-HCS210-1 Functio/05. Stratix II EP2S60 EP2S60 pin diagram AA19 EP2S60
2007 - DM20R

Abstract: DQ16L3 F1020 EP2S60 DM24R dm18r Stratix II EP2S60 DM15B DM25L
Text: Pin Information for the Stratix® II EP2S60 Device Version 2.1 (Note 1) B2 B2 B2 B2 B2 B2 , F18 C22 C21 E20 E19 D22 D21 F20 F19 EP2S60 Pin List DQ21L0 Page 1 of 23 Pin Information for the Stratix® II EP2S60 Device Version 2.1 (Note 1) PT-EP2S60-2.1.xls Copyright © 2007 , DQ18L2 EP2S60 Pin List DQ6L0 DQ6L1 DQ19L0 DQ19L1 DQS6L DQ6L2 DQS19L DQ19L2 DQ4L3 DQ5L0 , DQS8L DQ8L2 Page 2 of 23 Pin Information for the Stratix® II EP2S60 Device Version 2.1 (Note 1


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PDF EP2S60 PLL11/12 DM20R DQ16L3 F1020 DM24R dm18r Stratix II EP2S60 DM15B DM25L
2005 - altera jtag ii

Abstract: 2S60 EP2S60 Stratix II EP2S60
Text: Have an M-RAM Problem When Using Byte Enables Stratix II EP2S60 ES devices have a silicon problem , instantiate an M-RAM block with byte enables in designs targeting EP2S60 ES devices. Affected , blocks in Stratix II EP2S60 ES devices. Workaround Stratix II production devices (non-ES) support


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bga 529

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 fpga stratix II ep2s180
Text: . Stratix II FPGA Family Features Feature EP2S15 EP2S30 EP2S60 EP2S90 EP2S130 EP2S180 , , EP2S30, and EP2S60 devices in the 672-pin FineLine BGA package). Vertical migration means that designers , EP2S15 342 342 334 1,020-Pin FineLine BGA 1,508-Pin FineLine BGA 500 EP2S60 (2) 780 , , clk9n, clk11p, and clk11n) that can be used for data inputs. The I/O pin counts for the EP2S60 , EP2S90 , EP2S15 -3, -4, -5 -3, -4, -5 EP2S30 -3, -4, -5 -3, -4, -5 EP2S60 -3, -4, -5


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PDF SII51001-1 90-nm, 18-bit 18-bit) 484-Pin 672-Pin 780-Pin 020-Pin 508-Pin bga 529 EP2S15 EP2S180 EP2S30 EP2S60 EP2S90 fpga stratix II ep2s180
2007 - EP2S60 diagram

Abstract: AA19 EP2S60 Stratix II EP2S60
Text: Pin Information for HardCopy® II HC210W / Stratix® II EP2S60 F484 Companion Devices Version 1.0 , EP2S60 F484 Companion Devices Version 1.0 Bank Number VREF Group Pin Name/Function B1 B1 B1 B1 , EP2S60 F484 Companion Devices Version 1.0 Bank Number VREF Group Pin Name/Function B8 B8 B8 B8 , ® II HC210W / Stratix® II EP2S60 F484 Companion Devices Version 1.0 Bank Number VREF Group Pin Name , Information for HardCopy® II HC210W / Stratix® II EP2S60 F484 Companion Devices Version 1.0 Bank Number


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PDF HC210W EP2S60 PT-HCS213-1 EP2S60 diagram AA19 EP2S60 Stratix II EP2S60
2006 - "diagram of motherboard"

Abstract: circuit diagram of motherboard motherboard diagram motherboard PCB diagram 78d05al
Text: current is 2.6A. ( 1.3A for EP2S60 , 2.6A for EP2S180 ) VCC33: Generate form DC to DC circuit. The maximum value for this current is 10A. ( 3A for EP2S60 , 10A for EP2S180 ) VCC18: Generate form linear , support@terasic.com for detailed BOM information if you cannot find For EP2S60 (v1.2 PCB) Component Manufacturer , -135-32-L-D-LC J1~J12 Type For EP2S60 and EP2S180 (v1.3 PCB) Component Manufacturer Vender Part Number


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PDF 2S180 78D05AL LTM6400EV AME1117ECCTZ MAX232CSET 21218/4PNE 3SWO-AT-50 TFC-135-32-L-D-LC "diagram of motherboard" circuit diagram of motherboard motherboard diagram motherboard PCB diagram 78d05al
2006 - EP1S

Abstract: EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
Text: EP2S130 342 500 362 EP2S60 FineLine BGA® (F) 484-Pin FBGA (FlipChip) 342 672-Pin FBGA , Stratix GX (1.5 V) High Density, High Performance EP2S60 Stratix (1.5 V) 6.375 , ) EP2S60 6.375-Gbps Transceivers EP2S30 Stratix II GX (1.2 V) EP2S15 Stratix II (1.2 V , ), 1.5-V HSTL (I & II), 1.8-V HSTL (I & II), PCI, PCI-X 1.0, LVTTL, LVCMOS 19/21 ­ EP2S30 EP2S60 , EP2S60 EP2S90 EP2S60 EP2S90 EP2S130 EP2S90 EP2S130 EP2S180 EP2S180 78/78 ­


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PDF EP1SGX10C EP1SGX10D EP1SGX25C EP1SGX25D EP1S80 EP1S60 EP1S40 EP1S30 EP1SGX40G EP1S EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
2005 - altera jtag ii

Abstract: EP2S60 2S60 DAC904 Stratix II EP2S60 altera stratix II fpga altera board
Text: M-RAM Problem When Using Byte Enables Stratix II EP2S60 ES devices have a silicon problem that , M-RAM block with byte enables in designs targeting EP2S60 ES devices. Affected Configurations , Stratix II EP2S60 ES devices. Workaround Stratix II production devices (non-ES) support M-RAM byte


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2003 - bga 529

Abstract: EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
Text: . Stratix II FPGA Family Features Feature EP2S15 EP2S30 EP2S60 EP2S90 EP2S130 EP2S180 , same package (e.g., the designer can migrate between the EP2S15, EP2S30, and EP2S60 devices in the 672 , 341 499 EP2S60 (2) 1­4 Preliminary Note (1) 341 499 717 Altera Corporation , EP2S60 , EP2S90, EP2S130, and EP2S180 devices include eight dedicated fast PLL clock inputs (FPLL7CLKp/n , -Pin FineLine BGA -3, -4, -5 EP2S60 1,020-Pin FineLine BGA -3, -4, -5 EP2S90 -3, -4, -5 -3


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PDF SII51001-1 90-nm, 18-bit 18-bit) EP2S15 484-Pin 672-Pin EP2S30 508-Pin EP2S60 bga 529 EP2S15 EP2S180 EP2S30 EP2S60 EP2S90
2005 - an363

Abstract: ADC AD94338 Stratix II EP2S60 SLP-50 how to test fft megacore Filter Noise matlab EP2S60 AN364 DSP Users Guide AD94338
Text: describes how to install the software provided with the kit, how to connect the Stratix II EP2S60 DSP , : The Stratix II EP2S60 DSP development board-a prototyping platform that allows you to develop high-performance DSP designs. Key features of the board include a Stratix II EP2S60 device, high-speed , Devices evaluation boards. Refer to the Stratix II EP2S60 Development Board Data Sheet for specific , documentation, board schematics, the Stratix II EP2S60 DSP Development Board Data Sheet, and this user guide


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PDF P25-10535-01 12-bit an363 ADC AD94338 Stratix II EP2S60 SLP-50 how to test fft megacore Filter Noise matlab EP2S60 AN364 DSP Users Guide AD94338
2005 - 180NM cmos process parameters

Abstract: Virtex-4 thermal resistance what the difference between the spartan and virtex VIRTEX 4 LX200 Stratix II EP2S60 LX200 EP2S60 EP2S180 8192X6 DSP48
Text: EP2S60 device and the other with a Virtex-4 LX60 device. The two board halves are identically designed , each device are matched in length to allow for accurate I/O power comparisons. Figure 2. EP2S60 & , Dynamic Power (mW/MHz) Design Stratix II EP2S60 16-State FSM Gray Counter Crossbar 3DES FM Radio , Measured Dynamic Power (mW/MHz) Stratix II EP2S60 Virtex-4 LX60 Stratix II to Virtex-4 Power , (Depth × Width) Hardware Measured Dynamic Power (mW/MHz) Stratix II EP2S60 Virtex-4 LX60


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1995 - EP2S60F1020C5N

Abstract: EP2S30F672I4 EP2S130F1020C3N EP2S60F672I4N EP2S30F484I4 EP2S30F672C5N ep2S30F672C4N
Text: ,552 27,104 33,880 202 144 1 1,369,728 16 64 2 4 500 EP2S60 24,176 48,352 60,440 329 255 2 2,544 , Device 484-Pin Hybrid FineLine BGA 672-Pin FineLine BGA 366 500 492 EP2S15 EP2S30 EP2S60 (3 , PLL_ENA pin can only be used to enable the PLLs within the device. The I/O pin counts for the EP2S60 , migrate between the EP2S15, EP2S30, and EP2S60 devices in the 672-pin FineLine BGA package). Vertical , Migration Path EP2S15 to EP2S30 EP2S15 to EP2S60 EP2S30 to EP2S60 EP2S60 to EP2S90 EP2S60 to EP2S130 EP2S60


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PDF Strat2S180F1020C5 EP2S180F1020C5N EP2S180F1508C3 EP2S180 EP2S180F1508C3N EP2S180F1508C4 EP2S180F1508C4N EP2S180F1508C5 EP2S180F1508C5N EP2S180F1020I4 EP2S60F1020C5N EP2S30F672I4 EP2S130F1020C3N EP2S60F672I4N EP2S30F484I4 EP2S30F672C5N ep2S30F672C4N
74HC230

Abstract: HC210 HC240 HC230 HC220 EP2S90 EP2S60 EP2S30 EP2S180 BGA-614
Text: HC210 HC220 HC220 HC230 HC240 HC240 EP2S30 EP2S60 EP2S90(2) EP2S60 EP2S90 , 484-pin FineLine BGA HC210 EP2S60 484-pin Hybrid FineLine BGA HC210 EP2S90(2) 672-pin FineLine BGA HC220 EP2S60 780-pin FineLine BGA HC220 EP2S90 780-pin FineLine BGA HC220 , -pin FineLine BGA 13,552 360K 334 144 0 663,552 64 4 EP2S60 HC210 484 , -pin FineLine BGA 36,384 1M 308 190 0 875,520 192 4 EP2S60 HC220 672


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PDF H51024-1 90-nm 74HC230 HC210 HC240 HC230 HC220 EP2S90 EP2S60 EP2S30 EP2S180 BGA-614
EP2S90

Abstract: HC210 Stratix II EP2S60 HC220 HC230 HC240 EP2S180 EP2S30 EP2S60
Text: HC210 HC220 HC220 HC230 HC240 HC240 EP2S30 EP2S60 EP2S90(2) EP2S60 EP2S90 , 484-pin FineLine BGA HC210 EP2S60 484-pin Hybrid FineLine BGA HC210 EP2S90(2) 672-pin FineLine BGA HC220 EP2S60 780-pin FineLine BGA HC220 EP2S90 780-pin FineLine BGA HC220 , BGA 13,552 360K 334 144 0 663,552 64 4 EP2S60 HC210 484-pin FineLine , BGA 36,384 1M 308 190 0 875,520 192 4 EP2S60 HC220 672-pin FineLine


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PDF H51024-1 90-nm EP2S90 HC210 Stratix II EP2S60 HC220 HC230 HC240 EP2S180 EP2S30 EP2S60
2005 - EP2S60F

Abstract: OV 5642 27631 VHDL fpga stratix II ep2s180
Text: ,552 27,104 33,880 202 144 1 1,369,728 16 64 2 4 500 EP2S60 24,176 48,352 60,440 329 255 2 2,544 , EP2S60 (3) EP2S90 (3) EP2S130 (3) EP2S180 (3) Notes to Table 1­2: (1) (2) (3) 718 534 534 758 742 742 , EP2S60 , EP2S90, EP2S130, and EP2S180 devices in the 1020-pin and 1508-pin packages include eight , , EP2S30, and EP2S60 devices in the 672-pin FineLine BGA package). Vertical migration means that you can , EP2S60 EP2S30 to EP2S60 EP2S60 to EP2S90 EP2S60 to EP2S130 EP2S60 to EP2S180 EP2S90 to EP2S130 EP2S90 to


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2006 - 8 bit Array multiplier code in VERILOG

Abstract: No abstract text available
Text: ,369,728 16 64 2 4 500 EP2S60 24,176 48,352 60,440 329 255 2 2,544,192 36 144 4 8 718 EP2S90 36 , FineLine BGA 672-Pin FineLine BGA 366 500 492 EP2S15 EP2S30 EP2S60 (3) EP2S90 (3) EP2S130 (3 , enable the PLLs within the device. The I/O pin counts for the EP2S60 , EP2S90, EP2S130, and EP2S180 , EP2S60 devices in the 672-pin FineLine BGA package). Vertical migration means that you can migrate to , to EP2S60 EP2S30 to EP2S60 EP2S60 to EP2S90 EP2S60 to EP2S130 EP2S60 to EP2S180 EP2S90 to EP2S130


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2009 - General Electric Semiconductor Data Handbook

Abstract: Datasheet Library 1979 D 1609 VO A1 S 1854 toggle switches 2041 BY sensor 3414 ddr2 800 d 1878 DATA SHEET CMOS applications handbook class 10 up board Datasheet 2012
Text: EP2S60 EP2S90 EP2S130 EP2S180 ALMs 6,240 13,552 24,176 36,384 53,016 71,760 , -Pin FineLine BGA 500 EP2S60 (3) 780-Pin FineLine BGA 366 EP2S30 Notes (1), (2) EP2S90 (3 , counts for the EP2S60 , EP2S90, EP2S130, and EP2S180 devices in the 1020-pin and 1508-pin packages , EP2S15, EP2S30, and EP2S60 devices in the 672-pin FineLine BGA package). Vertical migration means that , EP2S30 0 (1) 0 EP2S15 to EP2S60 8 (1) 0 EP2S30 to EP2S60 8 (1) 780-Pin FineLine


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