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Part Manufacturer Description Datasheet Download Buy Part
EP1S80F1508C7N Altera Corporation Field Programmable Gate Array, 9191 CLBs, 79040-Cell, CMOS, PBGA1508, 40 X 40 MM, 1 MM PITCH, LEAD FREE, FBGA-1508
EP1S80B956C6 Altera Corporation Field Programmable Gate Array, 9191 CLBs, 79040-Cell, CMOS, PBGA956, 40 X 40 MM, 1.27 MM PITCH, BGA-956
EP1S80F1020I7 Altera Corporation Field Programmable Gate Array, 79040-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020
EP1S80B956C7N Altera Corporation Field Programmable Gate Array, 9191 CLBs, 79040-Cell, CMOS, PBGA956, 40 X 40 MM, 1.27 MM PITCH, LEAD FREE, BGA-956
EP1S80B956C7 Altera Corporation Field Programmable Gate Array, 9191 CLBs, 79040-Cell, CMOS, PBGA956, 40 X 40 MM, 1.27 MM PITCH, BGA-956
EP1S80F1020C5 Altera Corporation Field Programmable Gate Array, 9191 CLBs, 79040-Cell, CMOS, PBGA1020, 33 X 33 MM, 1 MM PITCH, FBGA-1020
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Part Manufacturer Supplier Stock Best Price Price Each Buy Part
EP1S80B956C6 Altera Corporation Rochester Electronics 19 $9064.49 $7364.90
EP1S80B956C6 Altera Corporation ComS.I.T. 2 - -
EP1S80B956C6AB Altera Corporation Chip1Stop 7 $3566.87 $3566.87
EP1S80B956C6N Altera Corporation Rochester Electronics 1 $8240.45 $6695.37
EP1S80B956C7 Altera Corporation Rochester Electronics 142 $6474.97 $5260.91
EP1S80F1020C5 Altera Corporation Rochester Electronics 185 $12551.55 $10198.13
EP1S80F1020C5 Altera Corporation ComS.I.T. 4 - -
EP1S80F1020C6 Altera Corporation ComS.I.T. 1 - -
EP1S80F1020C6 Altera Corporation Bristol Electronics 3 $4720.80 $4091.52
EP1S80F1020C7 Altera Corporation Rochester Electronics 2,913 $6275.77 $5099.06
EP1S80F1020C7 Altera Corporation Bristol Electronics 6 $4720.80 $3469.79
EP1S80F1508C5 Altera Corporation Bristol Electronics 4 - -
EP1S80F1508C5N Altera Corporation ComS.I.T. 1 - -
EP1S80F1508C5N Altera Corporation Rochester Electronics 9 $11772.67 $9565.29
EP1S80F1508C6 Altera Corporation ComS.I.T. 2 - -
EP1S80F1508C6 Altera Corporation Rochester Electronics 3 $9064.49 $7364.90
EP1S80F1508C6N Altera Corporation ComS.I.T. 3 - -
EP1S80F1508I7N Altera Corporation Rochester Electronics 72 $8240.45 $6695.37

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EP1S80 datasheet (70)

Part Manufacturer Description Type PDF
EP1S80B1508C5ES Altera Stratix family of FPGAs Original PDF
EP1S80B1508C6ES Altera Stratix family of FPGAs Original PDF
EP1S80B1508C7ES Altera Stratix family of FPGAs Original PDF
EP1S80B1508I5ES Altera Stratix family of FPGAs Original PDF
EP1S80B1508I6ES Altera Stratix family of FPGAs Original PDF
EP1S80B1508I7ES Altera Stratix family of FPGAs Original PDF
EP1S80B956C5 Altera Programmable Logic Device Original PDF
EP1S80B956C6 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 683 I/O 956BGA Original PDF
EP1S80B956C6 Altera Programmable Logic Device Original PDF
EP1S80B956C6 Altera Stratix FPGA 80K BGA-956 Original PDF
EP1S80B956C6N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 683 I/O 956BGA Original PDF
EP1S80B956C6N Altera Stratix FPGA 80K BGA-956 Original PDF
EP1S80B956C7 Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 683 I/O 956BGA Original PDF
EP1S80B956C7 Altera Programmable Logic Device Original PDF
EP1S80B956C7 Altera Stratix FPGA 80K BGA-956 Original PDF
EP1S80B956C7N Altera Embedded - FPGAs (Field Programmable Gate Array), Integrated Circuits (ICs), IC FPGA 683 I/O 956BGA Original PDF
EP1S80B956C7N Altera Stratix FPGAs; 956 pin BGA; 0 to 85°C Original PDF
EP1S80B956I5 Altera Programmable Logic Device Original PDF
EP1S80B956I6 Altera Programmable Logic Device Original PDF
EP1S80B956I7 Altera Programmable Logic Device Original PDF

EP1S80 Datasheets Context Search

Catalog Datasheet MFG & Type PDF Document Tags
2004 - 7_seven segment

Abstract: circuit diagram for seven segment display in fpga EP1S80B956C6 mictor connector board data Seven Segment Display texas instruments TID14 - 45 IOU21 Mictor pinout evm for a seven segment display altera board
Text: ) Feature Logic elements (LEs) EP1S80B956-6 79,040 M512 RAM Blocks (32 × 18 bits) 767 M4K RAM , Functional Description Table 3. Stratix Device Features (Part 2 of 2) Feature EP1S80B956-6 Maximum , Stratix EP1S80 DSP Development Board Data Sheet December 2004, ver. 1.3 Features The Stratix® EP1S80 DSP development board is included with the DSP Development Kit, Stratix Professional , processing (DSP) designs, and features the Stratix EP1S80 device in the speed grade (-6) 956-pin package


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PDF EP1S80 DSP-BOARD/S80) EP1S80 956-pin 12-bit 125-MHz 14-bit 165-MHz 36-bit 7_seven segment circuit diagram for seven segment display in fpga EP1S80B956C6 mictor connector board data Seven Segment Display texas instruments TID14 - 45 IOU21 Mictor pinout evm for a seven segment display altera board
2002 - p20n20

Abstract: AU-25
Text: Pin Information For The StratixTM EP1S80 Device, ver 3.0 Bank Number VREF Bank Pin Name/Function , Corp. Pin List Page 1 of 51 Pin Information For The StratixTM EP1S80 Device, ver 3.0 Bank , Copyright © 2002 Altera Corp. Pin List Page 2 of 51 Pin Information For The StratixTM EP1S80 , Pin Information For The StratixTM EP1S80 Device, ver 3.0 Bank Number B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 B2 , List Page 4 of 51 Pin Information For The StratixTM EP1S80 Device, ver 3.0 Bank Number B2 B2 B2


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PDF EP1S80 F1508 F1923 PLL10 PLL10 EP1S80 p20n20 AU-25
2004 - AN-245

Abstract: SLP-50 simulink altera board
Text: the cables to the Stratix EP1S25 DSP development board and to the Stratix EP1S80 DSP development , DSP development kits include: The Stratix EP1S25 DSP development board or the Stratix EP1S80 DSP development board-The Stratix EP1S25 development board and the Stratix EP1S80 DSP development board are , boards include a Stratix EP1S25 or EP1S80 device, high-speed analog-to-digital (A/D) and , For more information, see the Stratix EP1S25 Development Board Data Sheet or the Stratix EP1S80


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PDF P25-08743-04 EP1S80 AN-245 SLP-50 simulink altera board
2006 - SB5B5

Abstract: diode t25 4 L5 F31 DIODE aj18 diode ag23 AK29 aj14 F1020 B956 diode t25 4 k6
Text: Pin Information For The StratixTM EP1S80 Device, ver 3.7 Bank Number B2 B2 B2 B2 B2 B2 , 55 Pin Information For The StratixTM EP1S80 Device, ver 3.7 Bank Number VREF Bank Pin , StratixTM EP1S80 Device, ver 3.7 Bank Number VREF Bank Pin Name/Function Optional Function(s , EP1S80 Device, ver 3.7 Bank Number VREF Bank Pin Name/Function Optional Function(s) B2 B2 , HIGH HIGH LOW LOW HIGH Page 4 of 55 Pin Information For The StratixTM EP1S80 Device, ver 3.7


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PDF EP1S80 PT-EP1S80-3 EP1S80B956. EP1S80. SB5B5 diode t25 4 L5 F31 DIODE aj18 diode ag23 AK29 aj14 F1020 B956 diode t25 4 k6
2004 - 32 tap fir lowpass filter design in matlab

Abstract: simulink model Filter Noise matlab FIR filter matlaB simulink design application circuit for FIR filter matlaB design altera board SLP-50 AN320 1S80 1S25
Text: development board or Stratix EP1S80 DSP development board Figure 2 shows the top-level schematic for the , > directory contains the files for the Stratix EP1S80 DSP development board. Docs Contains schematics, data , > \Reference_Design\Filtering\Exercises1and2and3 For the Stratix EP1S80 DSP development board: c:\altera\kits , EP1S80 DSP development board. Similarly, the desired output frequency of 10 MHz yields a phase , includes the following actions: Set up the Stratix EP1S25 DSP development board or the Stratix EP1S80


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PCN0304

Abstract: altera date code format TSMC 0.13um process specification altera Date Code Formats EP1S60 EP1C12
Text: EP1S40 EP1S60 EP1S80 EP1C3 EP1C4 EP1C6 EP1C12 EP1C20 Base die for 300 mm Process code , Cyclone Device EP1S10 EP1S20 EP1S30 EP1S40 EP1S60 EP1S80 EP1C3 EP1C4 EP1C6 EP1C12 EP1C20


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PDF PCN0304 EP1S25 PCN0304 altera date code format TSMC 0.13um process specification altera Date Code Formats EP1S60 EP1C12
2006 - EP1S

Abstract: EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
Text: Stratix FPGA Series Package & I/O Matrix 534 615 773 773 EP1SGX10C EP1SGX10D EP1SGX25C EP1SGX25D EP1S80 EP1S60 EP1S40 EP1S30 589 726 455 455 773 607 , 1.27 0.9 EP1S80 EP2SGX60C 17 ­ 1 1 7 ­ 1 1 EP1S60 EP2SGX30D 10 ­ 1 1 4 ­ , EP1SGX25F EP1SGX25D EP1SGX25C EP1SGX10D EP1SGX10C EP1S80 3.1875-Gbps Transceivers , EP1S60 80/80 46/72 EP1S80 308 334 473 492 494 597 698 742 951 615 773 773


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PDF EP1SGX10C EP1SGX10D EP1SGX25C EP1SGX25D EP1S80 EP1S60 EP1S40 EP1S30 EP1SGX40G EP1S EP1S40 mram SG-01001-1 EP2S90 EP2S60 EP2S30 EP2S180 EP2S15 RLDRAM
EP1S60

Abstract: No abstract text available
Text: 586 706 726 Table 1­2. Stratix Device Features - EP1S40, EP1S60, EP1S80 Feature EP1S40 EP1S60 EP1S80 41,250 57,120 79,040 M512 RAM blocks (32 × 18 bits) 384 574 767 , ,022 EP1S80 683 773 1,203 Note to Table 1­3: (1) All I/O pin counts include 20 , -5, -6, -7, -8 -5, -6, -7 EP1S60 -6, -7 -5, -6, -7 -6, -7 EP1S80 -6, -7 -5


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PDF S51001-3 420-MHz EP1S20 EP1S25 EP1S10 672-Pin 956-Pin 508-Pin 020-Pin EP1S30 EP1S60
EP1S60

Abstract: No abstract text available
Text: Features - EP1S40, EP1S60, EP1S80 Feature EP1S60 EP1S80 41,250 LEs EP1S40 57,120 79 , 773 1,022 EP1S80 683 773 1,203 Note to Table 1­3: (1) All I/O pin counts include , -5, -6, -7, -8 -5, -6, -7 EP1S60 -6, -7 -5, -6, -7 -6, -7 EP1S80 -6, -7 -5


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PDF S51001-3 420-MHz 484-Pin 672-Pin 780-Pin EP1S20 EP1S25 EP1S10 956-Pin EP1S60
2003 - synopsys leda tool

Abstract: EPXA10 ALTERA MAX 3000 vhdl code rs232 altera hp 7000 matlabsimulink Nucleus PLUS RTOS EPXA10-DEV-BOARD A10E EP20K60E
Text: M 256 M EP1C12, EP1C20 Stratix GX 1 G EP1S80 512 M 512 M EP20K100, EP20K100E , DSP Builder DSB-BOARD/S25 DSP Stratix Stratix EP1S80 SOPC DSP Builder DSB-BOARD


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PDF SG-TOOLS-19/JP synopsys leda tool EPXA10 ALTERA MAX 3000 vhdl code rs232 altera hp 7000 matlabsimulink Nucleus PLUS RTOS EPXA10-DEV-BOARD A10E EP20K60E
2002 - 1117 ald 750

Abstract: EP1S60 PS2214 RAM DDR PLL WITH VCO 4046 TZX 6.8
Text: 10 426 586 706 726 EP1S40 EP1S60 EP1S80 EP1S120 RAM I/O Stratix , 773 1,022 EP1S80 683 1,203 EP1S120 1,238 1,314 (1) I/O 20 (CLK [15:0 , , -6, -7 EP1S60 -6, -7 -6, -7 EP1S80 -6, -7 -5, -6, -7 -6, -7 -6, -7 EP1S120 , / 574 4 / 292 6 2 / 18 90 73 EP1S80 11 / 767 4 / 364 9 2 / 22 101 91 , EP1S80 22 176 88 22 EP1S120 28 224 112 28 (1) 9 × 9 18 × 18 36 × 36


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PDF 03-3340-9480FAX 1117 ald 750 EP1S60 PS2214 RAM DDR PLL WITH VCO 4046 TZX 6.8
PCN0413

Abstract: tsmc EP1C12 EP1S60
Text: PROCESS CHANGE NOTIFICATION PCN0413 ADDITIONAL WAFER FABRICATION SITE (FAB 14) Change Description: Beginning 1 October 2004, Altera will be shipping 0.13 µm products from TSMC's Fab 14 fabrication site, in addition to Fabs 6 and 12. Reason For Change: TSMC Fab 14 is being added as a 300-mm wafer source to ensure product availability. Products Affected: The initial products to be fabricated at TSMC Fab 14 are the Stratix® EP1S25, EP1S60, and EP1S80 , and the CycloneTM EP1C12 and EP1C6 Additional products


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PDF PCN0413 300-mm EP1S25, EP1S60, EP1S80, EP1C12 PCN0413 tsmc EP1S60
S5200-1

Abstract: EP1S60 S52001-3
Text: v v v v v v v v v v v EP1S80 v v v v v v v , additional enhanced PLLs (PLLs 11 and 12) in EP1S80 , EP1S60, EP1S40 (PLL 11 and 12 not supported for F780


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PDF S52001-3 S5200-1 EP1S60
S52001-3

Abstract: EP1S60 SPREAD-SPECTRUM SYSTEM
Text: v v v v v v v v v v v EP1S80 v v v v v v v , additional enhanced PLLs (PLLs 11 and 12) in EP1S80 , EP1S60, EP1S40 (PLL 11 and 12 not supported for F780


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PCN0803

Abstract: TI date code altera date code format marking ic 2008 EP1S60 stiffener ALTERA BGA packages PART MARKING date code marking stratix traceability FC1020
Text: EP1S80 Pin Count 484 780 484 780 780 1020 956 780 1020 956 780 1020 1508 956 1020


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PDF PCN0803 J-STD-020C) JESD46-C, PCN0803 TI date code altera date code format marking ic 2008 EP1S60 stiffener ALTERA BGA packages PART MARKING date code marking stratix traceability FC1020
EP1S60

Abstract: No abstract text available
Text: ) EP1S60 v v v v v v v v v v v v EP1S80 v v v v v , additional enhanced PLLs (PLLs 11 and 12) in EP1S80 , EP1S60, EP1S40 (PLL 11 and 12 not supported for F780


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PDF S52001-3 EP1S60
EP1S60

Abstract: SPREAD-SPECTRUM SYSTEM
Text: v v v v v v EP1S80 v v v v v v v v v v v v , EP1S80 , EP1S60, EP1S40 (PLL 11 and 12 not supported for F780 package), and EP1SGX40 devices each have


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2003 - sAMSUNG CK 5081 T MANUAL

Abstract: 64 bit carry-select adder verilog code intel 915 MOTHERBOARD pcb CIRCUIT diagram inverter PURE SINE WAVE schematic diagram intel 775 motherboard diagram mercury motherboards regulator ic TRANSISTOR SUBSTITUTION DATA BOOK 1993 vhdl code for cordic AW 55 IC matlab code using 8 point DFT butterfly
Text: pins Table 1­2. Stratix Device Features - EP1S40, EP1S60, EP1S80 Feature LEs EP1S40 EP1S60 EP1S80 41,250 57,120 79,040 M512 RAM blocks (32 × 18 bits) 384 574 767 M4K RAM , EP1S40 683 615 773 822 EP1S60 683 773 1,022 EP1S80 683 773 1,203 , -5, -6, -7 EP1S60 -6, -7 -6, -7 -6, -7 EP1S80 -6, -7 -6, -7 (1) Note to , EP1S80 11 / 767 4 / 364 9 2 / 22 101 91 Logic Array Blocks Altera Corporation


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PDF 00-mm sAMSUNG CK 5081 T MANUAL 64 bit carry-select adder verilog code intel 915 MOTHERBOARD pcb CIRCUIT diagram inverter PURE SINE WAVE schematic diagram intel 775 motherboard diagram mercury motherboards regulator ic TRANSISTOR SUBSTITUTION DATA BOOK 1993 vhdl code for cordic AW 55 IC matlab code using 8 point DFT butterfly
PCN0412

Abstract: kyocera datecode IPC-9701 datasheet of BGAS DATE SHEET 9TH 10TH altera top marking IPC 9701 EP1S60 100C 9701
Text: and Kinsus substrates. The Stratix EP1S60 and EP1S80 devices were rolled out using the Kinsus


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PDF PCN0412 Rev01 kyocera datecode IPC-9701 datasheet of BGAS DATE SHEET 9TH 10TH altera top marking IPC 9701 EP1S60 100C 9701
2004 - Error Detection

Abstract: AA20 AN25 CRC-32 CRC calculation EP1C12 pin diagram Altera Stratix 484 pin BGA diagram
Text: - AE21 AF20 AN25 EP1S80 - - - - AE21 AF20 AN25 Note to Table 2 , 12.8 3.3 EP1S40 15.3 3.9 EP1S60 21.7 5.6 EP1S80 29.6 7.6 EP1C3 0.92


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circuit diagram video transmitter and receiver

Abstract: LVDS_TX 800 mhz transmitter circuit diagram 624-300 SSTL-18
Text: buffers. There are four dedicated fast PLLs in EP1S10 to EP1S25 devices, and eight in EP1S30 to EP1S80 , devices. For EP1S30 to EP1S80 devices, fast PLLs are placed in the center of the left and right sides, as , Enables Note (1) All Stratix Devices EP1S30 to EP1S80 Devices Only Input Pin PLL 1 CLK0 (2 , Clock Networks (Part 1 of 2) Notes (1), (2) All Stratix Devices EP1S30 to EP1S80 Devices Only , 2) Notes (1), (2) All Stratix Devices EP1S30 to EP1S80 Devices Only Output Signal PLL 1


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PDF S52005-3 circuit diagram video transmitter and receiver LVDS_TX 800 mhz transmitter circuit diagram 624-300 SSTL-18
1995 - EP1S20F780C6

Abstract: EP1S25F780C7 EP1S30F780C7 EP1S20F484C7 3104 303
Text: Stratix Performance Table 4-35. Updated EP1S60 and EP1S80 timing parameters in Tables 4-82 to 4-93. The , . Stratix Device Features - EP1S40, EP1S60, EP1S80 Feature LEs M512 RAM blocks (32 × 18 bits) M4K RAM , 112 12 822 EP1S60 57,120 574 292 6 5,215,104 18 144 12 1,022 EP1S80 79,040 767 364 9 7,427,520 , . Stratix Package Options & I/O Pin Counts Device EP1S10 EP1S20 EP1S25 EP1S30 EP1S40 EP1S60 EP1S80 Note to , EP1S20 EP1S25 EP1S30 EP1S40 EP1S60 EP1S80 Note to Table 1­6: (1) Contact Altera Applications for up to


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PDF EP1S20B672C6 EP1S20 EP1S20B672C7 EP1S20F484C5 EP1S20F484C6 EP1S20F484C7 EP1S20F672C6 EP1S20F672C7 EP1S20F780C6 EP1S25F780C7 EP1S30F780C7 3104 303
abstract for wireless technology in ieee format

Abstract: 16 QAM modulation matlab simulink 16QAM qam by simulink matlab QAM matlab quadrature amplitude modulation a simulink model bpsk simulink matlab abstract for satellite technology in ieee format m-qam modulation 16QAM modulation
Text: DSP Builder, and Altera's Stratix® EP1S80 DSP development board. The design is first implemented in , downloaded to an Altera Stratix EP1S80 DSP development board. The results show that using data


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PDF 16-QAM) abstract for wireless technology in ieee format 16 QAM modulation matlab simulink 16QAM qam by simulink matlab QAM matlab quadrature amplitude modulation a simulink model bpsk simulink matlab abstract for satellite technology in ieee format m-qam modulation 16QAM modulation
BGA 64 PACKAGE thermal resistance

Abstract: MS-034 BGA PACKAGE OUTLINE bga thermal resistance 63SN 37PB bt 134 EP1S60 led flip-chip BGA L 780 AC
Text: Flip-chip FineLine BGA EP1S80 1,020 1,508 Flip-chip BGA 956 Flip-chip FineLine BGA Flip-chip , 6.2 5.1 1508 EP1S80 956 1020 FineLine BGA 0.1 8.8 6.9 5.5 4.5


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PDF S53008-3 508-pin BGA 64 PACKAGE thermal resistance MS-034 BGA PACKAGE OUTLINE bga thermal resistance 63SN 37PB bt 134 EP1S60 led flip-chip BGA L 780 AC
2004 - Not Available

Abstract: No abstract text available
Text: EP1S60 and EP1S80 timing parameters in Tables 4-82 to 4-93. The Stratix timing models are final for all , Device Features — EP1S40, EP1S60, EP1S80 Feature EP1S40 EP1S60 EP1S80 41,250 57,120 , 683 615 773 822 EP1S60 683 773 1,022 EP1S80 683 773 1,203 Note to , -6, -7 -5, -6, -7 -6, -7 EP1S80 -6, -7 -5, -6, -7 -6, -7 Altera Corporation , 90 73 EP1S80 11 / 767 4 / 364 9 2 / 22 101 91 Logic Array Blocks


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